Reland "735a5f67e351 [AMDGPU] When allocating VGPRs, VGPR spills are not part of the prologue (llvm#109439)"

This is supposed to be fixed by llvm@6636f32.

More context: https://ontrack-internal.amd.com/browse/SWDEV-489621

Change-Id: I49ec81989eec8fda897dffb1bd7b4dbb76a98c46

Author: animeshk-amd

llvm/lib/Target/AMDGPU/SIInstrInfo.cpp

@@ -8953,11 +8953,10 @@ bool SIInstrInfo::isBasicBlockPrologue(const MachineInstr &MI,
   }
 
   uint16_t Opcode = MI.getOpcode();
-  // FIXME: Copies inserted in the block prolog for live-range split should also
-  // be included.
   return IsNullOrVectorRegister &&
-         (isSpill(Opcode) || (!MI.isTerminator() && Opcode != AMDGPU::COPY &&
-                              MI.modifiesRegister(AMDGPU::EXEC, &RI)));
+         (isSGPRSpill(Opcode) ||
+          (!MI.isTerminator() && Opcode != AMDGPU::COPY &&
+           MI.modifiesRegister(AMDGPU::EXEC, &RI)));
 }
 
 MachineInstrBuilder

revert_patches.txt

@@ -79,10 +79,6 @@ Revert "Recommit "[InstCombine] Expand `foldSelectICmpAndOr` -> `foldSelectICmpA
     This reverts commit 54ec8bcaf85e3a3341c97640331d58e24ac0d2cd.
 contact: Selehov
 ---
-hangs ocl at -O0
-735a5f67e351 [AMDGPU] When allocating VGPRs, VGPR spills are not part of the prologue (#109439)
-Ron,MatC,Jay
----
 breaks hip_on_rocclr build
 Revert 8039886e6d  "AMDGPU: Handle folding frame indexes into s_add_i32 (#101694)"
 Ron/MatC