@@ -1081,15 +1081,15 @@ class AArch64MCPlusBuilder : public MCPlusBuilder {
10811081
10821082 if (isADR (Inst) || RelType == ELF::R_AARCH64_ADR_PREL_LO21 ||
10831083 RelType == ELF::R_AARCH64_TLSDESC_ADR_PREL21) {
1084- return MCSpecifierExpr::create (Expr, AArch64MCExpr::VK_ABS , Ctx);
1084+ return MCSpecifierExpr::create (Expr, AArch64::S_ABS , Ctx);
10851085 } else if (isADRP (Inst) || RelType == ELF::R_AARCH64_ADR_PREL_PG_HI21 ||
10861086 RelType == ELF::R_AARCH64_ADR_PREL_PG_HI21_NC ||
10871087 RelType == ELF::R_AARCH64_TLSDESC_ADR_PAGE21 ||
10881088 RelType == ELF::R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21 ||
10891089 RelType == ELF::R_AARCH64_ADR_GOT_PAGE) {
10901090 // Never emit a GOT reloc, we handled this in
10911091 // RewriteInstance::readRelocations().
1092- return MCSpecifierExpr::create (Expr, AArch64MCExpr::VK_ABS_PAGE , Ctx);
1092+ return MCSpecifierExpr::create (Expr, AArch64::S_ABS_PAGE , Ctx);
10931093 } else {
10941094 switch (RelType) {
10951095 case ELF::R_AARCH64_ADD_ABS_LO12_NC:
@@ -1103,18 +1103,18 @@ class AArch64MCPlusBuilder : public MCPlusBuilder {
11031103 case ELF::R_AARCH64_TLSDESC_LD64_LO12:
11041104 case ELF::R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
11051105 case ELF::R_AARCH64_TLSLE_ADD_TPREL_LO12_NC:
1106- return MCSpecifierExpr::create (Expr, AArch64MCExpr::VK_LO12 , Ctx);
1106+ return MCSpecifierExpr::create (Expr, AArch64::S_LO12 , Ctx);
11071107 case ELF::R_AARCH64_MOVW_UABS_G3:
1108- return MCSpecifierExpr::create (Expr, AArch64MCExpr::VK_ABS_G3 , Ctx);
1108+ return MCSpecifierExpr::create (Expr, AArch64::S_ABS_G3 , Ctx);
11091109 case ELF::R_AARCH64_MOVW_UABS_G2:
11101110 case ELF::R_AARCH64_MOVW_UABS_G2_NC:
1111- return MCSpecifierExpr::create (Expr, AArch64MCExpr::VK_ABS_G2_NC , Ctx);
1111+ return MCSpecifierExpr::create (Expr, AArch64::S_ABS_G2_NC , Ctx);
11121112 case ELF::R_AARCH64_MOVW_UABS_G1:
11131113 case ELF::R_AARCH64_MOVW_UABS_G1_NC:
1114- return MCSpecifierExpr::create (Expr, AArch64MCExpr::VK_ABS_G1_NC , Ctx);
1114+ return MCSpecifierExpr::create (Expr, AArch64::S_ABS_G1_NC , Ctx);
11151115 case ELF::R_AARCH64_MOVW_UABS_G0:
11161116 case ELF::R_AARCH64_MOVW_UABS_G0_NC:
1117- return MCSpecifierExpr::create (Expr, AArch64MCExpr::VK_ABS_G0_NC , Ctx);
1117+ return MCSpecifierExpr::create (Expr, AArch64::S_ABS_G0_NC , Ctx);
11181118 default :
11191119 break ;
11201120 }
@@ -2028,7 +2028,7 @@ class AArch64MCPlusBuilder : public MCPlusBuilder {
20282028 Inst.setOpcode (AArch64::MOVZXi);
20292029 Inst.addOperand (MCOperand::createReg (AArch64::X16));
20302030 Inst.addOperand (MCOperand::createExpr (
2031- MCSpecifierExpr::create (Target, AArch64MCExpr::VK_ABS_G3 , *Ctx)));
2031+ MCSpecifierExpr::create (Target, AArch64::S_ABS_G3 , *Ctx)));
20322032 Inst.addOperand (MCOperand::createImm (0x30 ));
20332033 Seq.emplace_back (Inst);
20342034
@@ -2037,7 +2037,7 @@ class AArch64MCPlusBuilder : public MCPlusBuilder {
20372037 Inst.addOperand (MCOperand::createReg (AArch64::X16));
20382038 Inst.addOperand (MCOperand::createReg (AArch64::X16));
20392039 Inst.addOperand (MCOperand::createExpr (
2040- MCSpecifierExpr::create (Target, AArch64MCExpr::VK_ABS_G2_NC , *Ctx)));
2040+ MCSpecifierExpr::create (Target, AArch64::S_ABS_G2_NC , *Ctx)));
20412041 Inst.addOperand (MCOperand::createImm (0x20 ));
20422042 Seq.emplace_back (Inst);
20432043
@@ -2046,7 +2046,7 @@ class AArch64MCPlusBuilder : public MCPlusBuilder {
20462046 Inst.addOperand (MCOperand::createReg (AArch64::X16));
20472047 Inst.addOperand (MCOperand::createReg (AArch64::X16));
20482048 Inst.addOperand (MCOperand::createExpr (
2049- MCSpecifierExpr::create (Target, AArch64MCExpr::VK_ABS_G1_NC , *Ctx)));
2049+ MCSpecifierExpr::create (Target, AArch64::S_ABS_G1_NC , *Ctx)));
20502050 Inst.addOperand (MCOperand::createImm (0x10 ));
20512051 Seq.emplace_back (Inst);
20522052
@@ -2055,7 +2055,7 @@ class AArch64MCPlusBuilder : public MCPlusBuilder {
20552055 Inst.addOperand (MCOperand::createReg (AArch64::X16));
20562056 Inst.addOperand (MCOperand::createReg (AArch64::X16));
20572057 Inst.addOperand (MCOperand::createExpr (
2058- MCSpecifierExpr::create (Target, AArch64MCExpr::VK_ABS_G0_NC , *Ctx)));
2058+ MCSpecifierExpr::create (Target, AArch64::S_ABS_G0_NC , *Ctx)));
20592059 Inst.addOperand (MCOperand::createImm (0 ));
20602060 Seq.emplace_back (Inst);
20612061
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