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z1_cciauto
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merge main into amd-staging (llvm#3850)
2 parents fc9fdf0 + 654a2a9 commit 77843a0

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‎clang/docs/analyzer/checkers.rst

Lines changed: 0 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -2932,18 +2932,6 @@ the locking/unlocking of ``mtx_t`` mutexes.
29322932
mtx_lock(&mtx1); // warn: This lock has already been acquired
29332933
}
29342934
2935-
.. _alpha-core-CastSize:
2936-
2937-
alpha.core.CastSize (C)
2938-
"""""""""""""""""""""""
2939-
Check when casting a malloc'ed type ``T``, whether the size is a multiple of the size of ``T``.
2940-
2941-
.. code-block:: c
2942-
2943-
void test() {
2944-
int *x = (int *) malloc(11); // warn
2945-
}
2946-
29472935
.. _alpha-core-CastToStruct:
29482936
29492937
alpha.core.CastToStruct (C, C++)

‎clang/include/clang/Basic/BuiltinsX86.td

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1993,6 +1993,10 @@ let Features = "avx512dq,evex512", Attributes = [NoThrow, Const, RequiredVectorW
19931993
}
19941994

19951995
let Features = "avx512f,evex512", Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<512>] in {
1996+
def psllv16si : X86Builtin<"_Vector<16, int>(_Vector<16, int>, _Vector<16, int>)">;
1997+
def psrav16si : X86Builtin<"_Vector<16, int>(_Vector<16, int>, _Vector<16, int>)">;
1998+
def psrlv16si : X86Builtin<"_Vector<16, int>(_Vector<16, int>, _Vector<16, int>)">;
1999+
19962000
def prold512 : X86Builtin<"_Vector<16, int>(_Vector<16, int>, _Constant int)">;
19972001
def prord512 : X86Builtin<"_Vector<16, int>(_Vector<16, int>, _Constant int)">;
19982002
def prolq512 : X86Builtin<"_Vector<8, long long int>(_Vector<8, long long int>, _Constant int)">;
@@ -2422,15 +2426,12 @@ let Features = "avx512vl",
24222426
let Features = "avx512f,evex512", Attributes = [NoThrow, Const, RequiredVectorWidth<512>] in {
24232427
def pslld512 : X86Builtin<"_Vector<16, int>(_Vector<16, int>, _Vector<4, int>)">;
24242428
def psllq512 : X86Builtin<"_Vector<8, long long int>(_Vector<8, long long int>, _Vector<2, long long int>)">;
2425-
def psllv16si : X86Builtin<"_Vector<16, int>(_Vector<16, int>, _Vector<16, int>)">;
24262429
def psllv8di : X86Builtin<"_Vector<8, long long int>(_Vector<8, long long int>, _Vector<8, long long int>)">;
24272430
def psrad512 : X86Builtin<"_Vector<16, int>(_Vector<16, int>, _Vector<4, int>)">;
24282431
def psraq512 : X86Builtin<"_Vector<8, long long int>(_Vector<8, long long int>, _Vector<2, long long int>)">;
2429-
def psrav16si : X86Builtin<"_Vector<16, int>(_Vector<16, int>, _Vector<16, int>)">;
24302432
def psrav8di : X86Builtin<"_Vector<8, long long int>(_Vector<8, long long int>, _Vector<8, long long int>)">;
24312433
def psrld512 : X86Builtin<"_Vector<16, int>(_Vector<16, int>, _Vector<4, int>)">;
24322434
def psrlq512 : X86Builtin<"_Vector<8, long long int>(_Vector<8, long long int>, _Vector<2, long long int>)">;
2433-
def psrlv16si : X86Builtin<"_Vector<16, int>(_Vector<16, int>, _Vector<16, int>)">;
24342435
def psrlv8di : X86Builtin<"_Vector<8, long long int>(_Vector<8, long long int>, _Vector<8, long long int>)">;
24352436
def pternlogd512_mask : X86Builtin<"_Vector<16, int>(_Vector<16, int>, _Vector<16, int>, _Vector<16, int>, _Constant int, unsigned short)">;
24362437
def pternlogd512_maskz : X86Builtin<"_Vector<16, int>(_Vector<16, int>, _Vector<16, int>, _Vector<16, int>, _Constant int, unsigned short)">;

‎clang/include/clang/StaticAnalyzer/Checkers/Checkers.td

Lines changed: 0 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -257,11 +257,6 @@ def BoolAssignmentChecker : Checker<"BoolAssignment">,
257257
HelpText<"Warn about assigning non-{0,1} values to Boolean variables">,
258258
Documentation<HasDocumentation>;
259259

260-
def CastSizeChecker : Checker<"CastSize">,
261-
HelpText<"Check when casting a malloc'ed type T, whether the size is a "
262-
"multiple of the size of T">,
263-
Documentation<HasDocumentation>;
264-
265260
def CastToStructChecker : Checker<"CastToStruct">,
266261
HelpText<"Check for cast from non-struct pointer to struct pointer">,
267262
Documentation<HasDocumentation>;

‎clang/lib/AST/ASTImporter.cpp

Lines changed: 12 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1740,10 +1740,21 @@ ExpectedType ASTNodeImporter::VisitDeducedTemplateSpecializationType(
17401740
}
17411741

17421742
ExpectedType ASTNodeImporter::VisitTagType(const TagType *T) {
1743-
Expected<TagDecl *> ToDeclOrErr = import(T->getOriginalDecl());
1743+
TagDecl *DeclForType = T->getOriginalDecl();
1744+
Expected<TagDecl *> ToDeclOrErr = import(DeclForType);
17441745
if (!ToDeclOrErr)
17451746
return ToDeclOrErr.takeError();
17461747

1748+
if (DeclForType->isUsed()) {
1749+
// If there is a definition of the 'OriginalDecl', it should be imported to
1750+
// have all information for the type in the "To" AST. (In some cases no
1751+
// other reference may exist to the definition decl and it would not be
1752+
// imported otherwise.)
1753+
Expected<TagDecl *> ToDefDeclOrErr = import(DeclForType->getDefinition());
1754+
if (!ToDefDeclOrErr)
1755+
return ToDefDeclOrErr.takeError();
1756+
}
1757+
17471758
if (T->isCanonicalUnqualified())
17481759
return Importer.getToContext().getCanonicalTagType(*ToDeclOrErr);
17491760

‎clang/lib/AST/ByteCode/InterpBuiltin.cpp

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -3268,6 +3268,7 @@ bool InterpretBuiltin(InterpState &S, CodePtr OpPC, const CallExpr *Call,
32683268
case clang::X86::BI__builtin_ia32_psllv4di:
32693269
case clang::X86::BI__builtin_ia32_psllv4si:
32703270
case clang::X86::BI__builtin_ia32_psllv8si:
3271+
case clang::X86::BI__builtin_ia32_psllv16si:
32713272
case clang::X86::BI__builtin_ia32_psllwi128:
32723273
case clang::X86::BI__builtin_ia32_psllwi256:
32733274
case clang::X86::BI__builtin_ia32_psllwi512:
@@ -3287,6 +3288,7 @@ bool InterpretBuiltin(InterpState &S, CodePtr OpPC, const CallExpr *Call,
32873288

32883289
case clang::X86::BI__builtin_ia32_psrav4si:
32893290
case clang::X86::BI__builtin_ia32_psrav8si:
3291+
case clang::X86::BI__builtin_ia32_psrav16si:
32903292
case clang::X86::BI__builtin_ia32_psrawi128:
32913293
case clang::X86::BI__builtin_ia32_psrawi256:
32923294
case clang::X86::BI__builtin_ia32_psrawi512:
@@ -3308,6 +3310,7 @@ bool InterpretBuiltin(InterpState &S, CodePtr OpPC, const CallExpr *Call,
33083310
case clang::X86::BI__builtin_ia32_psrlv4di:
33093311
case clang::X86::BI__builtin_ia32_psrlv4si:
33103312
case clang::X86::BI__builtin_ia32_psrlv8si:
3313+
case clang::X86::BI__builtin_ia32_psrlv16si:
33113314
case clang::X86::BI__builtin_ia32_psrlwi128:
33123315
case clang::X86::BI__builtin_ia32_psrlwi256:
33133316
case clang::X86::BI__builtin_ia32_psrlwi512:

‎clang/lib/AST/ExprConstant.cpp

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -11687,12 +11687,15 @@ bool VectorExprEvaluator::VisitCallExpr(const CallExpr *E) {
1168711687
case clang::X86::BI__builtin_ia32_psllv4di:
1168811688
case clang::X86::BI__builtin_ia32_psllv4si:
1168911689
case clang::X86::BI__builtin_ia32_psllv8si:
11690+
case clang::X86::BI__builtin_ia32_psllv16si:
1169011691
case clang::X86::BI__builtin_ia32_psrav4si:
1169111692
case clang::X86::BI__builtin_ia32_psrav8si:
11693+
case clang::X86::BI__builtin_ia32_psrav16si:
1169211694
case clang::X86::BI__builtin_ia32_psrlv2di:
1169311695
case clang::X86::BI__builtin_ia32_psrlv4di:
1169411696
case clang::X86::BI__builtin_ia32_psrlv4si:
1169511697
case clang::X86::BI__builtin_ia32_psrlv8si:
11698+
case clang::X86::BI__builtin_ia32_psrlv16si:
1169611699

1169711700
case clang::X86::BI__builtin_ia32_psllwi128:
1169811701
case clang::X86::BI__builtin_ia32_pslldi128:
@@ -11823,6 +11826,7 @@ bool VectorExprEvaluator::VisitCallExpr(const CallExpr *E) {
1182311826
case clang::X86::BI__builtin_ia32_psllv4di:
1182411827
case clang::X86::BI__builtin_ia32_psllv4si:
1182511828
case clang::X86::BI__builtin_ia32_psllv8si:
11829+
case clang::X86::BI__builtin_ia32_psllv16si:
1182611830
if (RHS.uge(RHS.getBitWidth())) {
1182711831
ResultElements.push_back(
1182811832
APValue(APSInt(APInt::getZero(RHS.getBitWidth()), DestUnsigned)));
@@ -11833,6 +11837,7 @@ bool VectorExprEvaluator::VisitCallExpr(const CallExpr *E) {
1183311837
break;
1183411838
case clang::X86::BI__builtin_ia32_psrav4si:
1183511839
case clang::X86::BI__builtin_ia32_psrav8si:
11840+
case clang::X86::BI__builtin_ia32_psrav16si:
1183611841
if (RHS.uge(RHS.getBitWidth())) {
1183711842
ResultElements.push_back(
1183811843
APValue(APSInt(LHS.ashr(RHS.getBitWidth() - 1), DestUnsigned)));
@@ -11845,6 +11850,7 @@ bool VectorExprEvaluator::VisitCallExpr(const CallExpr *E) {
1184511850
case clang::X86::BI__builtin_ia32_psrlv4di:
1184611851
case clang::X86::BI__builtin_ia32_psrlv4si:
1184711852
case clang::X86::BI__builtin_ia32_psrlv8si:
11853+
case clang::X86::BI__builtin_ia32_psrlv16si:
1184811854
if (RHS.uge(RHS.getBitWidth())) {
1184911855
ResultElements.push_back(
1185011856
APValue(APSInt(APInt::getZero(RHS.getBitWidth()), DestUnsigned)));

‎clang/lib/CodeGen/CGHLSLRuntime.cpp

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -182,6 +182,7 @@ static void createResourceCtorArgs(CodeGenModule &CGM, CXXConstructorDecl *CD,
182182

183183
} else {
184184
// implicit binding
185+
assert(RBA && "missing implicit binding attribute");
185186
auto *OrderID =
186187
llvm::ConstantInt::get(CGM.IntTy, RBA->getImplicitBindingOrderID());
187188
Args.add(RValue::get(Space), AST.UnsignedIntTy);

‎clang/lib/CodeGen/TargetBuiltins/RISCV.cpp

Lines changed: 0 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -494,7 +494,6 @@ emitRVVAveragingBuiltin(CodeGenFunction *CGF, const CallExpr *E,
494494
int PolicyAttrs, bool IsMasked, unsigned SegInstSEW) {
495495
auto &Builder = CGF->Builder;
496496
auto &CGM = CGF->CGM;
497-
llvm::SmallVector<llvm::Type *, 3> IntrinsicTypes;
498497
// LLVM intrinsic
499498
// Unmasked: (passthru, op0, op1, round_mode, vl)
500499
// Masked: (passthru, vector_in, vector_in/scalar_in, mask, vxrm, vl,
@@ -524,7 +523,6 @@ static LLVM_ATTRIBUTE_NOINLINE Value *emitRVVNarrowingClipBuiltin(
524523
int PolicyAttrs, bool IsMasked, unsigned SegInstSEW) {
525524
auto &Builder = CGF->Builder;
526525
auto &CGM = CGF->CGM;
527-
llvm::SmallVector<llvm::Type *, 3> IntrinsicTypes;
528526
// LLVM intrinsic
529527
// Unmasked: (passthru, op0, op1, round_mode, vl)
530528
// Masked: (passthru, vector_in, vector_in/scalar_in, mask, vxrm, vl,
@@ -555,7 +553,6 @@ static LLVM_ATTRIBUTE_NOINLINE Value *emitRVVFloatingPointBuiltin(
555553
int PolicyAttrs, bool IsMasked, unsigned SegInstSEW) {
556554
auto &Builder = CGF->Builder;
557555
auto &CGM = CGF->CGM;
558-
llvm::SmallVector<llvm::Type *, 3> IntrinsicTypes;
559556
// LLVM intrinsic
560557
// Unmasked: (passthru, op0, op1, round_mode, vl)
561558
// Masked: (passthru, vector_in, vector_in/scalar_in, mask, frm, vl, policy)
@@ -591,7 +588,6 @@ static LLVM_ATTRIBUTE_NOINLINE Value *emitRVVWideningFloatingPointBuiltin(
591588
int PolicyAttrs, bool IsMasked, unsigned SegInstSEW) {
592589
auto &Builder = CGF->Builder;
593590
auto &CGM = CGF->CGM;
594-
llvm::SmallVector<llvm::Type *, 3> IntrinsicTypes;
595591
// LLVM intrinsic
596592
// Unmasked: (passthru, op0, op1, round_mode, vl)
597593
// Masked: (passthru, vector_in, vector_in/scalar_in, mask, frm, vl, policy)
@@ -695,7 +691,6 @@ emitRVVFMABuiltin(CodeGenFunction *CGF, const CallExpr *E,
695691
int PolicyAttrs, bool IsMasked, unsigned SegInstSEW) {
696692
auto &Builder = CGF->Builder;
697693
auto &CGM = CGF->CGM;
698-
llvm::SmallVector<llvm::Type *, 3> IntrinsicTypes;
699694
// LLVM intrinsic
700695
// Unmasked: (vector_in, vector_in/scalar_in, vector_in, round_mode,
701696
// vl, policy)
@@ -725,7 +720,6 @@ emitRVVWideningFMABuiltin(CodeGenFunction *CGF, const CallExpr *E,
725720
int PolicyAttrs, bool IsMasked, unsigned SegInstSEW) {
726721
auto &Builder = CGF->Builder;
727722
auto &CGM = CGF->CGM;
728-
llvm::SmallVector<llvm::Type *, 3> IntrinsicTypes;
729723
// LLVM intrinsic
730724
// Unmasked: (vector_in, vector_in/scalar_in, vector_in, round_mode, vl,
731725
// policy) Masked: (vector_in, vector_in/scalar_in, vector_in, mask, frm,
@@ -790,7 +784,6 @@ static LLVM_ATTRIBUTE_NOINLINE Value *emitRVVFloatingConvBuiltin(
790784
int PolicyAttrs, bool IsMasked, unsigned SegInstSEW) {
791785
auto &Builder = CGF->Builder;
792786
auto &CGM = CGF->CGM;
793-
llvm::SmallVector<llvm::Type *, 3> IntrinsicTypes;
794787
// LLVM intrinsic
795788
// Unmasked: (passthru, op0, frm, vl)
796789
// Masked: (passthru, op0, mask, frm, vl, policy)
@@ -825,7 +818,6 @@ static LLVM_ATTRIBUTE_NOINLINE Value *emitRVVFloatingReductionBuiltin(
825818
int PolicyAttrs, bool IsMasked, unsigned SegInstSEW) {
826819
auto &Builder = CGF->Builder;
827820
auto &CGM = CGF->CGM;
828-
llvm::SmallVector<llvm::Type *, 3> IntrinsicTypes;
829821
// LLVM intrinsic
830822
// Unmasked: (passthru, op0, op1, round_mode, vl)
831823
// Masked: (passthru, vector_in, vector_in/scalar_in, mask, frm, vl, policy)

‎clang/lib/Headers/avx512fintrin.h

Lines changed: 18 additions & 27 deletions
Original file line numberDiff line numberDiff line change
@@ -5644,23 +5644,20 @@ _mm512_maskz_sll_epi64(__mmask8 __U, __m512i __A, __m128i __B)
56445644
(__v8di)_mm512_setzero_si512());
56455645
}
56465646

5647-
static __inline__ __m512i __DEFAULT_FN_ATTRS512
5648-
_mm512_sllv_epi32(__m512i __X, __m512i __Y)
5649-
{
5647+
static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
5648+
_mm512_sllv_epi32(__m512i __X, __m512i __Y) {
56505649
return (__m512i)__builtin_ia32_psllv16si((__v16si)__X, (__v16si)__Y);
56515650
}
56525651

5653-
static __inline__ __m512i __DEFAULT_FN_ATTRS512
5654-
_mm512_mask_sllv_epi32(__m512i __W, __mmask16 __U, __m512i __X, __m512i __Y)
5655-
{
5652+
static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
5653+
_mm512_mask_sllv_epi32(__m512i __W, __mmask16 __U, __m512i __X, __m512i __Y) {
56565654
return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,
56575655
(__v16si)_mm512_sllv_epi32(__X, __Y),
56585656
(__v16si)__W);
56595657
}
56605658

5661-
static __inline__ __m512i __DEFAULT_FN_ATTRS512
5662-
_mm512_maskz_sllv_epi32(__mmask16 __U, __m512i __X, __m512i __Y)
5663-
{
5659+
static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
5660+
_mm512_maskz_sllv_epi32(__mmask16 __U, __m512i __X, __m512i __Y) {
56645661
return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,
56655662
(__v16si)_mm512_sllv_epi32(__X, __Y),
56665663
(__v16si)_mm512_setzero_si512());
@@ -5732,23 +5729,20 @@ _mm512_maskz_sra_epi64(__mmask8 __U, __m512i __A, __m128i __B)
57325729
(__v8di)_mm512_setzero_si512());
57335730
}
57345731

5735-
static __inline__ __m512i __DEFAULT_FN_ATTRS512
5736-
_mm512_srav_epi32(__m512i __X, __m512i __Y)
5737-
{
5732+
static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
5733+
_mm512_srav_epi32(__m512i __X, __m512i __Y) {
57385734
return (__m512i)__builtin_ia32_psrav16si((__v16si)__X, (__v16si)__Y);
57395735
}
57405736

5741-
static __inline__ __m512i __DEFAULT_FN_ATTRS512
5742-
_mm512_mask_srav_epi32(__m512i __W, __mmask16 __U, __m512i __X, __m512i __Y)
5743-
{
5737+
static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
5738+
_mm512_mask_srav_epi32(__m512i __W, __mmask16 __U, __m512i __X, __m512i __Y) {
57445739
return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,
57455740
(__v16si)_mm512_srav_epi32(__X, __Y),
57465741
(__v16si)__W);
57475742
}
57485743

5749-
static __inline__ __m512i __DEFAULT_FN_ATTRS512
5750-
_mm512_maskz_srav_epi32(__mmask16 __U, __m512i __X, __m512i __Y)
5751-
{
5744+
static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
5745+
_mm512_maskz_srav_epi32(__mmask16 __U, __m512i __X, __m512i __Y) {
57525746
return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,
57535747
(__v16si)_mm512_srav_epi32(__X, __Y),
57545748
(__v16si)_mm512_setzero_si512());
@@ -5820,23 +5814,20 @@ _mm512_maskz_srl_epi64(__mmask8 __U, __m512i __A, __m128i __B)
58205814
(__v8di)_mm512_setzero_si512());
58215815
}
58225816

5823-
static __inline__ __m512i __DEFAULT_FN_ATTRS512
5824-
_mm512_srlv_epi32(__m512i __X, __m512i __Y)
5825-
{
5817+
static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
5818+
_mm512_srlv_epi32(__m512i __X, __m512i __Y) {
58265819
return (__m512i)__builtin_ia32_psrlv16si((__v16si)__X, (__v16si)__Y);
58275820
}
58285821

5829-
static __inline__ __m512i __DEFAULT_FN_ATTRS512
5830-
_mm512_mask_srlv_epi32(__m512i __W, __mmask16 __U, __m512i __X, __m512i __Y)
5831-
{
5822+
static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
5823+
_mm512_mask_srlv_epi32(__m512i __W, __mmask16 __U, __m512i __X, __m512i __Y) {
58325824
return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,
58335825
(__v16si)_mm512_srlv_epi32(__X, __Y),
58345826
(__v16si)__W);
58355827
}
58365828

5837-
static __inline__ __m512i __DEFAULT_FN_ATTRS512
5838-
_mm512_maskz_srlv_epi32(__mmask16 __U, __m512i __X, __m512i __Y)
5839-
{
5829+
static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
5830+
_mm512_maskz_srlv_epi32(__mmask16 __U, __m512i __X, __m512i __Y) {
58405831
return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,
58415832
(__v16si)_mm512_srlv_epi32(__X, __Y),
58425833
(__v16si)_mm512_setzero_si512());

‎clang/lib/Headers/fmaintrin.h

Lines changed: 6 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -15,8 +15,12 @@
1515
#define __FMAINTRIN_H
1616

1717
/* Define the default attributes for the functions in this file. */
18-
#define __DEFAULT_FN_ATTRS128 __attribute__((__always_inline__, __nodebug__, __target__("fma"), __min_vector_width__(128)))
19-
#define __DEFAULT_FN_ATTRS256 __attribute__((__always_inline__, __nodebug__, __target__("fma"), __min_vector_width__(256)))
18+
#define __DEFAULT_FN_ATTRS128 \
19+
__attribute__((__always_inline__, __nodebug__, __target__("fma,no-evex512"), \
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__min_vector_width__(128)))
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#define __DEFAULT_FN_ATTRS256 \
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__attribute__((__always_inline__, __nodebug__, __target__("fma,no-evex512"), \
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__min_vector_width__(256)))
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#if defined(__cplusplus) && (__cplusplus >= 201103L)
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#define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS128 constexpr

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