merge main into amd-staging

Author: z1-cciauto

clang/test/CodeGen/X86/avx512cd-builtins.c

@@ -2,6 +2,10 @@
 // RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=i386-apple-darwin -target-feature +avx512cd -emit-llvm -o - -Wall -Werror | FileCheck %s
 // RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +avx512cd -emit-llvm -o - -Wall -Werror | FileCheck %s
 // RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=i386-apple-darwin -target-feature +avx512cd -emit-llvm -o - -Wall -Werror | FileCheck %s
+// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +avx512cd -emit-llvm -o - -Wall -Werror -fexperimental-new-constant-interpreter | FileCheck %s
+// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=i386-apple-darwin -target-feature +avx512cd -emit-llvm -o - -Wall -Werror -fexperimental-new-constant-interpreter | FileCheck %s
+// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +avx512cd -emit-llvm -o - -Wall -Werror -fexperimental-new-constant-interpreter | FileCheck %s
+// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=i386-apple-darwin -target-feature +avx512cd -emit-llvm -o - -Wall -Werror -fexperimental-new-constant-interpreter | FileCheck %s
 
 
 #include <immintrin.h>

clang/test/CodeGen/X86/avx512vlcd-builtins.c

@@ -2,6 +2,10 @@
 // RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=i386-apple-darwin -target-feature +avx512vl -target-feature +avx512cd -emit-llvm -o - -Wall -Werror | FileCheck %s
 // RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +avx512vl -target-feature +avx512cd -emit-llvm -o - -Wall -Werror | FileCheck %s
 // RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=i386-apple-darwin -target-feature +avx512vl -target-feature +avx512cd -emit-llvm -o - -Wall -Werror | FileCheck %s
+// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +avx512vl -target-feature +avx512cd -emit-llvm -o - -Wall -Werror -fexperimental-new-constant-interpreter | FileCheck %s
+// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=i386-apple-darwin -target-feature +avx512vl -target-feature +avx512cd -emit-llvm -o - -Wall -Werror -fexperimental-new-constant-interpreter | FileCheck %s
+// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +avx512vl -target-feature +avx512cd -emit-llvm -o - -Wall -Werror -fexperimental-new-constant-interpreter | FileCheck %s
+// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=i386-apple-darwin -target-feature +avx512vl -target-feature +avx512cd -emit-llvm -o - -Wall -Werror -fexperimental-new-constant-interpreter | FileCheck %s
 
 
 #include <immintrin.h>

llvm/docs/BranchWeightMetadata.rst

@@ -9,24 +9,24 @@ Introduction
 ============
 
 Branch Weight Metadata represents branch weights as its likeliness to be taken
-(see :doc:`BlockFrequencyTerminology`). Metadata is assigned to an
-``Instruction`` that is a terminator as a ``MDNode`` of the ``MD_prof`` kind.
-The first operator is always a ``MDString`` node with the string
-"branch_weights".  Number of operators depends on the terminator type.
+(see :doc:`BlockFrequencyTerminology`). Metadata is assigned to a
+terminator ``Instruction`` as an ``MDNode`` of the ``MD_prof`` kind.
+The first operand is always an ``MDString`` node with the string
+"branch_weights".  The number of operands depends on the terminator type.
 
-Branch weights might be fetch from the profiling file, or generated based on
-`__builtin_expect`_ and `__builtin_expect_with_probability`_ instruction.
+Branch weights might be fetched from the profiling file or generated based on
+`__builtin_expect`_ and `__builtin_expect_with_probability`_ instructions.
 
-All weights are represented as an unsigned 32-bit values, where higher value
-indicates greater chance to be taken.
+All weights are represented as unsigned 32-bit values, where a higher value
+indicates a greater chance of being taken.
 
 Supported Instructions
 ======================
 
 ``BranchInst``
 ^^^^^^^^^^^^^^
 
-Metadata is only assigned to the conditional branches. There are two extra
+Metadata is only assigned to conditional branches. There are two extra
 operands for the true and the false branch.
 We optionally track if the metadata was added by ``__builtin_expect`` or
 ``__builtin_expect_with_probability`` with an optional field ``!"expected"``.
@@ -43,7 +43,7 @@ We optionally track if the metadata was added by ``__builtin_expect`` or
 ``SwitchInst``
 ^^^^^^^^^^^^^^
 
-Branch weights are assigned to every case (including the ``default`` case which
+Branch weights are assigned to every case (including the ``default`` case, which
 is always case #0).
 
 .. code-block:: none
@@ -74,7 +74,7 @@ Branch weights are assigned to every destination.
 
 Calls may have branch weight metadata, containing the execution count of
 the call. It is currently used in SamplePGO mode only, to augment the
-block and entry counts which may not be accurate with sampling.
+block and entry counts, which may not be accurate with sampling.
 
 .. code-block:: none
 
@@ -89,9 +89,9 @@ block and entry counts which may not be accurate with sampling.
 
 Invoke instruction may have branch weight metadata with one or two weights.
 The second weight is optional and corresponds to the unwind branch.
-If only one weight is set then it contains the execution count of the call
+If only one weight is set, then it contains the execution count of the call
 and used in SamplePGO mode only as described for the call instruction. If both
-weights are specified then the second weight contains count of unwind branch
+weights are specified then the second weight contains the count of unwind branch
 taken and the first weights contains the execution count of the call minus
 the count of unwind branch taken. Both weights specified are used to calculate
 BranchProbability as for BranchInst and for SamplePGO the sum of both weights
@@ -139,7 +139,7 @@ true, in other case condition is likely to be false. For example:
 ^^^^^^^^^^^^^^^^^^^^
 
 The ``exp`` parameter is the value. The ``c`` parameter is the expected
-value. If the expected value doesn't show on the cases list, the ``default``
+value. If the expected value doesn't appear in the cases list, the ``default``
 case is assumed to be likely taken.
 
 .. code-block:: c++
@@ -159,15 +159,15 @@ Built-in ``expect.with.probability`` Instruction
 ``__builtin_expect_with_probability(long exp, long c, double probability)`` has
 the same semantics as ``__builtin_expect``, but the caller provides the
 probability that ``exp == c``. The last argument ``probability`` must be
-constant floating-point expression and be in the range [0.0, 1.0] inclusive.
+a constant floating-point expression and be in the range [0.0, 1.0] inclusive.
 The usage is also similar as ``__builtin_expect``, for example:
 
 ``if`` statement
 ^^^^^^^^^^^^^^^^
 
-If the expect comparison value ``c`` is equal to 1(true), and probability
+If the expected comparison value ``c`` is equal to 1(true), and probability
 value ``probability`` is set to 0.8, that means the probability of condition
-to be true is 80% while that of false is 20%.
+being true is 80% while that of false is 20%.
 
 .. code-block:: c++
 
@@ -178,8 +178,8 @@ to be true is 80% while that of false is 20%.
 ``switch`` statement
 ^^^^^^^^^^^^^^^^^^^^
 
-This is basically the same as ``switch`` statement in ``__builtin_expect``.
-The probability that ``exp`` is equal to the expect value is given in
+This is similar to the ``switch`` statement in ``__builtin_expect``.
+The probability that ``exp`` is equal to the expected value is given in
 the third argument ``probability``, while the probability of other value is
 the average of remaining probability(``1.0 - probability``). For example:
 
@@ -195,8 +195,8 @@ the average of remaining probability(``1.0 - probability``). For example:
 CFG Modifications
 =================
 
-Branch Weight Metatada is not proof against CFG changes. If terminator operands'
-are changed some action should be taken. In other case some misoptimizations may
+Branch Weight Metadata is not proof against CFG changes. If terminator operands'
+are changed, some action should be taken. Otherwise, misoptimizations may
 occur due to incorrect branch prediction information.
 
 Function Entry Counts
@@ -212,7 +212,7 @@ invoked (in the case of instrumentation-based profiles). In the case of
 sampling-based profiles, this operand is an approximation of how many times
 the function was invoked.
 
-For example, in the code below, the instrumentation for function foo()
+For example, in the code below, the instrumentation for function ``foo()``
 indicates that it was called 2,590 times at runtime.
 
 .. code-block:: llvm
@@ -222,12 +222,12 @@ indicates that it was called 2,590 times at runtime.
   }
   !1 = !{!"function_entry_count", i64 2590}
 
-If "function_entry_count" has more than 2 operands, the later operands are
+If "function_entry_count" has more than 2 operands, the subsequent operands are
 the GUID of the functions that needs to be imported by ThinLTO. This is only
-set by sampling based profile. It is needed because the sampling based profile
+set by sampling-based profile. It is needed because the sampling-based profile
 was collected on a binary that had already imported and inlined these functions,
 and we need to ensure the IR matches in the ThinLTO backends for profile
 annotation. The reason why we cannot annotate this on the callsite is that it
-can only goes down 1 level in the call chain. For the cases where
-foo_in_a_cc()->bar_in_b_cc()->baz_in_c_cc(), we will need to go down 2 levels
-in the call chain to import both bar_in_b_cc and baz_in_c_cc.
+can only go down 1 level in the call chain. For the cases where
+``foo_in_a_cc()->bar_in_b_cc()->baz_in_c_cc()``, we will need to go down 2 levels
+in the call chain to import both ``bar_in_b_cc`` and ``baz_in_c_cc``.

llvm/include/llvm/CodeGen/SelectionDAG.h

@@ -2350,35 +2350,35 @@ class SelectionDAG {
 
   /// If a SHL/SRA/SRL node \p V has a uniform shift amount
   /// that is less than the element bit-width of the shift node, return it.
-  LLVM_ABI std::optional<uint64_t>
+  LLVM_ABI std::optional<unsigned>
   getValidShiftAmount(SDValue V, const APInt &DemandedElts,
                       unsigned Depth = 0) const;
 
   /// If a SHL/SRA/SRL node \p V has a uniform shift amount
   /// that is less than the element bit-width of the shift node, return it.
-  LLVM_ABI std::optional<uint64_t>
+  LLVM_ABI std::optional<unsigned>
   getValidShiftAmount(SDValue V, unsigned Depth = 0) const;
 
   /// If a SHL/SRA/SRL node \p V has shift amounts that are all less than the
   /// element bit-width of the shift node, return the minimum possible value.
-  LLVM_ABI std::optional<uint64_t>
+  LLVM_ABI std::optional<unsigned>
   getValidMinimumShiftAmount(SDValue V, const APInt &DemandedElts,
                              unsigned Depth = 0) const;
 
   /// If a SHL/SRA/SRL node \p V has shift amounts that are all less than the
   /// element bit-width of the shift node, return the minimum possible value.
-  LLVM_ABI std::optional<uint64_t>
+  LLVM_ABI std::optional<unsigned>
   getValidMinimumShiftAmount(SDValue V, unsigned Depth = 0) const;
 
   /// If a SHL/SRA/SRL node \p V has shift amounts that are all less than the
   /// element bit-width of the shift node, return the maximum possible value.
-  LLVM_ABI std::optional<uint64_t>
+  LLVM_ABI std::optional<unsigned>
   getValidMaximumShiftAmount(SDValue V, const APInt &DemandedElts,
                              unsigned Depth = 0) const;
 
   /// If a SHL/SRA/SRL node \p V has shift amounts that are all less than the
   /// element bit-width of the shift node, return the maximum possible value.
-  LLVM_ABI std::optional<uint64_t>
+  LLVM_ABI std::optional<unsigned>
   getValidMaximumShiftAmount(SDValue V, unsigned Depth = 0) const;
 
   /// Match a binop + shuffle pyramid that represents a horizontal reduction

llvm/include/llvm/ProfileData/MemProfYAML.h

@@ -217,8 +217,8 @@ template <> struct MappingTraits<memprof::CallSiteInfo> {
 template <> struct MappingTraits<memprof::GUIDMemProfRecordPair> {
   static void mapping(IO &Io, memprof::GUIDMemProfRecordPair &Pair) {
     Io.mapRequired("GUID", Pair.GUID);
-    Io.mapRequired("AllocSites", Pair.Record.AllocSites);
-    Io.mapRequired("CallSites", Pair.Record.CallSites);
+    Io.mapOptional("AllocSites", Pair.Record.AllocSites);
+    Io.mapOptional("CallSites", Pair.Record.CallSites);
   }
 };
 

llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp

@@ -3299,7 +3299,7 @@ SelectionDAG::getValidShiftAmountRange(SDValue V, const APInt &DemandedElts,
   return std::nullopt;
 }
 
-std::optional<uint64_t>
+std::optional<unsigned>
 SelectionDAG::getValidShiftAmount(SDValue V, const APInt &DemandedElts,
                                   unsigned Depth) const {
   assert((V.getOpcode() == ISD::SHL || V.getOpcode() == ISD::SRL ||
@@ -3312,7 +3312,7 @@ SelectionDAG::getValidShiftAmount(SDValue V, const APInt &DemandedElts,
   return std::nullopt;
 }
 
-std::optional<uint64_t>
+std::optional<unsigned>
 SelectionDAG::getValidShiftAmount(SDValue V, unsigned Depth) const {
   EVT VT = V.getValueType();
   APInt DemandedElts = VT.isFixedLengthVector()
@@ -3321,7 +3321,7 @@ SelectionDAG::getValidShiftAmount(SDValue V, unsigned Depth) const {
   return getValidShiftAmount(V, DemandedElts, Depth);
 }
 
-std::optional<uint64_t>
+std::optional<unsigned>
 SelectionDAG::getValidMinimumShiftAmount(SDValue V, const APInt &DemandedElts,
                                          unsigned Depth) const {
   assert((V.getOpcode() == ISD::SHL || V.getOpcode() == ISD::SRL ||
@@ -3333,7 +3333,7 @@ SelectionDAG::getValidMinimumShiftAmount(SDValue V, const APInt &DemandedElts,
   return std::nullopt;
 }
 
-std::optional<uint64_t>
+std::optional<unsigned>
 SelectionDAG::getValidMinimumShiftAmount(SDValue V, unsigned Depth) const {
   EVT VT = V.getValueType();
   APInt DemandedElts = VT.isFixedLengthVector()
@@ -3342,7 +3342,7 @@ SelectionDAG::getValidMinimumShiftAmount(SDValue V, unsigned Depth) const {
   return getValidMinimumShiftAmount(V, DemandedElts, Depth);
 }
 
-std::optional<uint64_t>
+std::optional<unsigned>
 SelectionDAG::getValidMaximumShiftAmount(SDValue V, const APInt &DemandedElts,
                                          unsigned Depth) const {
   assert((V.getOpcode() == ISD::SHL || V.getOpcode() == ISD::SRL ||
@@ -3354,7 +3354,7 @@ SelectionDAG::getValidMaximumShiftAmount(SDValue V, const APInt &DemandedElts,
   return std::nullopt;
 }
 
-std::optional<uint64_t>
+std::optional<unsigned>
 SelectionDAG::getValidMaximumShiftAmount(SDValue V, unsigned Depth) const {
   EVT VT = V.getValueType();
   APInt DemandedElts = VT.isFixedLengthVector()
@@ -3828,7 +3828,7 @@ KnownBits SelectionDAG::computeKnownBits(SDValue Op, const APInt &DemandedElts,
     Known = KnownBits::shl(Known, Known2, NUW, NSW, ShAmtNonZero);
 
     // Minimum shift low bits are known zero.
-    if (std::optional<uint64_t> ShMinAmt =
+    if (std::optional<unsigned> ShMinAmt =
             getValidMinimumShiftAmount(Op, DemandedElts, Depth + 1))
       Known.Zero.setLowBits(*ShMinAmt);
     break;
@@ -3840,7 +3840,7 @@ KnownBits SelectionDAG::computeKnownBits(SDValue Op, const APInt &DemandedElts,
                             Op->getFlags().hasExact());
 
     // Minimum shift high bits are known zero.
-    if (std::optional<uint64_t> ShMinAmt =
+    if (std::optional<unsigned> ShMinAmt =
             getValidMinimumShiftAmount(Op, DemandedElts, Depth + 1))
       Known.Zero.setHighBits(*ShMinAmt);
     break;
@@ -4887,15 +4887,15 @@ unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, const APInt &DemandedElts,
   case ISD::SRA:
     Tmp = ComputeNumSignBits(Op.getOperand(0), DemandedElts, Depth + 1);
     // SRA X, C -> adds C sign bits.
-    if (std::optional<uint64_t> ShAmt =
+    if (std::optional<unsigned> ShAmt =
             getValidMinimumShiftAmount(Op, DemandedElts, Depth + 1))
-      Tmp = std::min<uint64_t>(Tmp + *ShAmt, VTBits);
+      Tmp = std::min(Tmp + *ShAmt, VTBits);
     return Tmp;
   case ISD::SHL:
     if (std::optional<ConstantRange> ShAmtRange =
             getValidShiftAmountRange(Op, DemandedElts, Depth + 1)) {
-      uint64_t MaxShAmt = ShAmtRange->getUnsignedMax().getZExtValue();
-      uint64_t MinShAmt = ShAmtRange->getUnsignedMin().getZExtValue();
+      unsigned MaxShAmt = ShAmtRange->getUnsignedMax().getZExtValue();
+      unsigned MinShAmt = ShAmtRange->getUnsignedMin().getZExtValue();
       // Try to look through ZERO/SIGN/ANY_EXTEND. If all extended bits are
       // shifted out, then we can compute the number of sign bits for the
       // operand being extended. A future improvement could be to pass along the
@@ -4906,7 +4906,7 @@ unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, const APInt &DemandedElts,
         EVT ExtVT = Ext.getValueType();
         SDValue Extendee = Ext.getOperand(0);
         EVT ExtendeeVT = Extendee.getValueType();
-        uint64_t SizeDifference =
+        unsigned SizeDifference =
             ExtVT.getScalarSizeInBits() - ExtendeeVT.getScalarSizeInBits();
         if (SizeDifference <= MinShAmt) {
           Tmp = SizeDifference +