Skip to content

Commit 9143746

Browse files
fhahnfhahn
authored
[SCEV] Try to push op into ZExt: C * zext (A + B) -> zext (A*C + B*C) (llvm#155300)
Try to push constant multiply operand into a ZExt containing an add, if possible. In general we are trying to push down ops through ZExt if possible. This is similar to llvm#151227 which did the same for additions. For now this is restricted to adds with a constant operand, which is similar to some of the logic above. This enables some additional simplifications. Alive2 Proof: https://alive2.llvm.org/ce/z/97pbSL PR: llvm#155300
1 parent a1eeb59 commit 9143746

File tree

6 files changed

+33
-20
lines changed

6 files changed

+33
-20
lines changed

‎llvm/lib/Analysis/ScalarEvolution.cpp‎

Lines changed: 15 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -3200,6 +3200,21 @@ const SCEV *ScalarEvolution::getMulExpr(SmallVectorImpl<const SCEV *> &Ops,
32003200
AddRec->getNoWrapFlags(FlagsMask));
32013201
}
32023202
}
3203+
3204+
// Try to push the constant operand into a ZExt: C * zext (A + B) ->
3205+
// zext (C*A + C*B) if trunc (C) * (A + B) does not unsigned-wrap.
3206+
const SCEVAddExpr *InnerAdd;
3207+
if (match(Ops[1], m_scev_ZExt(m_scev_Add(InnerAdd)))) {
3208+
const SCEV *NarrowC = getTruncateExpr(LHSC, InnerAdd->getType());
3209+
if (isa<SCEVConstant>(InnerAdd->getOperand(0)) &&
3210+
getZeroExtendExpr(NarrowC, Ops[1]->getType()) == LHSC &&
3211+
hasFlags(StrengthenNoWrapFlags(this, scMulExpr, {NarrowC, InnerAdd},
3212+
SCEV::FlagAnyWrap),
3213+
SCEV::FlagNUW)) {
3214+
auto *Res = getMulExpr(NarrowC, InnerAdd, SCEV::FlagNUW, Depth + 1);
3215+
return getZeroExtendExpr(Res, Ops[1]->getType(), Depth + 1);
3216+
};
3217+
}
32033218
}
32043219
}
32053220

‎llvm/test/Analysis/ScalarEvolution/max-backedge-taken-count-guard-info.ll‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1231,7 +1231,7 @@ define void @optimized_range_check_unsigned3(ptr %pred, i1 %c) {
12311231
; CHECK-NEXT: %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop ]
12321232
; CHECK-NEXT: --> {0,+,1}<nuw><nsw><%loop> U: [0,3) S: [0,3) Exits: (-1 + %N)<nsw> LoopDispositions: { %loop: Computable }
12331233
; CHECK-NEXT: %gep = getelementptr inbounds i16, ptr %pred, i32 %iv
1234-
; CHECK-NEXT: --> {%pred,+,2}<nuw><%loop> U: full-set S: full-set Exits: ((2 * (zext i32 (-1 + %N)<nsw> to i64))<nuw><nsw> + %pred) LoopDispositions: { %loop: Computable }
1234+
; CHECK-NEXT: --> {%pred,+,2}<nuw><%loop> U: full-set S: full-set Exits: ((zext i32 (-2 + (2 * %N)<nuw><nsw>)<nsw> to i64) + %pred) LoopDispositions: { %loop: Computable }
12351235
; CHECK-NEXT: %iv.next = add nuw nsw i32 %iv, 1
12361236
; CHECK-NEXT: --> {1,+,1}<nuw><nsw><%loop> U: [1,4) S: [1,4) Exits: %N LoopDispositions: { %loop: Computable }
12371237
; CHECK-NEXT: Determining loop execution counts for: @optimized_range_check_unsigned3

‎llvm/test/Transforms/IndVarSimplify/rewrite-loop-exit-values-phi.ll‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -76,18 +76,18 @@ define i64 @narow_canonical_iv_wide_multiplied_iv(i32 %x, i64 %y, ptr %0) {
7676
; CHECK-LABEL: @narow_canonical_iv_wide_multiplied_iv(
7777
; CHECK-NEXT: entry:
7878
; CHECK-NEXT: [[SMAX:%.*]] = tail call i32 @llvm.smax.i32(i32 [[X:%.*]], i32 1)
79-
; CHECK-NEXT: [[MUL_Y:%.*]] = shl i64 [[Y:%.*]], 1
8079
; CHECK-NEXT: br label [[LOOP:%.*]]
8180
; CHECK: loop:
8281
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
83-
; CHECK-NEXT: [[IV_MUL:%.*]] = phi i64 [ 1, [[ENTRY]] ], [ [[IV_MUL_NEXT:%.*]], [[LOOP]] ]
84-
; CHECK-NEXT: [[IV_MUL_NEXT]] = add i64 [[IV_MUL]], [[MUL_Y]]
8582
; CHECK-NEXT: call void @foo()
8683
; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1
8784
; CHECK-NEXT: [[EC:%.*]] = icmp ne i32 [[IV_NEXT]], [[SMAX]]
8885
; CHECK-NEXT: br i1 [[EC]], label [[LOOP]], label [[EXIT:%.*]]
8986
; CHECK: exit:
90-
; CHECK-NEXT: [[TMP6:%.*]] = phi i64 [ [[IV_MUL_NEXT]], [[LOOP]] ]
87+
; CHECK-NEXT: [[TMP1:%.*]] = zext nneg i32 [[SMAX]] to i64
88+
; CHECK-NEXT: [[TMP2:%.*]] = mul i64 [[Y:%.*]], [[TMP1]]
89+
; CHECK-NEXT: [[TMP3:%.*]] = shl i64 [[TMP2]], 1
90+
; CHECK-NEXT: [[TMP6:%.*]] = add nuw nsw i64 [[TMP3]], 1
9191
; CHECK-NEXT: ret i64 [[TMP6]]
9292
;
9393
entry:

‎llvm/test/Transforms/LoopIdiom/X86/memset-size-compute.ll‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -16,10 +16,10 @@ define void @test(ptr %ptr) {
1616
; CHECK-NEXT: [[LIM_0:%.*]] = phi i32 [ 65, [[ENTRY:%.*]] ], [ 1, [[DEAD:%.*]] ]
1717
; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[PTR:%.*]], i64 8
1818
; CHECK-NEXT: [[UMAX:%.*]] = call i32 @llvm.umax.i32(i32 [[LIM_0]], i32 2)
19-
; CHECK-NEXT: [[TMP0:%.*]] = add nsw i32 [[UMAX]], -1
19+
; CHECK-NEXT: [[TMP2:%.*]] = shl nuw nsw i32 [[UMAX]], 3
20+
; CHECK-NEXT: [[TMP0:%.*]] = add nsw i32 [[TMP2]], -8
2021
; CHECK-NEXT: [[TMP1:%.*]] = zext nneg i32 [[TMP0]] to i64
21-
; CHECK-NEXT: [[TMP2:%.*]] = shl nuw nsw i64 [[TMP1]], 3
22-
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[SCEVGEP]], i8 0, i64 [[TMP2]], i1 false)
22+
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[SCEVGEP]], i8 0, i64 [[TMP1]], i1 false)
2323
; CHECK-NEXT: br label [[FOR_BODY:%.*]]
2424
; CHECK: for.body:
2525
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[IV_NEXT:%.*]], [[FOR_BODY]] ], [ 1, [[FOR_BODY_PREHEADER]] ]

‎llvm/test/Transforms/LoopIdiom/add-nsw-zext-fold.ll‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -9,10 +9,10 @@ define void @fold_add_zext_to_sext(ptr %dst, i1 %start) {
99
; CHECK-NEXT: [[TMP0:%.*]] = zext i1 [[START]] to i64
1010
; CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 2
1111
; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP1]]
12-
; CHECK-NEXT: [[TMP2:%.*]] = sub i32 25, [[START_EXT]]
12+
; CHECK-NEXT: [[TMP4:%.*]] = shl nuw nsw i32 [[START_EXT]], 2
13+
; CHECK-NEXT: [[TMP2:%.*]] = sub i32 100, [[TMP4]]
1314
; CHECK-NEXT: [[TMP3:%.*]] = zext nneg i32 [[TMP2]] to i64
14-
; CHECK-NEXT: [[TMP4:%.*]] = shl nuw nsw i64 [[TMP3]], 2
15-
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 4 [[SCEVGEP]], i8 0, i64 [[TMP4]], i1 false)
15+
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 4 [[SCEVGEP]], i8 0, i64 [[TMP3]], i1 false)
1616
; CHECK-NEXT: br label %[[LOOP:.*]]
1717
; CHECK: [[LOOP]]:
1818
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[START_EXT]], %[[ENTRY]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]

‎llvm/test/Transforms/LoopVectorize/runtime-check.ll‎

Lines changed: 7 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -492,14 +492,12 @@ define void @test_scev_check_mul_add_expansion(ptr %out, ptr %in, i32 %len, i32
492492
; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_MEMCHECK:%.*]]
493493
; CHECK: vector.memcheck:
494494
; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[OUT:%.*]], i64 12
495-
; CHECK-NEXT: [[TMP1:%.*]] = add nsw i32 [[LEN]], -7
496-
; CHECK-NEXT: [[TMP2:%.*]] = zext nneg i32 [[TMP1]] to i64
497-
; CHECK-NEXT: [[TMP3:%.*]] = shl nuw nsw i64 [[TMP2]], 1
495+
; CHECK-NEXT: [[TMP1:%.*]] = shl nuw i32 [[LEN]], 1
496+
; CHECK-NEXT: [[TMP3:%.*]] = zext i32 [[TMP1]] to i64
498497
; CHECK-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[OUT]], i64 [[TMP3]]
499-
; CHECK-NEXT: [[SCEVGEP1:%.*]] = getelementptr i8, ptr [[TMP4]], i64 14
500498
; CHECK-NEXT: [[SCEVGEP2:%.*]] = getelementptr i8, ptr [[IN:%.*]], i64 4
501499
; CHECK-NEXT: [[BOUND0:%.*]] = icmp ult ptr [[SCEVGEP]], [[SCEVGEP2]]
502-
; CHECK-NEXT: [[BOUND1:%.*]] = icmp ult ptr [[IN]], [[SCEVGEP1]]
500+
; CHECK-NEXT: [[BOUND1:%.*]] = icmp ult ptr [[IN]], [[TMP4]]
503501
; CHECK-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]]
504502
; CHECK-NEXT: br i1 [[FOUND_CONFLICT]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]]
505503
; CHECK: vector.ph:
@@ -511,11 +509,11 @@ define void @test_scev_check_mul_add_expansion(ptr %out, ptr %in, i32 %len, i32
511509
; CHECK-NEXT: [[OFFSET_IDX:%.*]] = add i32 [[INDEX]], 6
512510
; CHECK-NEXT: [[TMP6:%.*]] = sext i32 [[OFFSET_IDX]] to i64
513511
; CHECK-NEXT: [[TMP7:%.*]] = getelementptr i16, ptr [[OUT]], i64 [[TMP6]]
514-
; CHECK-NEXT: store <4 x i16> zeroinitializer, ptr [[TMP7]], align 2, !alias.scope [[META42:![0-9]+]], !noalias [[META45:![0-9]+]]
515-
; CHECK-NEXT: store i32 0, ptr [[IN]], align 4, !alias.scope [[META45]]
512+
; CHECK-NEXT: store <4 x i16> zeroinitializer, ptr [[TMP7]], align 2, !alias.scope [[META37:![0-9]+]], !noalias [[META40:![0-9]+]]
513+
; CHECK-NEXT: store i32 0, ptr [[IN]], align 4, !alias.scope [[META40]]
516514
; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 4
517515
; CHECK-NEXT: [[TMP8:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]]
518-
; CHECK-NEXT: br i1 [[TMP8]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP47:![0-9]+]]
516+
; CHECK-NEXT: br i1 [[TMP8]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP42:![0-9]+]]
519517
; CHECK: middle.block:
520518
; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i32 [[TMP0]], [[N_VEC]]
521519
; CHECK-NEXT: br i1 [[CMP_N]], label [[EXIT:%.*]], label [[SCALAR_PH]]
@@ -530,7 +528,7 @@ define void @test_scev_check_mul_add_expansion(ptr %out, ptr %in, i32 %len, i32
530528
; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1
531529
; CHECK-NEXT: store i32 0, ptr [[IN]], align 4
532530
; CHECK-NEXT: [[CMP7_NOT:%.*]] = icmp sgt i32 [[LEN]], [[IV_NEXT]]
533-
; CHECK-NEXT: br i1 [[CMP7_NOT]], label [[LOOP]], label [[EXIT]], !llvm.loop [[LOOP48:![0-9]+]]
531+
; CHECK-NEXT: br i1 [[CMP7_NOT]], label [[LOOP]], label [[EXIT]], !llvm.loop [[LOOP43:![0-9]+]]
534532
; CHECK: exit:
535533
; CHECK-NEXT: ret void
536534
;

0 commit comments

Comments
 (0)