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ronliebronlieb
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Merge pull request #479 from AMD-Lightning-Internal/amd/dev/kzhuravl/fix-lit-test
AMDGPU: Fix CodeGen/AMDGPU/vni8-live-reg-opt.ll
2 parents 704f75d + 4230178 commit 916e676

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‎llvm/test/CodeGen/AMDGPU/vni8-live-reg-opt.ll‎

Lines changed: 16 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -27,7 +27,7 @@ define amdgpu_kernel void @v3i8_liveout(ptr addrspace(1) %src1, ptr addrspace(1)
2727
; GFX906-NEXT: ret void
2828
;
2929
; FEATURE-LABEL: define amdgpu_kernel void @v3i8_liveout(
30-
; FEATURE-SAME: ptr addrspace(1) [[SRC1:%.*]], ptr addrspace(1) [[SRC2:%.*]], ptr addrspace(1) nocapture [[DST:%.*]]) #[[ATTR0:[0-9]+]] {
30+
; FEATURE-SAME: ptr addrspace(1) [[SRC1:%.*]], ptr addrspace(1) [[SRC2:%.*]], ptr addrspace(1) captures(none) [[DST:%.*]]) #[[ATTR0:[0-9]+]] {
3131
; FEATURE-NEXT: entry:
3232
; FEATURE-NEXT: [[IDX:%.*]] = call i32 @llvm.amdgcn.workitem.id.x()
3333
; FEATURE-NEXT: [[GEP1:%.*]] = getelementptr <3 x i8>, ptr addrspace(1) [[SRC1]], i32 [[IDX]]
@@ -50,7 +50,7 @@ define amdgpu_kernel void @v3i8_liveout(ptr addrspace(1) %src1, ptr addrspace(1)
5050
; FEATURE-NEXT: ret void
5151
;
5252
; DEFAULT-LABEL: define amdgpu_kernel void @v3i8_liveout(
53-
; DEFAULT-SAME: ptr addrspace(1) [[SRC1:%.*]], ptr addrspace(1) [[SRC2:%.*]], ptr addrspace(1) nocapture [[DST:%.*]]) #[[ATTR0:[0-9]+]] {
53+
; DEFAULT-SAME: ptr addrspace(1) [[SRC1:%.*]], ptr addrspace(1) [[SRC2:%.*]], ptr addrspace(1) captures(none) [[DST:%.*]]) #[[ATTR0:[0-9]+]] {
5454
; DEFAULT-NEXT: entry:
5555
; DEFAULT-NEXT: [[IDX:%.*]] = call i32 @llvm.amdgcn.workitem.id.x()
5656
; DEFAULT-NEXT: [[GEP1:%.*]] = getelementptr <3 x i8>, ptr addrspace(1) [[SRC1]], i32 [[IDX]]
@@ -111,7 +111,7 @@ define amdgpu_kernel void @v4i8_liveout(ptr addrspace(1) %src1, ptr addrspace(1)
111111
; GFX906-NEXT: ret void
112112
;
113113
; FEATURE-LABEL: define amdgpu_kernel void @v4i8_liveout(
114-
; FEATURE-SAME: ptr addrspace(1) [[SRC1:%.*]], ptr addrspace(1) [[SRC2:%.*]], ptr addrspace(1) nocapture [[DST:%.*]]) #[[ATTR0]] {
114+
; FEATURE-SAME: ptr addrspace(1) [[SRC1:%.*]], ptr addrspace(1) [[SRC2:%.*]], ptr addrspace(1) captures(none) [[DST:%.*]]) #[[ATTR0]] {
115115
; FEATURE-NEXT: entry:
116116
; FEATURE-NEXT: [[IDX:%.*]] = call i32 @llvm.amdgcn.workitem.id.x()
117117
; FEATURE-NEXT: [[GEP1:%.*]] = getelementptr <4 x i8>, ptr addrspace(1) [[SRC1]], i32 [[IDX]]
@@ -131,7 +131,7 @@ define amdgpu_kernel void @v4i8_liveout(ptr addrspace(1) %src1, ptr addrspace(1)
131131
; FEATURE-NEXT: ret void
132132
;
133133
; DEFAULT-LABEL: define amdgpu_kernel void @v4i8_liveout(
134-
; DEFAULT-SAME: ptr addrspace(1) [[SRC1:%.*]], ptr addrspace(1) [[SRC2:%.*]], ptr addrspace(1) nocapture [[DST:%.*]]) #[[ATTR0]] {
134+
; DEFAULT-SAME: ptr addrspace(1) [[SRC1:%.*]], ptr addrspace(1) [[SRC2:%.*]], ptr addrspace(1) captures(none) [[DST:%.*]]) #[[ATTR0]] {
135135
; DEFAULT-NEXT: entry:
136136
; DEFAULT-NEXT: [[IDX:%.*]] = call i32 @llvm.amdgcn.workitem.id.x()
137137
; DEFAULT-NEXT: [[GEP1:%.*]] = getelementptr <4 x i8>, ptr addrspace(1) [[SRC1]], i32 [[IDX]]
@@ -192,7 +192,7 @@ define amdgpu_kernel void @v5i8_liveout(ptr addrspace(1) %src1, ptr addrspace(1)
192192
; GFX906-NEXT: ret void
193193
;
194194
; FEATURE-LABEL: define amdgpu_kernel void @v5i8_liveout(
195-
; FEATURE-SAME: ptr addrspace(1) [[SRC1:%.*]], ptr addrspace(1) [[SRC2:%.*]], ptr addrspace(1) nocapture [[DST:%.*]]) #[[ATTR0]] {
195+
; FEATURE-SAME: ptr addrspace(1) [[SRC1:%.*]], ptr addrspace(1) [[SRC2:%.*]], ptr addrspace(1) captures(none) [[DST:%.*]]) #[[ATTR0]] {
196196
; FEATURE-NEXT: entry:
197197
; FEATURE-NEXT: [[IDX:%.*]] = call i32 @llvm.amdgcn.workitem.id.x()
198198
; FEATURE-NEXT: [[GEP1:%.*]] = getelementptr <5 x i8>, ptr addrspace(1) [[SRC1]], i32 [[IDX]]
@@ -215,7 +215,7 @@ define amdgpu_kernel void @v5i8_liveout(ptr addrspace(1) %src1, ptr addrspace(1)
215215
; FEATURE-NEXT: ret void
216216
;
217217
; DEFAULT-LABEL: define amdgpu_kernel void @v5i8_liveout(
218-
; DEFAULT-SAME: ptr addrspace(1) [[SRC1:%.*]], ptr addrspace(1) [[SRC2:%.*]], ptr addrspace(1) nocapture [[DST:%.*]]) #[[ATTR0]] {
218+
; DEFAULT-SAME: ptr addrspace(1) [[SRC1:%.*]], ptr addrspace(1) [[SRC2:%.*]], ptr addrspace(1) captures(none) [[DST:%.*]]) #[[ATTR0]] {
219219
; DEFAULT-NEXT: entry:
220220
; DEFAULT-NEXT: [[IDX:%.*]] = call i32 @llvm.amdgcn.workitem.id.x()
221221
; DEFAULT-NEXT: [[GEP1:%.*]] = getelementptr <5 x i8>, ptr addrspace(1) [[SRC1]], i32 [[IDX]]
@@ -276,7 +276,7 @@ define amdgpu_kernel void @v8i8_liveout(ptr addrspace(1) %src1, ptr addrspace(1)
276276
; GFX906-NEXT: ret void
277277
;
278278
; FEATURE-LABEL: define amdgpu_kernel void @v8i8_liveout(
279-
; FEATURE-SAME: ptr addrspace(1) [[SRC1:%.*]], ptr addrspace(1) [[SRC2:%.*]], ptr addrspace(1) nocapture [[DST:%.*]]) #[[ATTR0]] {
279+
; FEATURE-SAME: ptr addrspace(1) [[SRC1:%.*]], ptr addrspace(1) [[SRC2:%.*]], ptr addrspace(1) captures(none) [[DST:%.*]]) #[[ATTR0]] {
280280
; FEATURE-NEXT: entry:
281281
; FEATURE-NEXT: [[IDX:%.*]] = call i32 @llvm.amdgcn.workitem.id.x()
282282
; FEATURE-NEXT: [[GEP1:%.*]] = getelementptr <8 x i8>, ptr addrspace(1) [[SRC1]], i32 [[IDX]]
@@ -296,7 +296,7 @@ define amdgpu_kernel void @v8i8_liveout(ptr addrspace(1) %src1, ptr addrspace(1)
296296
; FEATURE-NEXT: ret void
297297
;
298298
; DEFAULT-LABEL: define amdgpu_kernel void @v8i8_liveout(
299-
; DEFAULT-SAME: ptr addrspace(1) [[SRC1:%.*]], ptr addrspace(1) [[SRC2:%.*]], ptr addrspace(1) nocapture [[DST:%.*]]) #[[ATTR0]] {
299+
; DEFAULT-SAME: ptr addrspace(1) [[SRC1:%.*]], ptr addrspace(1) [[SRC2:%.*]], ptr addrspace(1) captures(none) [[DST:%.*]]) #[[ATTR0]] {
300300
; DEFAULT-NEXT: entry:
301301
; DEFAULT-NEXT: [[IDX:%.*]] = call i32 @llvm.amdgcn.workitem.id.x()
302302
; DEFAULT-NEXT: [[GEP1:%.*]] = getelementptr <8 x i8>, ptr addrspace(1) [[SRC1]], i32 [[IDX]]
@@ -359,7 +359,7 @@ define amdgpu_kernel void @repeat_successor(i32 %in, ptr addrspace(1) %src1, ptr
359359
; GFX906-NEXT: ret void
360360
;
361361
; FEATURE-LABEL: define amdgpu_kernel void @repeat_successor(
362-
; FEATURE-SAME: i32 [[IN:%.*]], ptr addrspace(1) [[SRC1:%.*]], ptr addrspace(1) [[SRC2:%.*]], ptr addrspace(1) nocapture [[DST:%.*]]) #[[ATTR0]] {
362+
; FEATURE-SAME: i32 [[IN:%.*]], ptr addrspace(1) [[SRC1:%.*]], ptr addrspace(1) [[SRC2:%.*]], ptr addrspace(1) captures(none) [[DST:%.*]]) #[[ATTR0]] {
363363
; FEATURE-NEXT: entry:
364364
; FEATURE-NEXT: [[IDX:%.*]] = call i32 @llvm.amdgcn.workitem.id.x()
365365
; FEATURE-NEXT: [[GEP1:%.*]] = getelementptr <4 x i8>, ptr addrspace(1) [[SRC1]], i32 [[IDX]]
@@ -384,7 +384,7 @@ define amdgpu_kernel void @repeat_successor(i32 %in, ptr addrspace(1) %src1, ptr
384384
; FEATURE-NEXT: ret void
385385
;
386386
; DEFAULT-LABEL: define amdgpu_kernel void @repeat_successor(
387-
; DEFAULT-SAME: i32 [[IN:%.*]], ptr addrspace(1) [[SRC1:%.*]], ptr addrspace(1) [[SRC2:%.*]], ptr addrspace(1) nocapture [[DST:%.*]]) #[[ATTR0]] {
387+
; DEFAULT-SAME: i32 [[IN:%.*]], ptr addrspace(1) [[SRC1:%.*]], ptr addrspace(1) [[SRC2:%.*]], ptr addrspace(1) captures(none) [[DST:%.*]]) #[[ATTR0]] {
388388
; DEFAULT-NEXT: entry:
389389
; DEFAULT-NEXT: [[IDX:%.*]] = call i32 @llvm.amdgcn.workitem.id.x()
390390
; DEFAULT-NEXT: [[GEP1:%.*]] = getelementptr <4 x i8>, ptr addrspace(1) [[SRC1]], i32 [[IDX]]
@@ -460,7 +460,7 @@ define amdgpu_kernel void @v8i8_phi_chain(ptr addrspace(1) %src1, ptr addrspace(
460460
; GFX906-NEXT: ret void
461461
;
462462
; FEATURE-LABEL: define amdgpu_kernel void @v8i8_phi_chain(
463-
; FEATURE-SAME: ptr addrspace(1) [[SRC1:%.*]], ptr addrspace(1) [[SRC2:%.*]], ptr addrspace(1) nocapture [[DST0:%.*]], ptr addrspace(1) nocapture [[DST1:%.*]]) #[[ATTR0]] {
463+
; FEATURE-SAME: ptr addrspace(1) [[SRC1:%.*]], ptr addrspace(1) [[SRC2:%.*]], ptr addrspace(1) captures(none) [[DST0:%.*]], ptr addrspace(1) captures(none) [[DST1:%.*]]) #[[ATTR0]] {
464464
; FEATURE-NEXT: entry:
465465
; FEATURE-NEXT: [[IDX:%.*]] = call i32 @llvm.amdgcn.workitem.id.x()
466466
; FEATURE-NEXT: [[GEP1:%.*]] = getelementptr <8 x i8>, ptr addrspace(1) [[SRC1]], i32 [[IDX]]
@@ -486,7 +486,7 @@ define amdgpu_kernel void @v8i8_phi_chain(ptr addrspace(1) %src1, ptr addrspace(
486486
; FEATURE-NEXT: ret void
487487
;
488488
; DEFAULT-LABEL: define amdgpu_kernel void @v8i8_phi_chain(
489-
; DEFAULT-SAME: ptr addrspace(1) [[SRC1:%.*]], ptr addrspace(1) [[SRC2:%.*]], ptr addrspace(1) nocapture [[DST0:%.*]], ptr addrspace(1) nocapture [[DST1:%.*]]) #[[ATTR0]] {
489+
; DEFAULT-SAME: ptr addrspace(1) [[SRC1:%.*]], ptr addrspace(1) [[SRC2:%.*]], ptr addrspace(1) captures(none) [[DST0:%.*]], ptr addrspace(1) captures(none) [[DST1:%.*]]) #[[ATTR0]] {
490490
; DEFAULT-NEXT: entry:
491491
; DEFAULT-NEXT: [[IDX:%.*]] = call i32 @llvm.amdgcn.workitem.id.x()
492492
; DEFAULT-NEXT: [[GEP1:%.*]] = getelementptr <8 x i8>, ptr addrspace(1) [[SRC1]], i32 [[IDX]]
@@ -561,7 +561,7 @@ define amdgpu_kernel void @v8i8_multi_block(ptr addrspace(1) %src1, ptr addrspac
561561
; GFX906-NEXT: ret void
562562
;
563563
; FEATURE-LABEL: define amdgpu_kernel void @v8i8_multi_block(
564-
; FEATURE-SAME: ptr addrspace(1) [[SRC1:%.*]], ptr addrspace(1) [[SRC2:%.*]], ptr addrspace(1) nocapture [[DST0:%.*]], ptr addrspace(1) nocapture [[DST1:%.*]]) #[[ATTR0]] {
564+
; FEATURE-SAME: ptr addrspace(1) [[SRC1:%.*]], ptr addrspace(1) [[SRC2:%.*]], ptr addrspace(1) captures(none) [[DST0:%.*]], ptr addrspace(1) captures(none) [[DST1:%.*]]) #[[ATTR0]] {
565565
; FEATURE-NEXT: entry:
566566
; FEATURE-NEXT: [[IDX:%.*]] = call i32 @llvm.amdgcn.workitem.id.x()
567567
; FEATURE-NEXT: [[GEP1:%.*]] = getelementptr <8 x i8>, ptr addrspace(1) [[SRC1]], i32 [[IDX]]
@@ -586,7 +586,7 @@ define amdgpu_kernel void @v8i8_multi_block(ptr addrspace(1) %src1, ptr addrspac
586586
; FEATURE-NEXT: ret void
587587
;
588588
; DEFAULT-LABEL: define amdgpu_kernel void @v8i8_multi_block(
589-
; DEFAULT-SAME: ptr addrspace(1) [[SRC1:%.*]], ptr addrspace(1) [[SRC2:%.*]], ptr addrspace(1) nocapture [[DST0:%.*]], ptr addrspace(1) nocapture [[DST1:%.*]]) #[[ATTR0]] {
589+
; DEFAULT-SAME: ptr addrspace(1) [[SRC1:%.*]], ptr addrspace(1) [[SRC2:%.*]], ptr addrspace(1) captures(none) [[DST0:%.*]], ptr addrspace(1) captures(none) [[DST1:%.*]]) #[[ATTR0]] {
590590
; DEFAULT-NEXT: entry:
591591
; DEFAULT-NEXT: [[IDX:%.*]] = call i32 @llvm.amdgcn.workitem.id.x()
592592
; DEFAULT-NEXT: [[GEP1:%.*]] = getelementptr <8 x i8>, ptr addrspace(1) [[SRC1]], i32 [[IDX]]
@@ -657,7 +657,7 @@ define amdgpu_kernel void @v32i8_loop_carried(ptr addrspace(1) %src1, ptr addrsp
657657
; GFX906-NEXT: ret void
658658
;
659659
; FEATURE-LABEL: define amdgpu_kernel void @v32i8_loop_carried(
660-
; FEATURE-SAME: ptr addrspace(1) [[SRC1:%.*]], ptr addrspace(1) [[SRC2:%.*]], ptr addrspace(1) nocapture [[DST:%.*]]) #[[ATTR0]] {
660+
; FEATURE-SAME: ptr addrspace(1) [[SRC1:%.*]], ptr addrspace(1) [[SRC2:%.*]], ptr addrspace(1) captures(none) [[DST:%.*]]) #[[ATTR0]] {
661661
; FEATURE-NEXT: entry:
662662
; FEATURE-NEXT: [[IDX:%.*]] = call i32 @llvm.amdgcn.workitem.id.x()
663663
; FEATURE-NEXT: [[GEP1:%.*]] = getelementptr <32 x i8>, ptr addrspace(1) [[SRC1]], i32 [[IDX]]
@@ -680,7 +680,7 @@ define amdgpu_kernel void @v32i8_loop_carried(ptr addrspace(1) %src1, ptr addrsp
680680
; FEATURE-NEXT: ret void
681681
;
682682
; DEFAULT-LABEL: define amdgpu_kernel void @v32i8_loop_carried(
683-
; DEFAULT-SAME: ptr addrspace(1) [[SRC1:%.*]], ptr addrspace(1) [[SRC2:%.*]], ptr addrspace(1) nocapture [[DST:%.*]]) #[[ATTR0]] {
683+
; DEFAULT-SAME: ptr addrspace(1) [[SRC1:%.*]], ptr addrspace(1) [[SRC2:%.*]], ptr addrspace(1) captures(none) [[DST:%.*]]) #[[ATTR0]] {
684684
; DEFAULT-NEXT: entry:
685685
; DEFAULT-NEXT: [[IDX:%.*]] = call i32 @llvm.amdgcn.workitem.id.x()
686686
; DEFAULT-NEXT: [[GEP1:%.*]] = getelementptr <32 x i8>, ptr addrspace(1) [[SRC1]], i32 [[IDX]]

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