merge main into amd-staging (llvm#2215)

Author: ronlieb

clang/include/clang/Sema/Overload.h

@@ -435,7 +435,8 @@ class Sema;
 
           // A function pointer type can be resolved to a member function type,
           // which is still an identity conversion.
-          if (auto *N = T->getAs<MemberPointerType>())
+          if (auto *N = T->getAs<MemberPointerType>();
+              N && N->isMemberFunctionPointer())
             T = C.getDecayedType(N->getPointeeType());
           return T;
         };

clang/lib/Basic/Diagnostic.cpp

@@ -533,24 +533,25 @@ void WarningsSpecialCaseList::processSections(DiagnosticsEngine &Diags) {
   // Drop the default section introduced by special case list, we only support
   // exact diagnostic group names.
   // FIXME: We should make this configurable in the parser instead.
-  Sections.erase("*");
+  // FIXME: C++20 can use std::erase_if(Sections, [](Section &sec) { return
+  // sec.SectionStr == "*"; });
+  llvm::erase_if(Sections, [](Section &sec) { return sec.SectionStr == "*"; });
   // Make sure we iterate sections by their line numbers.
-  std::vector<std::pair<unsigned, const llvm::StringMapEntry<Section> *>>
-      LineAndSectionEntry;
+  std::vector<std::pair<unsigned, const Section *>> LineAndSectionEntry;
   LineAndSectionEntry.reserve(Sections.size());
   for (const auto &Entry : Sections) {
-    StringRef DiagName = Entry.getKey();
+    StringRef DiagName = Entry.SectionStr;
     // Each section has a matcher with that section's name, attached to that
     // line.
-    const auto &DiagSectionMatcher = Entry.getValue().SectionMatcher;
+    const auto &DiagSectionMatcher = Entry.SectionMatcher;
     unsigned DiagLine = DiagSectionMatcher->Globs.at(DiagName).second;
     LineAndSectionEntry.emplace_back(DiagLine, &Entry);
   }
   llvm::sort(LineAndSectionEntry);
   static constexpr auto WarningFlavor = clang::diag::Flavor::WarningOrError;
   for (const auto &[_, SectionEntry] : LineAndSectionEntry) {
     SmallVector<diag::kind> GroupDiags;
-    StringRef DiagGroup = SectionEntry->getKey();
+    StringRef DiagGroup = SectionEntry->SectionStr;
     if (Diags.getDiagnosticIDs()->getDiagnosticsInGroup(
             WarningFlavor, DiagGroup, GroupDiags)) {
       StringRef Suggestion =
@@ -563,7 +564,7 @@ void WarningsSpecialCaseList::processSections(DiagnosticsEngine &Diags) {
     for (diag::kind Diag : GroupDiags)
       // We're intentionally overwriting any previous mappings here to make sure
       // latest one takes precedence.
-      DiagToSection[Diag] = &SectionEntry->getValue();
+      DiagToSection[Diag] = SectionEntry;
   }
 }
 

clang/lib/Basic/ProfileList.cpp

@@ -37,7 +37,7 @@ class ProfileSpecialCaseList : public llvm::SpecialCaseList {
 
   bool hasPrefix(StringRef Prefix) const {
     for (const auto &It : Sections)
-      if (It.second.Entries.count(Prefix) > 0)
+      if (It.Entries.count(Prefix) > 0)
         return true;
     return false;
   }

clang/lib/Basic/SanitizerSpecialCaseList.cpp

@@ -37,8 +37,7 @@ SanitizerSpecialCaseList::createOrDie(const std::vector<std::string> &Paths,
 }
 
 void SanitizerSpecialCaseList::createSanitizerSections() {
-  for (auto &It : Sections) {
-    auto &S = It.second;
+  for (auto &S : Sections) {
     SanitizerMask Mask;
 
 #define SANITIZER(NAME, ID)                                                    \

clang/test/SemaCXX/overload-resolution-deferred-templates.cpp

@@ -251,3 +251,26 @@ void f() {
   e.g(&N::f);
 }
 }
+
+#if __cplusplus >= 201402
+namespace PointerToMemData {
+struct N {
+  int field;
+};
+template <typename It, typename T>
+struct B {
+  B(It, T);
+  template <typename It2>
+  B(B<It2, T>);
+};
+template <typename T>
+struct C {
+  auto g() { return B<int, T>(0, T{}); }
+};
+void f() {
+  using T = decltype(C<decltype(&N::field)>{}.g());
+}
+
+}
+
+#endif

libc/config/linux/riscv/entrypoints.txt

@@ -370,8 +370,8 @@ set(TARGET_LIBC_ENTRYPOINTS
     libc.src.sys.uio.readv
 
     # sys/time.h entrypoints
-    # libc.src.sys.time.setitimer
-    # libc.src.sys.time.getitimer
+    libc.src.sys.time.setitimer
+    libc.src.sys.time.getitimer
 )
 
 if(LLVM_LIBC_INCLUDE_SCUDO)

libc/src/sys/time/linux/getitimer.cpp

@@ -16,8 +16,22 @@
 namespace LIBC_NAMESPACE_DECL {
 
 LLVM_LIBC_FUNCTION(int, getitimer, (int which, struct itimerval *curr_value)) {
-  long ret =
-      LIBC_NAMESPACE::syscall_impl<long>(SYS_getitimer, which, curr_value);
+  long ret = 0;
+  if constexpr (sizeof(time_t) > sizeof(long)) {
+    // There is no SYS_getitimer_time64 call, so we can't use time_t directly.
+    long curr_value32[4];
+    ret =
+        LIBC_NAMESPACE::syscall_impl<long>(SYS_getitimer, which, curr_value32);
+    if (!ret) {
+      curr_value->it_interval.tv_sec = curr_value32[0];
+      curr_value->it_interval.tv_usec = curr_value32[1];
+      curr_value->it_value.tv_sec = curr_value32[2];
+      curr_value->it_value.tv_usec = curr_value32[3];
+    }
+  } else {
+    ret = LIBC_NAMESPACE::syscall_impl<long>(SYS_getitimer, which, curr_value);
+  }
+
   // On failure, return -1 and set errno.
   if (ret < 0) {
     libc_errno = static_cast<int>(-ret);

libc/src/sys/time/linux/setitimer.cpp

@@ -17,8 +17,30 @@ namespace LIBC_NAMESPACE_DECL {
 LLVM_LIBC_FUNCTION(int, setitimer,
                    (int which, const struct itimerval *new_value,
                     struct itimerval *old_value)) {
-  long ret = LIBC_NAMESPACE::syscall_impl<long>(SYS_setitimer, which, new_value,
-                                                old_value);
+  long ret = 0;
+  if constexpr (sizeof(time_t) > sizeof(long)) {
+    // There is no SYS_setitimer_time64 call, so we can't use time_t directly,
+    // and need to convert it to long first.
+    long new_value32[4] = {static_cast<long>(new_value->it_interval.tv_sec),
+                           new_value->it_interval.tv_usec,
+                           static_cast<long>(new_value->it_value.tv_sec),
+                           new_value->it_value.tv_usec};
+    long old_value32[4];
+
+    ret = LIBC_NAMESPACE::syscall_impl<long>(SYS_setitimer, which, new_value32,
+                                             old_value32);
+
+    if (!ret && old_value) {
+      old_value->it_interval.tv_sec = old_value32[0];
+      old_value->it_interval.tv_usec = old_value32[1];
+      old_value->it_value.tv_sec = old_value32[2];
+      old_value->it_value.tv_usec = old_value32[3];
+    }
+  } else {
+    ret = LIBC_NAMESPACE::syscall_impl<long>(SYS_setitimer, which, new_value,
+                                             old_value);
+  }
+
   // On failure, return -1 and set errno.
   if (ret < 0) {
     libc_errno = static_cast<int>(-ret);

llvm/docs/AMDGPUUsage.rst

@@ -1353,7 +1353,7 @@ The AMDGPU backend implements the following LLVM IR intrinsics.
 
   llvm.amdgcn.sched.group.barrier                  Creates schedule groups with specific properties to create custom scheduling
                                                    pipelines. The ordering between groups is enforced by the instruction scheduler.
-                                                   The intrinsic applies to the code that preceeds the intrinsic. The intrinsic
+                                                   The intrinsic applies to the code that precedes the intrinsic. The intrinsic
                                                    takes three values that control the behavior of the schedule groups.
 
                                                    - Mask : Classify instruction groups using the llvm.amdgcn.sched_barrier mask values.
@@ -1670,7 +1670,7 @@ The AMDGPU backend supports the following LLVM IR attributes.
 
      "amdgpu-git-ptr-high"                            The hard-wired high half of the address of the global information table
                                                       for AMDPAL OS type. 0xffffffff represents no hard-wired high half, since
-                                                      current hardware only allows a 16 bit value.
+                                                      current hardware only allows a 16-bit value.
 
      "amdgpu-32bit-address-high-bits"                 Assumed high 32-bits for 32-bit address spaces which are really truncated
                                                       64-bit addresses (i.e., addrspace(6))
@@ -4844,7 +4844,7 @@ apertures address can be used. For GFX7-GFX8 these are available in the
 :ref:`amdgpu-amdhsa-hsa-aql-queue` the address of which can be obtained with
 Queue Ptr SGPR (see :ref:`amdgpu-amdhsa-initial-kernel-execution-state`). For
 GFX9-GFX11 the aperture base addresses are directly available as inline constant
-registers ``SRC_SHARED_BASE/LIMIT`` and ``SRC_PRIVATE_BASE/LIMIT``. In 64 bit
+registers ``SRC_SHARED_BASE/LIMIT`` and ``SRC_PRIVATE_BASE/LIMIT``. In 64-bit
 address mode the aperture sizes are 2^32 bytes and the base is aligned to 2^32
 which makes it easier to convert from flat to segment or segment to flat.
 

llvm/docs/CIBestPractices.rst

@@ -61,7 +61,7 @@ just a release, which looks like the following:
 However, it is best practice to specify an exact commit SHA from which to pull
 the action from, noting the version in a comment:
 
-We plan on revisting this reccomendation once Github's immutable actions have
+We plan on revisiting this recommendation once Github's immutable actions have
 been rolled out as GA.
 
 .. code-block:: yaml