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AArch64: Reformat some debug printing blocks (llvm#165178)
Add {} in LLVM_DEBUG for nicer clang-format handling.
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llvm/lib/Target/AArch64/AArch64FrameLowering.cpp

Lines changed: 18 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -2009,11 +2009,15 @@ bool AArch64FrameLowering::spillCalleeSavedRegisters(
20092009
}
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}
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2012-
LLVM_DEBUG(dbgs() << "CSR spill: (" << printReg(Reg1, TRI);
2013-
if (RPI.isPaired()) dbgs() << ", " << printReg(Reg2, TRI);
2014-
dbgs() << ") -> fi#(" << RPI.FrameIdx;
2015-
if (RPI.isPaired()) dbgs() << ", " << RPI.FrameIdx + 1;
2016-
dbgs() << ")\n");
2012+
LLVM_DEBUG({
2013+
dbgs() << "CSR spill: (" << printReg(Reg1, TRI);
2014+
if (RPI.isPaired())
2015+
dbgs() << ", " << printReg(Reg2, TRI);
2016+
dbgs() << ") -> fi#(" << RPI.FrameIdx;
2017+
if (RPI.isPaired())
2018+
dbgs() << ", " << RPI.FrameIdx + 1;
2019+
dbgs() << ")\n";
2020+
});
20172021

20182022
assert((!NeedsWinCFI || !(Reg1 == AArch64::LR && Reg2 == AArch64::FP)) &&
20192023
"Windows unwdinding requires a consecutive (FP,LR) pair");
@@ -2176,11 +2180,15 @@ bool AArch64FrameLowering::restoreCalleeSavedRegisters(
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case RegPairInfo::VG:
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continue;
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}
2179-
LLVM_DEBUG(dbgs() << "CSR restore: (" << printReg(Reg1, TRI);
2180-
if (RPI.isPaired()) dbgs() << ", " << printReg(Reg2, TRI);
2181-
dbgs() << ") -> fi#(" << RPI.FrameIdx;
2182-
if (RPI.isPaired()) dbgs() << ", " << RPI.FrameIdx + 1;
2183-
dbgs() << ")\n");
2183+
LLVM_DEBUG({
2184+
dbgs() << "CSR restore: (" << printReg(Reg1, TRI);
2185+
if (RPI.isPaired())
2186+
dbgs() << ", " << printReg(Reg2, TRI);
2187+
dbgs() << ") -> fi#(" << RPI.FrameIdx;
2188+
if (RPI.isPaired())
2189+
dbgs() << ", " << RPI.FrameIdx + 1;
2190+
dbgs() << ")\n";
2191+
});
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// Windows unwind codes require consecutive registers if registers are
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// paired. Make the switch here, so that the code below will save (x,x+1)

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