@@ -5128,147 +5128,6 @@ RValue CodeGenFunction::EmitBuiltinExpr(const GlobalDecl GD, unsigned BuiltinID,
51285128 ReturnValueSlot(), Args);
51295129 }
51305130
5131- case Builtin::BI__atomic_test_and_set: {
5132- // Look at the argument type to determine whether this is a volatile
5133- // operation. The parameter type is always volatile.
5134- QualType PtrTy = E->getArg(0)->IgnoreImpCasts()->getType();
5135- bool Volatile =
5136- PtrTy->castAs<PointerType>()->getPointeeType().isVolatileQualified();
5137-
5138- Address Ptr =
5139- EmitPointerWithAlignment(E->getArg(0)).withElementType(Int8Ty);
5140-
5141- Value *NewVal = Builder.getInt8(1);
5142- Value *Order = EmitScalarExpr(E->getArg(1));
5143- if (isa<llvm::ConstantInt>(Order)) {
5144- int ord = cast<llvm::ConstantInt>(Order)->getZExtValue();
5145- AtomicRMWInst *Result = nullptr;
5146- switch (ord) {
5147- case 0: // memory_order_relaxed
5148- default: // invalid order
5149- Result = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, Ptr, NewVal,
5150- llvm::AtomicOrdering::Monotonic);
5151- break;
5152- case 1: // memory_order_consume
5153- case 2: // memory_order_acquire
5154- Result = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, Ptr, NewVal,
5155- llvm::AtomicOrdering::Acquire);
5156- break;
5157- case 3: // memory_order_release
5158- Result = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, Ptr, NewVal,
5159- llvm::AtomicOrdering::Release);
5160- break;
5161- case 4: // memory_order_acq_rel
5162-
5163- Result = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, Ptr, NewVal,
5164- llvm::AtomicOrdering::AcquireRelease);
5165- break;
5166- case 5: // memory_order_seq_cst
5167- Result = Builder.CreateAtomicRMW(
5168- llvm::AtomicRMWInst::Xchg, Ptr, NewVal,
5169- llvm::AtomicOrdering::SequentiallyConsistent);
5170- break;
5171- }
5172- Result->setVolatile(Volatile);
5173- return RValue::get(Builder.CreateIsNotNull(Result, "tobool"));
5174- }
5175-
5176- llvm::BasicBlock *ContBB = createBasicBlock("atomic.continue", CurFn);
5177-
5178- llvm::BasicBlock *BBs[5] = {
5179- createBasicBlock("monotonic", CurFn),
5180- createBasicBlock("acquire", CurFn),
5181- createBasicBlock("release", CurFn),
5182- createBasicBlock("acqrel", CurFn),
5183- createBasicBlock("seqcst", CurFn)
5184- };
5185- llvm::AtomicOrdering Orders[5] = {
5186- llvm::AtomicOrdering::Monotonic, llvm::AtomicOrdering::Acquire,
5187- llvm::AtomicOrdering::Release, llvm::AtomicOrdering::AcquireRelease,
5188- llvm::AtomicOrdering::SequentiallyConsistent};
5189-
5190- Order = Builder.CreateIntCast(Order, Builder.getInt32Ty(), false);
5191- llvm::SwitchInst *SI = Builder.CreateSwitch(Order, BBs[0]);
5192-
5193- Builder.SetInsertPoint(ContBB);
5194- PHINode *Result = Builder.CreatePHI(Int8Ty, 5, "was_set");
5195-
5196- for (unsigned i = 0; i < 5; ++i) {
5197- Builder.SetInsertPoint(BBs[i]);
5198- AtomicRMWInst *RMW = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg,
5199- Ptr, NewVal, Orders[i]);
5200- RMW->setVolatile(Volatile);
5201- Result->addIncoming(RMW, BBs[i]);
5202- Builder.CreateBr(ContBB);
5203- }
5204-
5205- SI->addCase(Builder.getInt32(0), BBs[0]);
5206- SI->addCase(Builder.getInt32(1), BBs[1]);
5207- SI->addCase(Builder.getInt32(2), BBs[1]);
5208- SI->addCase(Builder.getInt32(3), BBs[2]);
5209- SI->addCase(Builder.getInt32(4), BBs[3]);
5210- SI->addCase(Builder.getInt32(5), BBs[4]);
5211-
5212- Builder.SetInsertPoint(ContBB);
5213- return RValue::get(Builder.CreateIsNotNull(Result, "tobool"));
5214- }
5215-
5216- case Builtin::BI__atomic_clear: {
5217- QualType PtrTy = E->getArg(0)->IgnoreImpCasts()->getType();
5218- bool Volatile =
5219- PtrTy->castAs<PointerType>()->getPointeeType().isVolatileQualified();
5220-
5221- Address Ptr = EmitPointerWithAlignment(E->getArg(0));
5222- Ptr = Ptr.withElementType(Int8Ty);
5223- Value *NewVal = Builder.getInt8(0);
5224- Value *Order = EmitScalarExpr(E->getArg(1));
5225- if (isa<llvm::ConstantInt>(Order)) {
5226- int ord = cast<llvm::ConstantInt>(Order)->getZExtValue();
5227- StoreInst *Store = Builder.CreateStore(NewVal, Ptr, Volatile);
5228- switch (ord) {
5229- case 0: // memory_order_relaxed
5230- default: // invalid order
5231- Store->setOrdering(llvm::AtomicOrdering::Monotonic);
5232- break;
5233- case 3: // memory_order_release
5234- Store->setOrdering(llvm::AtomicOrdering::Release);
5235- break;
5236- case 5: // memory_order_seq_cst
5237- Store->setOrdering(llvm::AtomicOrdering::SequentiallyConsistent);
5238- break;
5239- }
5240- return RValue::get(nullptr);
5241- }
5242-
5243- llvm::BasicBlock *ContBB = createBasicBlock("atomic.continue", CurFn);
5244-
5245- llvm::BasicBlock *BBs[3] = {
5246- createBasicBlock("monotonic", CurFn),
5247- createBasicBlock("release", CurFn),
5248- createBasicBlock("seqcst", CurFn)
5249- };
5250- llvm::AtomicOrdering Orders[3] = {
5251- llvm::AtomicOrdering::Monotonic, llvm::AtomicOrdering::Release,
5252- llvm::AtomicOrdering::SequentiallyConsistent};
5253-
5254- Order = Builder.CreateIntCast(Order, Builder.getInt32Ty(), false);
5255- llvm::SwitchInst *SI = Builder.CreateSwitch(Order, BBs[0]);
5256-
5257- for (unsigned i = 0; i < 3; ++i) {
5258- Builder.SetInsertPoint(BBs[i]);
5259- StoreInst *Store = Builder.CreateStore(NewVal, Ptr, Volatile);
5260- Store->setOrdering(Orders[i]);
5261- Builder.CreateBr(ContBB);
5262- }
5263-
5264- SI->addCase(Builder.getInt32(0), BBs[0]);
5265- SI->addCase(Builder.getInt32(3), BBs[1]);
5266- SI->addCase(Builder.getInt32(5), BBs[2]);
5267-
5268- Builder.SetInsertPoint(ContBB);
5269- return RValue::get(nullptr);
5270- }
5271-
52725131 case Builtin::BI__atomic_thread_fence:
52735132 case Builtin::BI__atomic_signal_fence:
52745133 case Builtin::BI__c11_atomic_thread_fence:
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