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* Adding tool pc sampling support
Fixing merge issue
tool support on SDKupdates
link amd-comgr
Sanitizer failure fix
fix format
Addressing review comments
misc fix
Adding dispatch id to the CSV output
AddingCHANGELOG
[ROCProfV3][PC Sampling] Initial ROCProfV3 PC sampling tests for JSON and CSV formats (#17)
ROCProfV3 initial tests for JSON and CSV output.
Simple kernels that simplify the verification of samples to instruction decoding
has been introduced.
removing option to enable pc sampling explicitly
Adding documentation
no pc-sampling option in tests anymore
Addressing review comments
Updating docs
an option for choosing whether all units must be sampled
try ignoring PC sampling tests (#36)
* run pc-sampling tests on MI2xx runners
* use v_fmac_f32 instead of s_nop 0 in tests
* fixing docs
help="Collect tracing data for HIP API, HSA API, Marker (ROCTx) API, RCCL API, Memory operations (copies, scratch, and allocations), and Kernel dispatches.",
Copy file name to clipboardExpand all lines: source/docs/rocprofv3-schema.json
+131-1Lines changed: 131 additions & 1 deletion
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@@ -559,6 +559,14 @@
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"required": [
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"dimension_ids"
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]
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+
},
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"pc_sample_instructions": {
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"type": "array",
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"description": "Array of decoded instructions matching sampled PCs from pc_sample_host_trap section."
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},
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"pc_sample_comments": {
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"type": "array",
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"description": "Comments matching assembly instructions from pc_sample_instructions array. If debug symbols are available, comments provide instructions to source-line mapping. Otherwise, a comment is an empty string."
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}
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}
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},
@@ -925,7 +933,129 @@
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"lds_block_size_v"
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]
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}
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-
}
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},
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"pc_sample_host_trap": {
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"type": "array",
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"description": "Host Trap PC Sampling records.",
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"items": {
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"type": "object",
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"properties": {
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"hw_id": {
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"type": "object",
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"description" : "Describes hardware part on which sampled wave was running.",
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"properties": {
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"chiplet":{
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"type": "integer",
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"description": "Chiplet index."
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},
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"wave_id ":{
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"type": "integer",
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"description": "Wave slot index."
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},
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"simd_id":{
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"type": "integer",
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"description": "SIMD index."
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},
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"pipe_id ":{
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"type": "integer",
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"description": "Pipe index."
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},
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"cu_or_wgp_id":{
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"type": "integer",
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"description": "Index of compute unit or workgroup processer."
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},
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"shader_array_id":{
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"type": "integer",
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"description": "Shader array index."
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},
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"shader_engine_id":{
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"type": "integer",
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"description": "Shader engine index."
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},
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"workgroup_id":{
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"type": "integer",
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"description": "Workgroup position in the 3D."
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},
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"vm_id":{
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"type": "integer",
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"description": "Virtual memory ID."
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},
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"queue_id":{
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"type": "integer",
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"description": "Queue id."
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},
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"microengine_id":{
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"type": "integer",
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"description": "ACE (microengine) index."
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}
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}
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},
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"pc": {
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"type": "object",
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"description": "Encapsulates information about sampled PC.",
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"properties": {
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"code_object_id":{
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"type": "integer",
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"description": "Code object id"
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},
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"code_object_offset":{
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"type": "integer",
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"description": "Offset within the object if the latter is known. Otherwise, virtual address of the PC."
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}
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}
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},
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"exec_mask":{
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"type": "integer",
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"description": "Execution mask indicating active SIMD lanes of sampled wave."
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},
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"timestamp":{
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"type": "integer",
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"description": "Timestamp."
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},
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"dispatch_id":{
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"type": "integer",
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"description": "Dispatch id."
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},
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"correlation_id": {
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"type": "object",
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"description": "Correlation ID information.",
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"properties": {
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"internal": {
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"type": "integer",
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"description": "Internal correlation ID."
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},
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"external": {
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"type": "integer",
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"description": "External correlation ID."
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}
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}
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},
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"rocprofiler_dim3_t": {
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"type": "object",
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"description": " Position of the workgroup in 3D grid.",
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"properties": {
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"x": {
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"type": "integer",
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"description": "Dimension x."
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},
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"y": {
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"type": "integer",
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"description": "Dimension y."
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},
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"z": {
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"type": "integer",
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"description": "Dimension z."
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}
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}
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},
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"wave_in_group": {
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"type": "integer",
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"description": "Wave position within the workgroup (0-31)."
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