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| 1 | +#include "third_party/amd/include/TritonAMDGPUToLLVM/AsyncUtility.h" |
| 2 | +#include "Dialect/TritonAMDGPU/IR/Dialect.h" |
| 3 | +#include "mlir/Dialect/ControlFlow/IR/ControlFlowOps.h" |
| 4 | +#include "mlir/IR/Operation.h" |
| 5 | +#include "triton/Dialect/TritonGPU/IR/Dialect.h" |
| 6 | + |
| 7 | +namespace mlir::triton::AMD { |
| 8 | + |
| 9 | +// Traverses the def-chain including control flow of the token and returns true |
| 10 | +// if all defining operations are an AsyncWait |
| 11 | +bool comesFromAsyncWait(mlir::Value token) { |
| 12 | + if (auto defOp = token.getDefiningOp()) { |
| 13 | + if (isa<triton::gpu::AsyncWaitOp>(defOp)) |
| 14 | + return true; |
| 15 | + else if (auto castOp = dyn_cast<UnrealizedConversionCastOp>(defOp)) |
| 16 | + return comesFromAsyncWait(castOp.getInputs()[0]); |
| 17 | + else |
| 18 | + return false; |
| 19 | + } |
| 20 | + |
| 21 | + auto blockArg = llvm::dyn_cast<mlir::BlockArgument>(token); |
| 22 | + // If the token has no defining op and is not an BlockArgument bail out |
| 23 | + if (!blockArg) { |
| 24 | + return false; |
| 25 | + } |
| 26 | + |
| 27 | + auto block = blockArg.getOwner(); |
| 28 | + auto argId = blockArg.getArgNumber(); |
| 29 | + |
| 30 | + auto destOperandFromAsyncWait = [argId](auto &&operands) { |
| 31 | + assert(argId < operands.size()); |
| 32 | + return comesFromAsyncWait(operands[argId]); |
| 33 | + }; |
| 34 | + |
| 35 | + // Check all predecessor block's terminator and follow the passed value at |
| 36 | + // argId to see if they are immediately an AsyncWait. |
| 37 | + for (auto *pred : block->getPredecessors()) { |
| 38 | + auto terminator = pred->getTerminator(); |
| 39 | + if (auto br = llvm::dyn_cast<cf::BranchOp>(terminator)) { |
| 40 | + if (!destOperandFromAsyncWait(br.getDestOperands())) |
| 41 | + return false; |
| 42 | + } else if (auto condBr = llvm::dyn_cast<cf::CondBranchOp>(terminator)) { |
| 43 | + if (condBr.getTrueDest() == block) { |
| 44 | + if (!destOperandFromAsyncWait(condBr.getTrueDestOperands())) |
| 45 | + return false; |
| 46 | + } |
| 47 | + if (condBr.getFalseDest() == block) { |
| 48 | + if (!destOperandFromAsyncWait(condBr.getFalseDestOperands())) |
| 49 | + return false; |
| 50 | + } |
| 51 | + } else if (auto br = llvm::dyn_cast<LLVM::BrOp>(terminator)) { |
| 52 | + if (!destOperandFromAsyncWait(br.getDestOperands())) |
| 53 | + return false; |
| 54 | + } else { |
| 55 | + llvm::dbgs() << "no terminator!" << *terminator << "\n"; |
| 56 | + return false; |
| 57 | + } |
| 58 | + } |
| 59 | + return true; |
| 60 | +} |
| 61 | + |
| 62 | +} // namespace mlir::triton::AMD |
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