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JamieTxJamieTx
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Add some bsp driver for HC32F4A8.
1 parent 8f83543 commit 00e2e1f

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24 files changed

+388
-119
lines changed

24 files changed

+388
-119
lines changed

‎bsp/hc32/ev_hc32f448_lqfp80/board/config/dac_config.h‎

Lines changed: 10 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -21,7 +21,16 @@ extern "C" {
2121
#ifndef DAC1_INIT_PARAMS
2222
#define DAC1_INIT_PARAMS \
2323
{ \
24-
.name = "dac1", \
24+
.name = "dac1", \
25+
.vref = 3300, \
26+
.dac_adp_enable = RT_FALSE, \
27+
.dac_adp_sel = DAC_ADP_SEL_ALL, \
28+
.ch1_output_enable = RT_TRUE, \
29+
.ch2_output_enable = RT_TRUE, \
30+
.ch1_data_src = DAC_DATA_SRC_DATAREG, \
31+
.ch2_data_src = DAC_DATA_SRC_DATAREG, \
32+
.ch1_amp_enable = RT_TRUE, \
33+
.ch2_amp_enable = RT_TRUE, \
2534
}
2635
#endif /* DAC1_INIT_PARAMS */
2736
#endif /* BSP_USING_DAC1 */

‎bsp/hc32/ev_hc32f448_lqfp80/settings/project.dni‎

Lines changed: 46 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,46 @@
1+
[PlDriver]
2+
MemConfigValue=$PROJ_DIR$/../libraries/hc32f448_ddl/cmsis/Device/HDSC/hc32f4xx/Source/IAR/svd/HC32F448.svd
3+
[PlCacheRanges]
4+
CustomRanges0=0 0 262144 1 2048
5+
CustomRangesText0=Flash
6+
CustomRanges1=0 50334720 1024 1 2048
7+
CustomRangesText1=OTP
8+
CustomRanges2=0 536838144 65536 0 2048
9+
CustomRangesText2=SRAM
10+
CustomRanges3=0 537853952 4096 0 2048
11+
CustomRangesText3=SRAMB
12+
CustomRanges4=0 1073741824 536870912 2 0
13+
CustomRangesText4=Peripheral
14+
CustomRanges5=0 1610612736 536870912 0 2048
15+
CustomRangesText5=EXMC SRAM
16+
CustomRanges6=0 2281701376 1024 2 1024
17+
CustomRangesText6=EXMC SRAM_REG
18+
CustomRanges7=0 2550136832 67108864 1 2048
19+
CustomRangesText7=QSPI
20+
CustomRanges8=0 2617245696 67108864 2 67108864
21+
CustomRangesText8=QSPI_REG
22+
CustomRanges9=0 3758096384 536870912 2 0
23+
CustomRangesText9=Private peripheral
24+
[Stack]
25+
FillEnabled=0
26+
OverflowWarningsEnabled=1
27+
WarningThreshold=90
28+
SpWarningsEnabled=1
29+
WarnLogOnly=1
30+
UseTrigger=1
31+
TriggerName=main
32+
LimitSize=0
33+
ByteLimit=50
34+
[Disassemble mode]
35+
mode=0
36+
[Breakpoints2]
37+
Count=0
38+
[Aliases]
39+
Count=0
40+
SuppressDialog=0
41+
[Jet]
42+
DisableInterrupts=0
43+
LeaveRunning=0
44+
MultiCoreRunAll=0
45+
[ArmDriver]
46+
EnableCache=0

‎bsp/hc32/ev_hc32f472_lqfp100/board/board_config.h‎

Lines changed: 21 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -109,6 +109,27 @@
109109
#define DAC1_CH2_PIN (GPIO_PIN_05)
110110
#endif
111111

112+
#if defined(BSP_USING_DAC2)
113+
#define DAC2_CH1_PORT (GPIO_PORT_A)
114+
#define DAC2_CH1_PIN (GPIO_PIN_06)
115+
#define DAC2_CH2_PORT (GPIO_PORT_A)
116+
#define DAC2_CH2_PIN (GPIO_PIN_07)
117+
#endif
118+
119+
#if defined(BSP_USING_DAC3)
120+
#define DAC3_CH1_PORT (GPIO_PORT_C)
121+
#define DAC3_CH1_PIN (GPIO_PIN_04)
122+
#define DAC3_CH2_PORT (GPIO_PORT_C)
123+
#define DAC3_CH2_PIN (GPIO_PIN_05)
124+
#endif
125+
126+
#if defined(BSP_USING_DAC4)
127+
#define DAC4_CH1_PORT (GPIO_PORT_E)
128+
#define DAC4_CH1_PIN (GPIO_PIN_07)
129+
#define DAC4_CH2_PORT (GPIO_PORT_E)
130+
#define DAC4_CH2_PIN (GPIO_PIN_08)
131+
#endif
132+
112133
/*********** CAN configure *********/
113134
#if defined(BSP_USING_CAN1)
114135
#define CAN1_TX_PORT (GPIO_PORT_D)

‎bsp/hc32/ev_hc32f472_lqfp100/board/config/dac_config.h‎

Lines changed: 44 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -22,7 +22,17 @@ extern "C" {
2222
#ifndef DAC1_INIT_PARAMS
2323
#define DAC1_INIT_PARAMS \
2424
{ \
25-
.name = "dac1", \
25+
.name = "dac1", \
26+
.vref = 3300, \
27+
.data_align = DAC_DATA_ALIGN_RIGHT, \
28+
.dac_adp_enable = RT_FALSE, \
29+
.dac_adp_sel = DAC_ADP_SEL_ALL, \
30+
.ch1_output_enable = RT_TRUE, \
31+
.ch2_output_enable = RT_TRUE, \
32+
.ch1_amp_enable = RT_TRUE, \
33+
.ch2_amp_enable = RT_TRUE, \
34+
.ch1_amp_gain = DAC_AMP_GAIN_1, \
35+
.ch2_amp_gain = DAC_AMP_GAIN_1, \
2636
}
2737
#endif /* DAC1_INIT_PARAMS */
2838
#endif /* BSP_USING_DAC1 */
@@ -31,7 +41,17 @@ extern "C" {
3141
#ifndef DAC2_INIT_PARAMS
3242
#define DAC2_INIT_PARAMS \
3343
{ \
34-
.name = "dac2", \
44+
.name = "dac2", \
45+
.vref = 3300, \
46+
.data_align = DAC_DATA_ALIGN_RIGHT, \
47+
.dac_adp_enable = RT_FALSE, \
48+
.dac_adp_sel = DAC_ADP_SEL_ALL, \
49+
.ch1_output_enable = RT_TRUE, \
50+
.ch2_output_enable = RT_TRUE, \
51+
.ch1_amp_enable = RT_TRUE, \
52+
.ch2_amp_enable = RT_TRUE, \
53+
.ch1_amp_gain = DAC_AMP_GAIN_1, \
54+
.ch2_amp_gain = DAC_AMP_GAIN_1, \
3555
}
3656
#endif /* DAC2_INIT_PARAMS */
3757
#endif /* BSP_USING_DAC2 */
@@ -40,7 +60,17 @@ extern "C" {
4060
#ifndef DAC3_INIT_PARAMS
4161
#define DAC3_INIT_PARAMS \
4262
{ \
43-
.name = "dac3", \
63+
.name = "dac3", \
64+
.vref = 3300, \
65+
.data_align = DAC_DATA_ALIGN_RIGHT, \
66+
.dac_adp_enable = RT_FALSE, \
67+
.dac_adp_sel = DAC_ADP_SEL_ALL, \
68+
.ch1_output_enable = RT_TRUE, \
69+
.ch2_output_enable = RT_TRUE, \
70+
.ch1_amp_enable = RT_TRUE, \
71+
.ch2_amp_enable = RT_TRUE, \
72+
.ch1_amp_gain = DAC_AMP_GAIN_1, \
73+
.ch2_amp_gain = DAC_AMP_GAIN_1, \
4474
}
4575
#endif /* DAC3_INIT_PARAMS */
4676
#endif /* BSP_USING_DAC3 */
@@ -49,7 +79,17 @@ extern "C" {
4979
#ifndef DAC4_INIT_PARAMS
5080
#define DAC4_INIT_PARAMS \
5181
{ \
52-
.name = "dac4", \
82+
.name = "dac4", \
83+
.vref = 3300, \
84+
.data_align = DAC_DATA_ALIGN_RIGHT, \
85+
.dac_adp_enable = RT_FALSE, \
86+
.dac_adp_sel = DAC_ADP_SEL_ALL, \
87+
.ch1_output_enable = RT_TRUE, \
88+
.ch2_output_enable = RT_TRUE, \
89+
.ch1_amp_enable = RT_TRUE, \
90+
.ch2_amp_enable = RT_TRUE, \
91+
.ch1_amp_gain = DAC_AMP_GAIN_1, \
92+
.ch2_amp_gain = DAC_AMP_GAIN_1, \
5393
}
5494
#endif /* DAC4_INIT_PARAMS */
5595
#endif /* BSP_USING_DAC4 */

‎bsp/hc32/ev_hc32f4a0_lqfp176/board/board_config.c‎

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -105,6 +105,13 @@ rt_err_t rt_hw_board_adc_init(CM_ADC_TypeDef *ADCx)
105105
#endif
106106

107107
#if defined(RT_USING_DAC)
108+
#if defined(BSP_USING_DAC2)
109+
void EthPhyDisable(void)
110+
{
111+
TCA9539_WritePin(ETH_RST_PORT, ETH_RST_PIN, TCA9539_PIN_RESET);
112+
TCA9539_ConfigPin(ETH_RST_PORT, ETH_RST_PIN, TCA9539_DIR_OUT);
113+
}
114+
#endif
108115
rt_err_t rt_hw_board_dac_init(CM_DAC_TypeDef *DACx)
109116
{
110117
rt_err_t result = RT_EOK;

‎bsp/hc32/ev_hc32f4a0_lqfp176/board/config/dac_config.h‎

Lines changed: 22 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -21,7 +21,17 @@ extern "C" {
2121
#ifndef DAC1_INIT_PARAMS
2222
#define DAC1_INIT_PARAMS \
2323
{ \
24-
.name = "dac1", \
24+
.name = "dac1", \
25+
.vref = 3300, \
26+
.data_align = DAC_DATA_ALIGN_RIGHT, \
27+
.dac_adp_enable = RT_FALSE, \
28+
.dac_adp_sel = DAC_ADP_SEL_ALL, \
29+
.ch1_output_enable = RT_TRUE, \
30+
.ch2_output_enable = RT_TRUE, \
31+
.ch1_data_src = DAC_DATA_SRC_DATAREG, \
32+
.ch2_data_src = DAC_DATA_SRC_DATAREG, \
33+
.ch1_amp_enable = RT_TRUE, \
34+
.ch2_amp_enable = RT_TRUE, \
2535
}
2636
#endif /* DAC1_INIT_PARAMS */
2737
#endif /* BSP_USING_DAC1 */
@@ -30,7 +40,17 @@ extern "C" {
3040
#ifndef DAC2_INIT_PARAMS
3141
#define DAC2_INIT_PARAMS \
3242
{ \
33-
.name = "dac2", \
43+
.name = "dac2", \
44+
.vref = 3300, \
45+
.data_align = DAC_DATA_ALIGN_RIGHT, \
46+
.dac_adp_enable = RT_FALSE, \
47+
.dac_adp_sel = DAC_ADP_SEL_ALL, \
48+
.ch1_output_enable = RT_TRUE, \
49+
.ch2_output_enable = RT_TRUE, \
50+
.ch1_data_src = DAC_DATA_SRC_DATAREG, \
51+
.ch2_data_src = DAC_DATA_SRC_DATAREG, \
52+
.ch1_amp_enable = RT_TRUE, \
53+
.ch2_amp_enable = RT_TRUE, \
3454
}
3555
#endif /* DAC2_INIT_PARAMS */
3656
#endif /* BSP_USING_DAC2 */

‎bsp/hc32/ev_hc32f4a0_lqfp176/board/ports/tca9539_port.h‎

Lines changed: 9 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -61,5 +61,13 @@
6161
/**
6262
* @}
6363
*/
64-
64+
/**
65+
* @defgroup BSP_ETH_PortPin_Sel BSP ETH port/pin definition
66+
* @{
67+
*/
68+
#define ETH_RST_PORT (TCA9539_IO_PORT1)
69+
#define ETH_RST_PIN (EIO_ETH_RST)
70+
/**
71+
* @}
72+
*/
6573
#endif

‎bsp/hc32/ev_hc32f4a8_lqfp176/applications/xtal32_fcm.c‎

Lines changed: 9 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -19,6 +19,7 @@
1919
#if defined(BSP_RTC_USING_XTAL32) || defined(RT_USING_PM)
2020

2121
#define XTAL32_FCM_THREAD_STACK_SIZE (1024)
22+
#define XTAL32_FCM_UNIT (CM_FCM1)
2223

2324
/**
2425
* @brief This thread is used to monitor whether XTAL32 is stable.
@@ -42,22 +43,22 @@ void xtal32_fcm_thread_entry(void *parameter)
4243
stcFcmInit.u32TargetClockDiv = FCM_TARGET_CLK_DIV1;
4344
stcFcmInit.u16LowerLimit = (uint16_t)((XTAL32_VALUE / (MRC_VALUE / 8192U)) * 96UL / 100UL);
4445
stcFcmInit.u16UpperLimit = (uint16_t)((XTAL32_VALUE / (MRC_VALUE / 8192U)) * 104UL / 100UL);
45-
(void)FCM_Init(&stcFcmInit);
46+
(void)FCM_Init(XTAL32_FCM_UNIT, &stcFcmInit);
4647
/* Enable FCM, to ensure xtal32 stable */
47-
FCM_Cmd(ENABLE);
48+
FCM_Cmd(XTAL32_FCM_UNIT, ENABLE);
4849

4950
while (1)
5051
{
51-
if (SET == FCM_GetStatus(FCM_FLAG_END))
52+
if (SET == FCM_GetStatus(XTAL32_FCM_UNIT, FCM_FLAG_END))
5253
{
53-
FCM_ClearStatus(FCM_FLAG_END);
54-
if ((SET == FCM_GetStatus(FCM_FLAG_ERR)) || (SET == FCM_GetStatus(FCM_FLAG_OVF)))
54+
FCM_ClearStatus(XTAL32_FCM_UNIT, FCM_FLAG_END);
55+
if ((SET == FCM_GetStatus(XTAL32_FCM_UNIT, FCM_FLAG_ERR)) || (SET == FCM_GetStatus(XTAL32_FCM_UNIT, FCM_FLAG_OVF)))
5556
{
56-
FCM_ClearStatus(FCM_FLAG_ERR | FCM_FLAG_OVF);
57+
FCM_ClearStatus(XTAL32_FCM_UNIT, FCM_FLAG_ERR | FCM_FLAG_OVF);
5758
}
5859
else
5960
{
60-
(void)FCM_DeInit();
61+
(void)FCM_DeInit(XTAL32_FCM_UNIT);
6162
FCG_Fcg0PeriphClockCmd(FCG0_PERIPH_FCM, DISABLE);
6263
/* XTAL32 stabled */
6364
break;
@@ -66,7 +67,7 @@ void xtal32_fcm_thread_entry(void *parameter)
6667
u32TimeOut++;
6768
if (u32TimeOut > u32Time)
6869
{
69-
(void)FCM_DeInit();
70+
(void)FCM_DeInit(XTAL32_FCM_UNIT);
7071
FCG_Fcg0PeriphClockCmd(FCG0_PERIPH_FCM, DISABLE);
7172
rt_kprintf("Error: XTAL32 still unstable, timeout.\n");
7273
break;

‎bsp/hc32/ev_hc32f4a8_lqfp176/board/Kconfig‎

Lines changed: 28 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -53,16 +53,6 @@ menu "Onboard Peripheral Drivers"
5353
config ETH_INTERFACE_USING_RMII
5454
bool "ETH Communication USING RMII"
5555
endchoice
56-
57-
menuconfig ETH_PHY_USING_INTERRUPT_MODE
58-
bool "Enable ETH PHY interrupt mode"
59-
default n
60-
if ETH_PHY_USING_INTERRUPT_MODE
61-
config ETH_PHY_INTERRUPT_PIN
62-
int "ETH PHY Interrupt pin number"
63-
range 1 176
64-
default 16
65-
endif
6656
endif
6757

6858
config BSP_USING_EXMC
@@ -142,6 +132,12 @@ menu "On-chip Peripheral Drivers"
142132
range 0 65535
143133
depends on RT_USING_SERIAL_V2
144134
default 0
135+
136+
config BSP_UART1_DMA_PING_BUFSIZE
137+
int "Set UART1 RX DMA ping-pong buffer size"
138+
range 32 65535
139+
depends on RT_USING_SERIAL_V2 && BSP_UART1_RX_USING_DMA
140+
default 64
145141
endif
146142

147143
menuconfig BSP_USING_UART2
@@ -169,6 +165,12 @@ menu "On-chip Peripheral Drivers"
169165
range 0 65535
170166
depends on RT_USING_SERIAL_V2
171167
default 256
168+
169+
config BSP_UART2_DMA_PING_BUFSIZE
170+
int "Set UART2 RX DMA ping-pong buffer size"
171+
range 32 65535
172+
depends on RT_USING_SERIAL_V2 && BSP_UART2_RX_USING_DMA
173+
default 64
172174
endif
173175

174176
menuconfig BSP_USING_UART3
@@ -247,6 +249,12 @@ menu "On-chip Peripheral Drivers"
247249
range 0 65535
248250
depends on RT_USING_SERIAL_V2
249251
default 256
252+
253+
config BSP_UART6_DMA_PING_BUFSIZE
254+
int "Set UART6 RX DMA ping-pong buffer size"
255+
range 32 65535
256+
depends on RT_USING_SERIAL_V2 && BSP_UART6_RX_USING_DMA
257+
default 64
250258
endif
251259

252260
menuconfig BSP_USING_UART7
@@ -274,8 +282,13 @@ menu "On-chip Peripheral Drivers"
274282
range 0 65535
275283
depends on RT_USING_SERIAL_V2
276284
default 256
277-
endif
278285

286+
config BSP_UART7_DMA_PING_BUFSIZE
287+
int "Set UART7 RX DMA ping-pong buffer size"
288+
range 32 65535
289+
depends on RT_USING_SERIAL_V2 && BSP_UART7_RX_USING_DMA
290+
default 64
291+
endif
279292

280293
menuconfig BSP_USING_UART8
281294
bool "Enable UART8"
@@ -600,7 +613,7 @@ menu "On-chip Peripheral Drivers"
600613
endif
601614

602615
menuconfig RT_USING_CAN_MCAN
603-
bool "Enable CAN/MAN"
616+
bool "Enable CAN/MCAN"
604617
select RT_USING_CAN
605618
select RT_CAN_USING_HDR
606619
select BSP_USING_TCA9539
@@ -664,6 +677,9 @@ menu "On-chip Peripheral Drivers"
664677

665678
config BSP_RTC_USING_LRC
666679
bool "RTC USING LRC"
680+
681+
config BSP_RTC_USING_XTAL_DIV
682+
bool "RTC Using XTAL Division"
667683
endchoice
668684
endif
669685

‎bsp/hc32/ev_hc32f4a8_lqfp176/board/board_config.c‎

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -105,6 +105,13 @@ rt_err_t rt_hw_board_adc_init(CM_ADC_TypeDef *ADCx)
105105
#endif
106106

107107
#if defined(RT_USING_DAC)
108+
#if defined(BSP_USING_DAC2)
109+
void EthPhyDisable(void)
110+
{
111+
TCA9539_WritePin(ETH_RST_PORT, ETH_RST_PIN, TCA9539_PIN_RESET);
112+
TCA9539_ConfigPin(ETH_RST_PORT, ETH_RST_PIN, TCA9539_DIR_OUT);
113+
}
114+
#endif
108115
rt_err_t rt_hw_board_dac_init(CM_DAC_TypeDef *DACx)
109116
{
110117
rt_err_t result = RT_EOK;

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