update nxp mcxa driver to support frdm-mcxa346

Author: yandld

bsp/nxp/mcx/mcxa/Libraries/drivers/drv_adc.c

@@ -14,6 +14,10 @@
 #include "fsl_lpadc.h"
 #include "fsl_spc.h"
 
+#define DBG_TAG    "drv.adc"
+#define DBG_LVL    DBG_INFO
+#include <rtdbg.h>
+
 #ifdef RT_USING_ADC
 
 #define DEFAULT_HW_AVG          (kLPADC_HardwareAverageCount4)

bsp/nxp/mcx/mcxa/Libraries/drivers/drv_i2c.c

@@ -16,16 +16,27 @@
 
 #ifdef RT_USING_I2C
 
+#define DBG_TAG    "drv.i2c"
+#define DBG_LVL    DBG_INFO
+#include <rtdbg.h>
+
 enum
 {
 #ifdef BSP_USING_I2C0
     I2C0_INDEX,
 #endif
+#ifdef BSP_USING_I2C1
+    I2C1_INDEX,
+#endif
+#ifdef BSP_USING_I2C2
+    I2C2_INDEX,
+#endif
+#ifdef BSP_USING_I2C3
+    I2C3_INDEX,
+#endif
 };
 
 
-#define i2c_dbg                 rt_kprintf
-
 struct lpc_i2c_bus
 {
     struct rt_i2c_bus_device    parent;
@@ -44,12 +55,58 @@ struct lpc_i2c_bus lpc_obj[] =
         {
             .I2C = LPI2C0,
             .baud = 100000U,
+#if (defined(CPU_MCXA346VLH) || defined(CPU_MCXA346VLL) || defined(CPU_MCXA346VLQ) || defined(CPU_MCXA346VPN))
+            .clock_attach_id = kFRO_LF_DIV_to_LPI2C0,
+#else
             .clock_attach_id = kFRO12M_to_LPI2C0,
+#endif
             .clock_div_name = kCLOCK_DivLPI2C0,
             .clock_src = kCLOCK_Fro12M,
             .name = "i2c0",
         },
 #endif
+#ifdef BSP_USING_I2C1
+        {
+            .I2C = LPI2C1,
+            .baud = 100000U,
+#if (defined(CPU_MCXA346VLH) || defined(CPU_MCXA346VLL) || defined(CPU_MCXA346VLQ) || defined(CPU_MCXA346VPN))
+            .clock_attach_id = kFRO_LF_DIV_to_LPI2C1,
+#else
+            .clock_attach_id = kFRO12M_to_LPI2C1,
+#endif
+            .clock_div_name = kCLOCK_DivLPI2C1,
+            .clock_src = kCLOCK_Fro12M,
+            .name = "i2c1",
+        },
+#endif
+#ifdef BSP_USING_I2C2
+        {
+            .I2C = LPI2C2,
+            .baud = 100000U,
+#if (defined(CPU_MCXA346VLH) || defined(CPU_MCXA346VLL) || defined(CPU_MCXA346VLQ) || defined(CPU_MCXA346VPN))
+            .clock_attach_id = kFRO_LF_DIV_to_LPI2C2,
+#else
+            .clock_attach_id = kFRO12M_to_LPI2C2,
+#endif
+            .clock_div_name = kCLOCK_DivLPI2C2,
+            .clock_src = kCLOCK_Fro12M,
+            .name = "i2c2",
+        },
+#endif
+#ifdef BSP_USING_I2C3
+        {
+            .I2C = LPI2C3,
+            .baud = 100000U,
+#if (defined(CPU_MCXA346VLH) || defined(CPU_MCXA346VLL) || defined(CPU_MCXA346VLQ) || defined(CPU_MCXA346VPN))
+            .clock_attach_id = kFRO_LF_DIV_to_LPI2C3,
+#else
+            .clock_attach_id = kFRO12M_to_LPI2C3,
+#endif
+            .clock_div_name = kCLOCK_DivLPI2C3,
+            .clock_src = kCLOCK_Fro12M,
+            .name = "i2c3",
+        },
+#endif
 };
 
 static rt_ssize_t lpc_i2c_xfer(struct rt_i2c_bus_device *bus, struct rt_i2c_msg msgs[], rt_uint32_t num)
@@ -80,7 +137,7 @@ static rt_ssize_t lpc_i2c_xfer(struct rt_i2c_bus_device *bus, struct rt_i2c_msg
 
             if (LPI2C_MasterTransferBlocking(lpc_i2c->I2C, &xfer) != kStatus_Success)
             {
-                i2c_dbg("i2c bus read failed!\n");
+                LOG_D("i2c bus read failed!\n");
                 return i;
             }
         }
@@ -99,7 +156,7 @@ static rt_ssize_t lpc_i2c_xfer(struct rt_i2c_bus_device *bus, struct rt_i2c_msg
 
             if (LPI2C_MasterTransferBlocking(lpc_i2c->I2C, &xfer) != kStatus_Success)
             {
-                i2c_dbg("i2c bus write failed!\n");
+                LOG_D("i2c bus write failed!\n");
                 return i;
             }
         }

bsp/nxp/mcx/mcxa/Libraries/drivers/drv_pin.c

@@ -17,22 +17,25 @@
 
 #ifdef RT_USING_PIN
 
+#define DBG_TAG    "drv.pin"
+#define DBG_LVL    DBG_INFO
+#include <rtdbg.h>
 
 #define GET_GPIO_PORT(x)      ((x) / 32)
 #define GET_GPIO_PIN(x)       ((x) % 32)
 
 static struct rt_pin_ops mcx_pin_ops;
 
-static GPIO_Type *GPIO_TYPE_TBL[] = {GPIO0, GPIO1, GPIO2, GPIO3};
-static PORT_Type *PORT_TYPE_TBL[] = {PORT0, PORT1, PORT2, PORT3};
-static IRQn_Type   IRQ_TYPE_TBL[] = {GPIO0_IRQn, GPIO1_IRQn, GPIO2_IRQn, GPIO3_IRQn};
+static GPIO_Type *GPIO_TYPE_TBL[] = GPIO_BASE_PTRS;
+static PORT_Type *PORT_TYPE_TBL[] = PORT_BASE_PTRS;
+static IRQn_Type   IRQ_TYPE_TBL[] = GPIO_IRQS;
 
 
 #define PIN2GPIO(x)     GPIO_TYPE_TBL[GET_GPIO_PORT(x)]
 #define PIN2PORT(x)     PORT_TYPE_TBL[GET_GPIO_PORT(x)]
 #define PIN2IRQ(x)      IRQ_TYPE_TBL[GET_GPIO_PORT(x)]
 
-struct rt_pin_irq_hdr pin_irq_hdr_tab[32*4] = {0};
+struct rt_pin_irq_hdr pin_irq_hdr_tab[32*5] = {0};
 
 static void mcx_pin_mode(rt_device_t dev, rt_base_t pin, rt_uint8_t mode)
 {
@@ -143,6 +146,11 @@ void GPIO3_IRQHandler(void)
     pin_irq_handler(3);
 }
 
+void GPIO4_IRQHandler(void)
+{
+    pin_irq_handler(4);
+}
+
 
 static rt_err_t mcx_pin_attach_irq(struct rt_device *device, rt_base_t pin, rt_uint8_t mode, void (*hdr)(void *args), void *args)
 {