[bsp][renesas] support code flash operations

Author: tomjielii

bsp/renesas/libraries/HAL_Drivers/drivers/drv_flash.c

@@ -228,7 +228,11 @@ bool calculate_block_num(int no, size_t addr, size_t size, void *erase_addr, voi
     level = rt_hw_interrupt_disable();
     R_FLASH_Reset(&g_flash_ctrl);
 
+#if BSP_FEATURE_FLASH_HP_VERSION
     fal_block_iter(&_onchip_flash_hp0, &calculate_block_num, (void *)addr, (void *)size, &block_num);
+#else
+    fal_block_iter(&_onchip_flash_lp, &calculate_block_num, (void *)addr, (void *)size, &block_num);
+#endif
 
     /* Erase Block */
 #if BSP_FEATURE_FLASH_HP_VERSION
@@ -337,6 +341,11 @@ static int fal_flash_lp_erase(long offset, size_t size)
     return _flash_lp_erase(_onchip_flash_lp.addr + offset, size);
 }
 
+void flash_callback(flash_callback_args_t * p_args)
+{
+
+}
+
 #endif
 
 #endif

bsp/renesas/ra2e2-ek/board/ports/fal_cfg.h

@@ -0,0 +1,38 @@
+/*
+ * Copyright (c) 2006-2023, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2022-07-20     Sherman      the first version
+ */
+#ifndef _FAL_CFG_H_
+#define _FAL_CFG_H_
+
+#include "hal_data.h"
+#include "rtconfig.h"
+
+extern const struct fal_flash_dev _onchip_flash_lp;
+
+#define FLASH_START_ADDRESS 0x00000000
+
+/* flash device table */
+#define FAL_FLASH_DEV_TABLE             \
+{                                       \
+    &_onchip_flash_lp,                  \
+}
+/* ====================== Partition Configuration ========================== */
+#ifdef FAL_PART_HAS_TABLE_CFG
+/** partition table, The chip flash partition is defined in "\script\memory_regions.ld".
+ * The partition start at 0x440 instead of 0 because OFS0, OFS1 and security MPU registers exist.
+ * More details can be found in the RA2E2 Group User Manual: Hardware Figure 6.1.
+ *
+ * The table is used to define flash partition by struct fal_partition in fal_def.h */
+#define FAL_PART_TABLE                                                              \
+{                                                                                   \
+    {FAL_PART_MAGIC_WROD, "app", "onchip_flash_lp", 0x440, 0x0000fbc0, 0},          \
+}
+#endif /* FAL_PART_HAS_TABLE_CFG */
+#endif /* _FAL_CFG_H_ */
+

bsp/renesas/ra2e2-ek/configuration.xml

@@ -240,9 +240,9 @@
     <symbolicName propertyId="p401.symbolic_name" value="IIC_SDA0"/>
     <symbolicName propertyId="p914.symbolic_name" value="LED2_GREEN"/>
     <pincfg active="true" name="EK-RA2E2.pincfg" selected="true" symbol="g_bsp_pin_cfg">
-      <configSetting altId="i3c0.mode.enabled.free" configurationId="i3c0.mode"/>
-      <configSetting altId="i3c0.scl0.p400" configurationId="i3c0.scl0"/>
-      <configSetting altId="i3c0.sda0.p401" configurationId="i3c0.sda0"/>
+      <configSetting altId="gpt6.mode.gtiocaorgtiocb.free" configurationId="gpt6.mode"/>
+      <configSetting altId="gpt7.mode.gtiocaorgtiocb.free" configurationId="gpt7.mode"/>
+      <configSetting altId="gpt9.mode.gtiocaorgtiocb.free" configurationId="gpt9.mode"/>
       <configSetting altId="jtag_fslash_swd.mode.swd.free" configurationId="jtag_fslash_swd.mode"/>
       <configSetting altId="jtag_fslash_swd.swclk.p300" configurationId="jtag_fslash_swd.swclk"/>
       <configSetting altId="jtag_fslash_swd.swdio.p108" configurationId="jtag_fslash_swd.swdio"/>
@@ -264,10 +264,6 @@
       <configSetting altId="p205.gpio_mode.gpio_mode_in" configurationId="p205.gpio_mode"/>
       <configSetting altId="p300.jtag_fslash_swd.swclk" configurationId="p300"/>
       <configSetting altId="p300.gpio_mode.gpio_mode_peripheral" configurationId="p300.gpio_mode"/>
-      <configSetting altId="p400.i3c0.scl0" configurationId="p400"/>
-      <configSetting altId="p400.gpio_mode.gpio_mode_peripheral" configurationId="p400.gpio_mode"/>
-      <configSetting altId="p401.i3c0.sda0" configurationId="p401"/>
-      <configSetting altId="p401.gpio_mode.gpio_mode_peripheral" configurationId="p401.gpio_mode"/>
       <configSetting altId="p914.output.low" configurationId="p914"/>
       <configSetting altId="p914.gpio_mode.gpio_mode_out.low" configurationId="p914.gpio_mode"/>
       <configSetting altId="sci9.mode.asynchronousuart.free" configurationId="sci9.mode"/>