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[bsp][renesas] initial commit for ra6e2-fpb
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.github/workflows/bsp_buildings.yml

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@@ -235,6 +235,7 @@ jobs:
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- "renesas/ra6m4-iot"
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- "renesas/ra6m3-ek"
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- "renesas/ra6m3-hmi-board"
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- "renesas/ra6e2-fpb"
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- "renesas/ra4m2-eco"
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- "renesas/ra2l1-cpk"
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- "renesas/ra8m1-ek"

bsp/renesas/libraries/HAL_Drivers/config/drv_config.h

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#endif /* SOC_SERIES_R9A07G0 */
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#if defined(SOC_SERIES_R7FA6E2)
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#include "ra6e2/uart_config.h"
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#ifdef BSP_USING_ADC
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#include "ra6e2/adc_config.h"
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#endif
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#ifdef BSP_USING_DAC
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#include "ra6e2/dac_config.h"
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#endif
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#ifdef BSP_USING_PWM
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#include "ra6e2/pwm_config.h"
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#endif
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#ifdef BSP_USING_TIM
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#include "ra6e2/timer_config.h"
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#endif
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#ifdef BSP_USING_CAN
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#include "ra6e2/can_config.h"
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#endif
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#endif /* SOC_SERIES_R7FA6E2 */
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#ifdef __cplusplus
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}
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#endif
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/*
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* Copyright (c) 2006-2024, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2021-08-19 Mr.Tiger first version
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*/
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#ifndef __ADC_CONFIG_H__
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#define __ADC_CONFIG_H__
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#include <rtthread.h>
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#include <rtdevice.h>
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#include "hal_data.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#if defined(BSP_USING_ADC0) || defined(BSP_USING_ADC1)
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struct rt_adc_dev
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{
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struct rt_adc_ops ops;
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struct rt_adc_device adc_device;
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};
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struct ra_adc_map
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{
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const char *device_name;
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const adc_cfg_t *g_cfg;
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const adc_ctrl_t *g_ctrl;
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const adc_channel_cfg_t *g_channel_cfg;
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};
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#endif
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#endif
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#ifdef __cplusplus
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}
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#endif
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/*
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* Copyright (c) 2006-2023, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2021-10-29 mazhiyuan first version
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*/
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#ifndef __CAN_CONFIG_H__
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#define __CAN_CONFIG_H__
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#include <rtthread.h>
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#include "hal_data.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#if defined(BSP_USING_CAN0)
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#ifndef CAN0_CONFIG
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#define CAN0_CONFIG \
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{ \
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.name = "can0", \
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.num_of_mailboxs = CAN_NO_OF_MAILBOXES_g_can0, \
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.p_api_ctrl = &g_can0_ctrl, \
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.p_cfg = &g_can0_cfg, \
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}
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#endif /* CAN0_CONFIG */
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#endif /* BSP_USING_CAN0 */
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#if defined(BSP_USING_CAN1)
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#ifndef CAN1_CONFIG
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#define CAN1_CONFIG \
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{ \
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.name = "can1", \
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.num_of_mailboxs = CAN_NO_OF_MAILBOXES_g_can1, \
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.p_api_ctrl = &g_can1_ctrl, \
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.p_cfg = &g_can1_cfg, \
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}
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#endif /* CAN1_CONFIG */
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#endif /* BSP_USING_CAN1 */
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#ifdef __cplusplus
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}
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#endif
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#endif
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/*
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* Copyright (c) 2006-2023, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2021-08-19 Mr.Tiger first version
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*/
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#ifndef __DAC_CONFIG_H__
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#define __DAC_CONFIG_H__
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#include <rtthread.h>
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#include <rtdevice.h>
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#include "hal_data.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#ifdef BSP_USING_DAC
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struct ra_dac_map
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{
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char name;
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const struct st_dac_cfg *g_cfg;
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const struct st_dac_instance_ctrl *g_ctrl;
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};
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struct ra_dac_dev
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{
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rt_dac_device_t ra_dac_device_t;
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struct ra_dac_map *ra_dac_map_dev;
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};
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#endif
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#endif
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#ifdef __cplusplus
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}
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#endif
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/*
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* Copyright (c) 2006-2024, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2024-03-01 Rbb666 the first version
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*/
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#ifndef __LCD_CONFIG_H_
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#define __LCD_CONFIG_H_
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typedef enum
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{
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ROTATION_ZERO = 0,
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ROTATION_090 = 90,
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ROTATION_180 = 180,
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ROTATION_270 = 270,
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} bsp_rotation;
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#define LCD_WIDTH DISPLAY_HSIZE_INPUT0
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#define LCD_HEIGHT DISPLAY_VSIZE_INPUT0
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#define LCD_BITS_PER_PIXEL DISPLAY_BITS_PER_PIXEL_INPUT1
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#define LCD_PIXEL_FORMAT RTGRAPHIC_PIXEL_FORMAT_RGB565
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#define LCD_BUF_SIZE (LCD_WIDTH * LCD_HEIGHT * LCD_BITS_PER_PIXEL / 8)
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#define ENABLE_DOUBLE_BUFFER (0)
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#define LCD_BL_PIN BSP_IO_PORT_01_PIN_00
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#endif
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/*
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* Copyright (c) 2006-2023, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2021-10-26 KevinXu first version
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*/
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#ifndef __PWM_CONFIG_H__
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#define __PWM_CONFIG_H__
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#include <rtthread.h>
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#include <drv_config.h>
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#include "hal_data.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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enum
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{
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#ifdef BSP_USING_PWM0
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BSP_PWM0_INDEX,
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#endif
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#ifdef BSP_USING_PWM1
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BSP_PWM1_INDEX,
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#endif
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#ifdef BSP_USING_PWM2
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BSP_PWM2_INDEX,
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#endif
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#ifdef BSP_USING_PWM3
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BSP_PWM3_INDEX,
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#endif
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#ifdef BSP_USING_PWM4
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BSP_PWM4_INDEX,
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#endif
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#ifdef BSP_USING_PWM5
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BSP_PWM5_INDEX,
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#endif
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#ifdef BSP_USING_PWM6
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BSP_PWM6_INDEX,
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#endif
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#ifdef BSP_USING_PWM7
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BSP_PWM7_INDEX,
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#endif
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#ifdef BSP_USING_PWM8
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BSP_PWM8_INDEX,
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#endif
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#ifdef BSP_USING_PWM9
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BSP_PWM9_INDEX,
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#endif
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BSP_PWMS_NUM
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};
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#define PWM_DRV_INITIALIZER(num) \
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{ \
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.name = "pwm"#num , \
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.g_cfg = &g_timer##num##_cfg, \
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.g_ctrl = &g_timer##num##_ctrl, \
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.g_timer = &g_timer##num, \
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}
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#ifdef __cplusplus
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}
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#endif
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#endif /* __PWM_CONFIG_H__ */
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/*
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* Copyright (c) 2006-2023, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2023-09-04 Rbb666 first version
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*/
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#ifndef __TIMER_CONFIG_H__
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#define __TIMER_CONFIG_H__
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#include <rtthread.h>
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#include <drv_config.h>
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#include "hal_data.h"
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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#define PLCKD_PRESCALER_MAX_SELECT 7
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/* RA6M3: Frequency ratio: PCLKA:PCLKD = 1:N (N = 1/2/4/8/16/32/64) */
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#define PLCKD_PRESCALER_120M (BSP_FEATURE_GPT_ODC_FREQ_MAX)
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#define PLCKD_PRESCALER_60M (BSP_FEATURE_GPT_ODC_FREQ_MAX / 2)
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#define PLCKD_PRESCALER_30M (BSP_FEATURE_GPT_ODC_FREQ_MAX / 4)
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#define PLCKD_PRESCALER_15M (BSP_FEATURE_GPT_ODC_FREQ_MAX / 8)
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#define PLCKD_PRESCALER_7_5M (BSP_FEATURE_GPT_ODC_FREQ_MAX / 16)
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#define PLCKD_PRESCALER_3_75M (BSP_FEATURE_GPT_ODC_FREQ_MAX / 32)
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#define PLCKD_PRESCALER_1_875M (BSP_FEATURE_GPT_ODC_FREQ_MAX / 64)
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#ifndef TMR_DEV_INFO_CONFIG
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#define TMR_DEV_INFO_CONFIG \
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{ \
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.maxfreq = 120000000, \
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.minfreq = 1875000, \
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.maxcnt = 0XFFFFFFFF, \
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.cntmode = HWTIMER_CNTMODE_UP, \
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}
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#endif /* TIM_DEV_INFO_CONFIG */
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enum
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{
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#ifdef BSP_USING_TIM0
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BSP_TIMER0_INDEX,
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#endif
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#ifdef BSP_USING_TIM1
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BSP_TIMER1_INDEX,
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#endif
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BSP_TIMERS_NUM
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};
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#define TIMER_DRV_INITIALIZER(num) \
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{ \
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.name = "timer" #num, \
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.g_cfg = &g_timer##num##_cfg, \
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.g_ctrl = &g_timer##num##_ctrl, \
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.g_timer = &g_timer##num, \
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}
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#ifdef __cplusplus
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}
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#endif
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#endif /* __TIMER_CONFIG_H__ */

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