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bsp: nxp/mcx/mcxa/frdm-mcxa156: Enable PORT and GPIO clocks.
Enable PORT and GPIO peripheral clocks and release resets for all ports. Signed-off-by: Yilin Sun <[email protected]>
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  • bsp/nxp/mcx/mcxa/frdm-mcxa156/board/MCUX_Config/board

1 file changed

+48
-4
lines changed

bsp/nxp/mcx/mcxa/frdm-mcxa156/board/MCUX_Config/board/pin_mux.c

Lines changed: 48 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -59,12 +59,31 @@ void BOARD_InitBootPins(void)
5959
* END ****************************************************************************************************************/
6060
void BOARD_InitPins(void)
6161
{
62-
/* PORT0: Peripheral clock is enabled */
62+
/* Enable all PORT clocks */
6363
CLOCK_EnableClock(kCLOCK_GatePORT0);
64-
/* LPUART0 peripheral is released from reset */
65-
RESET_ReleasePeripheralReset(kLPUART0_RST_SHIFT_RSTn);
66-
/* PORT0 peripheral is released from reset */
64+
CLOCK_EnableClock(kCLOCK_GatePORT1);
65+
CLOCK_EnableClock(kCLOCK_GatePORT2);
66+
CLOCK_EnableClock(kCLOCK_GatePORT3);
67+
68+
/* Enable all GPIO clocks */
69+
CLOCK_EnableClock(kCLOCK_GateGPIO0);
70+
CLOCK_EnableClock(kCLOCK_GateGPIO1);
71+
CLOCK_EnableClock(kCLOCK_GateGPIO2);
72+
CLOCK_EnableClock(kCLOCK_GateGPIO3);
73+
74+
/* Release all PORT resets */
6775
RESET_ReleasePeripheralReset(kPORT0_RST_SHIFT_RSTn);
76+
RESET_ReleasePeripheralReset(kPORT1_RST_SHIFT_RSTn);
77+
RESET_ReleasePeripheralReset(kPORT2_RST_SHIFT_RSTn);
78+
RESET_ReleasePeripheralReset(kPORT3_RST_SHIFT_RSTn);
79+
80+
RESET_ReleasePeripheralReset(kGPIO0_RST_SHIFT_RSTn);
81+
RESET_ReleasePeripheralReset(kGPIO1_RST_SHIFT_RSTn);
82+
RESET_ReleasePeripheralReset(kGPIO2_RST_SHIFT_RSTn);
83+
RESET_ReleasePeripheralReset(kGPIO3_RST_SHIFT_RSTn);
84+
85+
/* Release LPUART0 resets */
86+
RESET_ReleasePeripheralReset(kLPUART0_RST_SHIFT_RSTn);
6887

6988
const port_pin_config_t port0_2_pin78_config = {/* Internal pull-up resistor is enabled */
7089
kPORT_PullUp,
@@ -115,6 +134,31 @@ void BOARD_InitPins(void)
115134
kPORT_UnlockRegister};
116135
/* PORT0_3 (pin 79) is configured as LPUART0_TXD */
117136
PORT_SetPinConfig(PORT0, 3U, &port0_3_pin79_config);
137+
138+
const port_pin_config_t port3_12_pin63_config = {/* Internal pull-up resistor is enabled */
139+
kPORT_PullDisable,
140+
/* Low internal pull resistor value is selected. */
141+
kPORT_LowPullResistor,
142+
/* Fast slew rate is configured */
143+
kPORT_FastSlewRate,
144+
/* Passive input filter is disabled */
145+
kPORT_PassiveFilterDisable,
146+
/* Open drain output is disabled */
147+
kPORT_OpenDrainEnable,
148+
/* Low drive strength is configured */
149+
kPORT_LowDriveStrength,
150+
/* Normal drive strength is configured */
151+
kPORT_NormalDriveStrength,
152+
/* Pin is configured as LPUART0_TXD */
153+
kPORT_MuxAsGpio,
154+
/* Digital input enabled */
155+
kPORT_InputBufferEnable,
156+
/* Digital input is not inverted */
157+
kPORT_InputNormal,
158+
/* Pin Control Register fields [15:0] are not locked */
159+
kPORT_UnlockRegister};
160+
/* PORT3_12 (pin 63) is configured as LED_RED */
161+
PORT_SetPinConfig(PORT3, 12U, &port3_12_pin63_config);
118162
}
119163
/***********************************************************************************************************************
120164
* EOF

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