1818
1919#if defined(SOC_XMC7200D_E272K8384AA )
2020#define __IFX_PORT_MAX 35u
21+ #elif defined(SOC_XMC7100D_F144K4160AA )
22+ #define __IFX_PORT_MAX 33u
2123#else
2224#define __IFX_PORT_MAX 14u
2325#endif
@@ -57,7 +59,8 @@ static struct pin_irq_map pin_irq_map[] =
5759 {CYHAL_PORT_19 , ioss_interrupts_gpio_19_IRQn },
5860 {CYHAL_PORT_20 , ioss_interrupts_gpio_20_IRQn },
5961 {CYHAL_PORT_21 , ioss_interrupts_gpio_21_IRQn },
60- {CYHAL_PORT_22 , ioss_interrupts_gpio_23_IRQn },
62+ {CYHAL_PORT_22 , ioss_interrupts_gpio_22_IRQn },
63+ {CYHAL_PORT_23 , ioss_interrupts_gpio_23_IRQn },
6164 {CYHAL_PORT_24 , ioss_interrupts_gpio_24_IRQn },
6265 {CYHAL_PORT_25 , ioss_interrupts_gpio_25_IRQn },
6366 {CYHAL_PORT_26 , ioss_interrupts_gpio_26_IRQn },
@@ -70,6 +73,26 @@ static struct pin_irq_map pin_irq_map[] =
7073 {CYHAL_PORT_33 , ioss_interrupts_gpio_33_IRQn },
7174 {CYHAL_PORT_34 , ioss_interrupts_gpio_34_IRQn },
7275#endif
76+ #if defined(SOC_XMC7100D_F144K4160AA )
77+ {CYHAL_PORT_15 , ioss_interrupts_gpio_15_IRQn },
78+ {CYHAL_PORT_16 , ioss_interrupts_gpio_16_IRQn },
79+ {CYHAL_PORT_17 , ioss_interrupts_gpio_17_IRQn },
80+ {CYHAL_PORT_18 , ioss_interrupts_gpio_18_IRQn },
81+ {CYHAL_PORT_19 , ioss_interrupts_gpio_19_IRQn },
82+ {CYHAL_PORT_20 , ioss_interrupts_gpio_20_IRQn },
83+ {CYHAL_PORT_21 , ioss_interrupts_gpio_21_IRQn },
84+ {CYHAL_PORT_22 , ioss_interrupts_gpio_22_IRQn },
85+ {CYHAL_PORT_23 , ioss_interrupts_gpio_23_IRQn },
86+ {CYHAL_PORT_24 , ioss_interrupts_gpio_24_IRQn },
87+ {CYHAL_PORT_25 , ioss_interrupts_gpio_25_IRQn },
88+ {CYHAL_PORT_26 , ioss_interrupts_gpio_26_IRQn },
89+ {CYHAL_PORT_27 , ioss_interrupts_gpio_27_IRQn },
90+ {CYHAL_PORT_28 , ioss_interrupts_gpio_28_IRQn },
91+ {CYHAL_PORT_29 , ioss_interrupts_gpio_29_IRQn },
92+ {CYHAL_PORT_30 , ioss_interrupts_gpio_30_IRQn },
93+ {CYHAL_PORT_31 , ioss_interrupts_gpio_31_IRQn },
94+ {CYHAL_PORT_32 , ioss_interrupts_gpio_32_IRQn },
95+ #endif
7396};
7497
7598static struct rt_pin_irq_hdr pin_irq_handler_tab [] =
@@ -111,6 +134,25 @@ static struct rt_pin_irq_hdr pin_irq_handler_tab[] =
111134 {-1 , 0 , RT_NULL , RT_NULL },
112135 {-1 , 0 , RT_NULL , RT_NULL },
113136#endif
137+ #if defined(SOC_XMC7100D_F144K4160AA )
138+ {-1 , 0 , RT_NULL , RT_NULL },
139+ {-1 , 0 , RT_NULL , RT_NULL },
140+ {-1 , 0 , RT_NULL , RT_NULL },
141+ {-1 , 0 , RT_NULL , RT_NULL },
142+ {-1 , 0 , RT_NULL , RT_NULL },
143+ {-1 , 0 , RT_NULL , RT_NULL },
144+ {-1 , 0 , RT_NULL , RT_NULL },
145+ {-1 , 0 , RT_NULL , RT_NULL },
146+ {-1 , 0 , RT_NULL , RT_NULL },
147+ {-1 , 0 , RT_NULL , RT_NULL },
148+ {-1 , 0 , RT_NULL , RT_NULL },
149+ {-1 , 0 , RT_NULL , RT_NULL },
150+ {-1 , 0 , RT_NULL , RT_NULL },
151+ {-1 , 0 , RT_NULL , RT_NULL },
152+ {-1 , 0 , RT_NULL , RT_NULL },
153+ {-1 , 0 , RT_NULL , RT_NULL },
154+ {-1 , 0 , RT_NULL , RT_NULL },
155+ #endif
114156};
115157
116158rt_inline void pin_irq_handler (int irqno )
@@ -320,7 +362,7 @@ static rt_err_t ifx_pin_irq_enable(struct rt_device *device, rt_base_t pin,
320362
321363 irqmap = & pin_irq_map [gpio_port ];
322364
323- #if !defined(COMPONENT_CAT1C )
365+ #if !defined(COMPONENT_CAT1C )|| defined( SOC_XMC7100D_F144K4160AA )
324366 IRQn_Type irqn = irqmap -> irqno ;
325367 irq_cb_data [irqn ].callback = irq_callback ;
326368 irq_cb_data [irqn ].callback_arg = (rt_uint16_t * )& pin_irq_map [gpio_port ].port ;
@@ -356,7 +398,7 @@ static rt_err_t ifx_pin_irq_enable(struct rt_device *device, rt_base_t pin,
356398
357399 irqmap = & pin_irq_map [gpio_port ];
358400
359- #if !defined(COMPONENT_CAT1C )
401+ #if !defined(COMPONENT_CAT1C )|| defined( SOC_XMC7100D_F144K4160AA )
360402 IRQn_Type irqn = irqmap -> irqno ;
361403 if (irqn < 0 || irqn >= PIN_IFXPORT_MAX )
362404 {
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