1919
2020#define RMII
2121
22- #define Gmac_base (0x9000000000000000 | 0x40040000 )
22+ #define PCI_BASE (0xFE00001800 )
2323#define Buffer_Size 2048
2424#define MAX_ADDR_LEN 6
2525#define NAMESIZE 16
2929
3030#define DEFAULT_MAC_ADDRESS {0x00, 0x55, 0x7B, 0xB5, 0x7D, 0xF7}
3131
32- u64 regbase = 0x9000000000000000 | 0x40040000 ;
32+ u64 gmac_base = 0 ;
3333static u32 GMAC_Power_down ;
3434extern void * plat_alloc_consistent_dmaable_memory (synopGMACdevice * pcidev , u32 size , u32 * addr ) ;
3535extern s32 synopGMAC_check_phy_init (synopGMACPciNetworkAdapter * adapter ) ;
@@ -40,6 +40,32 @@ void eth_rx_irq(int irqno, void *param);
4040static char Rx_Buffer [Buffer_Size ];
4141static char Tx_Buffer [Buffer_Size ];
4242
43+ struct pci_header
44+ {
45+ uint16_t VendorID ;
46+ uint16_t DeviceID ;
47+ uint16_t Command ;
48+ uint16_t Status ;
49+ uint32_t RevisionID : 8 ;
50+ uint32_t ClassCode : 24 ;
51+ uint8_t CachelineSize ;
52+ uint8_t LatencyTimer ;
53+ uint8_t HeaderType ;
54+ uint8_t BIST ;
55+ uint32_t BaseAddressRegister [6 ];
56+ uint32_t CardbusCISPointer ;
57+ uint16_t SubsystemVendorID ;
58+ uint16_t SubsystemID ;
59+ uint32_t ExpansionROMBaseAddress ;
60+ uint32_t CapabilitiesPointer : 8 ;
61+ uint32_t resv1 : 24 ;
62+ uint32_t resv2 ;
63+ uint8_t InterruptLine ;
64+ uint8_t InterruptPin ;
65+ uint8_t Min_Gnt ;
66+ uint8_t Max_Lat ;
67+ };
68+
4369struct rt_eth_dev
4470{
4571 struct eth_device parent ;
@@ -203,7 +229,6 @@ void synopGMAC_linux_cable_unplug_function(void *adaptr)
203229 synopGMACdevice * gmacdev = adapter -> synopGMACdev ;
204230 struct ethtool_cmd cmd ;
205231
206- //rt_kprintf("%s\n",__FUNCTION__);
207232 if (!mii_link_ok (& adapter -> mii ))
208233 {
209234 if (gmacdev -> LinkState )
@@ -287,7 +312,7 @@ static rt_err_t eth_init(rt_device_t device)
287312 synopGMACdevice * gmacdev = (synopGMACdevice * )adapter -> synopGMACdev ;
288313
289314 synopGMAC_reset (gmacdev );
290- synopGMAC_attach (gmacdev , (regbase + MACBASE ), (regbase + DMABASE ), DEFAULT_PHY_BASE , macaddr );
315+ synopGMAC_attach (gmacdev , (gmac_base + MACBASE ), (gmac_base + DMABASE ), DEFAULT_PHY_BASE , macaddr );
291316
292317 synopGMAC_read_version (gmacdev );
293318
@@ -889,7 +914,9 @@ void eth_rx_irq(int irqno, void *param)
889914
890915int rt_hw_eth_init (void )
891916{
892- u64 base_addr = Gmac_base ;
917+ struct pci_header * p = (struct pci_header * )(0x9000000000000000 | PCI_BASE );
918+ gmac_base = (0x9000000000000000 | ((p -> BaseAddressRegister [0 ]) & 0xffffff00 ));
919+
893920 struct synopGMACNetworkAdapter * synopGMACadapter ;
894921 static u8 mac_addr0 [6 ] = DEFAULT_MAC_ADDRESS ;
895922 int index ;
@@ -918,7 +945,7 @@ int rt_hw_eth_init(void)
918945 * Attach the device to MAC struct This will configure all the required base addresses
919946 * such as Mac base, configuration base, phy base address(out of 32 possible phys)
920947 * */
921- synopGMAC_attach (synopGMACadapter -> synopGMACdev , (regbase + MACBASE ), regbase + DMABASE , DEFAULT_PHY_BASE , mac_addr0 );
948+ synopGMAC_attach (synopGMACadapter -> synopGMACdev , (gmac_base + MACBASE ), gmac_base + DMABASE , DEFAULT_PHY_BASE , mac_addr0 );
922949
923950 init_phy (synopGMACadapter -> synopGMACdev );
924951 synopGMAC_reset (synopGMACadapter -> synopGMACdev );
@@ -932,7 +959,7 @@ int rt_hw_eth_init(void)
932959 synopGMACadapter -> mii .phy_id = synopGMACadapter -> synopGMACdev -> PhyBase ;
933960 synopGMACadapter -> mii .supports_gmii = mii_check_gmii_support (& synopGMACadapter -> mii );
934961
935- eth_dev .iobase = base_addr ;
962+ eth_dev .iobase = gmac_base ;
936963 eth_dev .name = "e0" ;
937964 eth_dev .priv = synopGMACadapter ;
938965 eth_dev .dev_addr [0 ] = mac_addr0 [0 ];
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