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kurisaWRbb666
kurisaW
authored and
Rbb666
committed
[libcpu][component] fixed the r52 kernel gcc context switch assembly
1 parent 1572a44 commit 2241f46

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2 files changed

+118
-120
lines changed

2 files changed

+118
-120
lines changed

‎components/dfs/dfs_v1/filesystems/ramfs/dfs_ramfs.c‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -92,7 +92,7 @@ struct ramfs_dirent *dfs_ramfs_lookup(struct dfs_ramfs *ramfs,
9292
return NULL;
9393
}
9494

95-
int dfs_ramfs_read(struct dfs_file *file, void *buf, size_t count)
95+
ssize_t dfs_ramfs_read(struct dfs_file *file, void *buf, size_t count)
9696
{
9797
rt_size_t length;
9898
struct ramfs_dirent *dirent;
@@ -114,7 +114,7 @@ int dfs_ramfs_read(struct dfs_file *file, void *buf, size_t count)
114114
return length;
115115
}
116116

117-
int dfs_ramfs_write(struct dfs_file *fd, const void *buf, size_t count)
117+
ssize_t dfs_ramfs_write(struct dfs_file *fd, const void *buf, size_t count)
118118
{
119119
struct ramfs_dirent *dirent;
120120
struct dfs_ramfs *ramfs;
@@ -151,7 +151,7 @@ int dfs_ramfs_write(struct dfs_file *fd, const void *buf, size_t count)
151151
return count;
152152
}
153153

154-
int dfs_ramfs_lseek(struct dfs_file *file, off_t offset)
154+
off_t dfs_ramfs_lseek(struct dfs_file *file, off_t offset)
155155
{
156156
if (offset <= (off_t)file->vnode->size)
157157
{

‎libcpu/arm/cortex-r52/context_gcc.S‎

Lines changed: 115 additions & 117 deletions
Original file line numberDiff line numberDiff line change
@@ -8,116 +8,113 @@
88
* 2024-03-01 Wangyuqiang first version
99
*/
1010

11-
/**
12-
* @addtogroup cortex-r52
13-
*/
14-
/*@{*/
15-
16-
//#include <rtconfig.h>
11+
#include "rtconfig.h"
12+
.syntax unified
13+
.text
1714

18-
.text
19-
.arm
20-
.globl rt_thread_switch_interrupt_flag
21-
.globl rt_interrupt_from_thread
22-
.globl rt_interrupt_to_thread
23-
.globl rt_interrupt_enter
24-
.globl rt_interrupt_leave
25-
.globl rt_hw_trap_irq
15+
.globl rt_thread_switch_interrupt_flag
16+
.globl rt_interrupt_from_thread
17+
.globl rt_interrupt_to_thread
18+
.globl rt_interrupt_enter
19+
.globl rt_interrupt_leave
20+
.globl rt_hw_trap_irq
2621

2722
/*
28-
* rt_base_t rt_hw_interrupt_disable()
23+
* rt_base_t rt_hw_interrupt_disable();
2924
*/
30-
.globl rt_hw_interrupt_disable
25+
.globl rt_hw_interrupt_disable
3126
rt_hw_interrupt_disable:
32-
MRS r0, cpsr
33-
CPSID IF
34-
BX lr
27+
mrs r0, cpsr
28+
cpsid i
29+
bx lr
3530

3631
/*
37-
* void rt_hw_interrupt_enable(rt_base_t level)
32+
* void rt_hw_interrupt_enable(rt_base_t level);
3833
*/
39-
.globl rt_hw_interrupt_enable
34+
.globl rt_hw_interrupt_enable
4035
rt_hw_interrupt_enable:
41-
MSR cpsr_c, r0
42-
BX lr
36+
msr cpsr, r0
37+
bx lr
4338

4439
/*
4540
* void rt_hw_context_switch(rt_uint32 from, rt_uint32 to)
4641
* r0 --> from
4742
* r1 --> to
4843
*/
49-
.globl rt_hw_context_switch
44+
.globl rt_hw_context_switch
5045
rt_hw_context_switch:
51-
STMDB sp!, {lr} @ push pc (lr should be pushed in place of PC)
52-
STMDB sp!, {r0-r12, lr} @ push lr & register file
53-
54-
MRS r4, cpsr
55-
TST lr, #0x01
56-
ORRNE r4, r4, #0x20 @ it's thumb code
57-
58-
STMDB sp!, {r4} @ push cpsr
59-
60-
#if defined (__VFP_FP__) && !defined(__SOFTFP__) && defined(RT_VFP_LAZY_STACKING)
61-
VMRS r4, fpexc
62-
TST r4, #0x40000000
63-
BEQ __no_vfp_frame1
64-
VSTMDB sp!, {d0-d15}
65-
VMRS r5, fpscr
66-
@ TODO: add support for Common VFPv3.
67-
@ Save registers like FPINST, FPINST2
68-
STMDB sp!, {r5}
46+
clrex
47+
stmfd sp!, {lr} @ push pc (lr should be pushed in place of PC)
48+
stmfd sp!, {r0-r12, lr} @ push lr & register file
49+
50+
mrs r4, cpsr
51+
tst lr, #0x01
52+
orrne r4, r4, #0x20 @ it's thumb code
53+
54+
stmfd sp!, {r4} @ push cpsr
55+
56+
#ifdef RT_USING_FPU
57+
/* fpu context */
58+
vmrs r6, fpexc
59+
tst r6, #(1<<30)
60+
beq __no_vfp_frame1
61+
vstmdb sp!, {d0-d15}
62+
vstmdb sp!, {d16-d31}
63+
vmrs r5, fpscr
64+
stmfd sp!, {r5}
6965
__no_vfp_frame1:
70-
STMDB sp!, {r4}
66+
stmfd sp!, {r6}
7167
#endif
72-
73-
STR sp, [r0] @ store sp in preempted tasks TCB
74-
LDR sp, [r1] @ get new task stack pointer
75-
76-
#if defined (__VFP_FP__) && !defined(__SOFTFP__) && defined(RT_VFP_LAZY_STACKING)
77-
LDMIA sp!, {r0} @ get fpexc
78-
VMSR fpexc, r0 @ restore fpexc
79-
TST r0, #0x40000000
80-
BEQ __no_vfp_frame2
81-
LDMIA sp!, {r1} @ get fpscr
82-
VMSR fpscr, r1
83-
VLDMIA sp!, {d0-d15}
68+
str sp, [r0] @ store sp in preempted tasks TCB
69+
ldr sp, [r1] @ get new task stack pointer
70+
71+
#ifdef RT_USING_FPU
72+
/* fpu context */
73+
ldmfd sp!, {r6}
74+
vmsr fpexc, r6
75+
tst r6, #(1<<30)
76+
beq __no_vfp_frame2
77+
ldmfd sp!, {r5}
78+
vmsr fpscr, r5
79+
vldmia sp!, {d16-d31}
80+
vldmia sp!, {d0-d15}
8481
__no_vfp_frame2:
85-
#endif
82+
#endif
8683

87-
LDMIA sp!, {r4} @ pop new task cpsr to spsr
88-
MSR spsr_cxsf, r4
84+
ldmfd sp!, {r1}
85+
msr spsr_cxsf, r1 /* original mode */
8986

90-
LDMIA sp!, {r0-r12, lr, pc}^ @ pop new task r0-r12, lr & pc, copy spsr to cpsr
87+
ldmfd sp!, {r0-r12,lr,pc}^ /* irq return */
9188

9289
/*
9390
* void rt_hw_context_switch_to(rt_uint32 to)
9491
* r0 --> to
9592
*/
96-
.globl rt_hw_context_switch_to
93+
.globl rt_hw_context_switch_to
9794
rt_hw_context_switch_to:
9895
LDR sp, [r0] @ get new task stack pointer
9996

100-
#if defined (__VFP_FP__) && !defined(__SOFTFP__) && defined(RT_VFP_LAZY_STACKING)
101-
LDMIA sp!, {r0} @ get fpexc
102-
VMSR fpexc, r0
103-
TST r0, #0x40000000
104-
BEQ __no_vfp_frame_to
105-
LDMIA sp!, {r1} @ get fpscr
106-
VMSR fpscr, r1
107-
VLDMIA sp!, {d0-d15}
97+
#ifdef RT_USING_FPU
98+
ldmfd sp!, {r6}
99+
vmsr fpexc, r6
100+
tst r6, #(1<<30)
101+
beq __no_vfp_frame_to
102+
ldmfd sp!, {r5}
103+
vmsr fpscr, r5
104+
vldmia sp!, {d0-d15}
108105
__no_vfp_frame_to:
109106
#endif
110107

111108
LDMIA sp!, {r4} @ pop new task cpsr to spsr
112109
MSR spsr_cxsf, r4
113110

114-
LDMIA sp!, {r0-r12, lr, pc}^ @ pop new task r0-r12, lr & pc, copy spsr to cpsr
111+
ldmfd sp!, {r0-r12,lr,pc}^ /* irq return */
115112

116113
/*
117114
* void rt_hw_context_switch_interrupt(rt_uint32 from, rt_uint32 to)@
118115
*/
119116

120-
.globl rt_hw_context_switch_interrupt
117+
.globl rt_hw_context_switch_interrupt
121118
rt_hw_context_switch_interrupt:
122119
LDR r2, =rt_thread_switch_interrupt_flag
123120
LDR r3, [r2]
@@ -133,21 +130,21 @@ _reswitch:
133130
STR r1, [r2]
134131
BX lr
135132

136-
.globl IRQ_Handler
133+
.globl IRQ_Handler
137134
IRQ_Handler:
138135
STMDB sp!, {r0-r12,lr}
139136

140-
#if defined (__VFP_FP__) && !defined(__SOFTFP__) && defined(RT_VFP_LAZY_STACKING)
141-
VMRS r0, fpexc
142-
TST r0, #0x40000000
143-
BEQ __no_vfp_frame_str_irq
144-
VSTMDB sp!, {d0-d15}
145-
VMRS r1, fpscr
146-
@ TODO: add support for Common VFPv3.
147-
@ Save registers like FPINST, FPINST2
148-
STMDB sp!, {r1}
137+
#ifdef RT_USING_FPU
138+
VMRS r0, fpexc
139+
TST r0, #0x40000000
140+
BEQ __no_vfp_frame_str_irq
141+
VSTMDB sp!, {d0-d15}
142+
VMRS r1, fpscr
143+
@ TODO: add support for Common VFPv3.
144+
@ Save registers like FPINST, FPINST2
145+
STMDB sp!, {r1}
149146
__no_vfp_frame_str_irq:
150-
STMDB sp!, {r0}
147+
STMDB sp!, {r0}
151148
#endif
152149

153150
BL rt_interrupt_enter
@@ -161,14 +158,14 @@ __no_vfp_frame_str_irq:
161158
CMP r1, #1
162159
BEQ rt_hw_context_switch_interrupt_do
163160

164-
#if defined (__VFP_FP__) && !defined(__SOFTFP__) && defined(RT_VFP_LAZY_STACKING)
165-
LDMIA sp!, {r0} @ get fpexc
166-
VMSR fpexc, r0
167-
TST r0, #0x40000000
168-
BEQ __no_vfp_frame_ldr_irq
169-
LDMIA sp!, {r1} @ get fpscr
170-
VMSR fpscr, r1
171-
VLDMIA sp!, {d0-d15}
161+
#ifdef RT_USING_FPU
162+
LDMIA sp!, {r0} @ get fpexc
163+
VMSR fpexc, r0
164+
TST r0, #0x40000000
165+
BEQ __no_vfp_frame_ldr_irq
166+
LDMIA sp!, {r1} @ get fpscr
167+
VMSR fpscr, r1
168+
VLDMIA sp!, {d0-d15}
172169
__no_vfp_frame_ldr_irq:
173170
#endif
174171

@@ -178,19 +175,19 @@ __no_vfp_frame_ldr_irq:
178175
/*
179176
* void rt_hw_context_switch_interrupt_do(rt_base_t flag)
180177
*/
181-
.globl rt_hw_context_switch_interrupt_do
178+
.globl rt_hw_context_switch_interrupt_do
182179
rt_hw_context_switch_interrupt_do:
183180
MOV r1, #0 @ clear flag
184181
STR r1, [r0]
185182

186-
#if defined (__VFP_FP__) && !defined(__SOFTFP__) && defined(RT_VFP_LAZY_STACKING)
187-
LDMIA sp!, {r0} @ get fpexc
188-
VMSR fpexc, r0
189-
TST r0, #0x40000000
190-
BEQ __no_vfp_frame_do1
191-
LDMIA sp!, {r1} @ get fpscr
192-
VMSR fpscr, r1
193-
VLDMIA sp!, {d0-d15}
183+
#ifdef RT_USING_FPU
184+
LDMIA sp!, {r0} @ get fpexc
185+
VMSR fpexc, r0
186+
TST r0, #0x40000000
187+
BEQ __no_vfp_frame_do1
188+
LDMIA sp!, {r1} @ get fpscr
189+
VMSR fpscr, r1
190+
VLDMIA sp!, {d0-d15}
194191
__no_vfp_frame_do1:
195192
#endif
196193

@@ -213,17 +210,17 @@ __no_vfp_frame_do1:
213210
@ use them here.
214211
STMDB sp!, {r3} @ push old task's cpsr
215212

216-
#if defined (__VFP_FP__) && !defined(__SOFTFP__) && defined(RT_VFP_LAZY_STACKING)
217-
VMRS r0, fpexc
218-
TST r0, #0x40000000
219-
BEQ __no_vfp_frame_do2
220-
VSTMDB sp!, {d0-d15}
221-
VMRS r1, fpscr
222-
@ TODO: add support for Common VFPv3.
223-
@ Save registers like FPINST, FPINST2
224-
STMDB sp!, {r1}
213+
#ifdef RT_USING_FPU
214+
VMRS r0, fpexc
215+
TST r0, #0x40000000
216+
BEQ __no_vfp_frame_do2
217+
VSTMDB sp!, {d0-d15}
218+
VMRS r1, fpscr
219+
@ TODO: add support for Common VFPv3.
220+
@ Save registers like FPINST, FPINST2
221+
STMDB sp!, {r1}
225222
__no_vfp_frame_do2:
226-
STMDB sp!, {r0}
223+
STMDB sp!, {r0}
227224
#endif
228225

229226
LDR r4, =rt_interrupt_from_thread
@@ -234,19 +231,20 @@ __no_vfp_frame_do2:
234231
LDR r6, [r6]
235232
LDR sp, [r6] @ get new task's stack pointer
236233

237-
#if defined (__VFP_FP__) && !defined(__SOFTFP__) && defined(RT_VFP_LAZY_STACKING)
238-
LDMIA sp!, {r0} @ get fpexc
239-
VMSR fpexc, r0
240-
TST r0, #0x40000000
241-
BEQ __no_vfp_frame_do3
242-
LDMIA sp!, {r1} @ get fpscr
243-
VMSR fpscr, r1
244-
VLDMIA sp!, {d0-d15}
234+
#ifdef RT_USING_FPU
235+
ldmfd sp!, {r6}
236+
vmsr fpexc, r6
237+
tst r6, #(1<<30)
238+
beq __no_vfp_frame_do3
239+
ldmfd sp!, {r5}
240+
vmsr fpscr, r5
241+
vldmia sp!, {d0-d15}
242+
245243
__no_vfp_frame_do3:
246244
#endif
247245

248246
LDMIA sp!, {r4} @ pop new task's cpsr to spsr
249247
MSR spsr_cxsf, r4
250248

251-
LDMIA sp!, {r0-r12,lr,pc}^ @ pop new task's r0-r12,lr & pc, copy spsr to cpsr
249+
ldmfd sp!, {r0-r12,lr,pc}^ /* irq return */
252250

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