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support T-HEAD Xuantie-E9xx Series CPU on Smart-EVB, eg. E906/F/D/P, E907/F/D/P
1 parent 2602f54 commit 236e01b

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17 files changed

+320
-63
lines changed

17 files changed

+320
-63
lines changed

‎bsp/thead-smart/drivers/board.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -26,7 +26,7 @@ extern void ioreuse_initial(void);
2626

2727

2828
/**
29-
* This function will initial smartl-evb(e906) board.
29+
* This function will initial smart-evb board.
3030
*/
3131
void rt_hw_board_init(void)
3232
{

‎bsp/thead-smart/drivers/core_rv32.h‎

Lines changed: 160 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -290,6 +290,42 @@ typedef struct
290290
/*@} end of group CSI_CACHE */
291291

292292

293+
#define SYSMAP_SYSMAPCFG_B_Pos 0U /*!< SYSMAP SYSMAPCFG: B Position */
294+
#define SYSMAP_SYSMAPCFG_B_Msk (0x1UL << SYSMAP_SYSMAPCFG_B_Pos) /*!< SYSMAP SYSMAPCFG: B Mask */
295+
#define SYSMAP_SYSMAPCFG_C_Pos 1U /*!< SYSMAP SYSMAPCFG: C Position */
296+
#define SYSMAP_SYSMAPCFG_C_Msk (0x1UL << SYSMAP_SYSMAPCFG_C_Pos) /*!< SYSMAP SYSMAPCFG: C Mask */
297+
#define SYSMAP_SYSMAPCFG_SO_Pos 2U /*!< SYSMAP SYSMAPCFG: SO Position */
298+
#define SYSMAP_SYSMAPCFG_SO_Msk (0x1UL << SYSMAP_SYSMAPCFG_SO_Pos) /*!< SYSMAP SYSMAPCFG: SO Mask */
299+
/**
300+
\ingroup CSI_core_register
301+
\defgroup CSI_SYSMAP system map (SYSMAP)
302+
\brief Type definitions for the SYSMAP Registers
303+
@{
304+
*/
305+
typedef struct
306+
{
307+
__IOM uint32_t SYSMAPADDR0; /*!< Offset: 0x000 (R/W) SYSMAP configure register */
308+
__IOM uint32_t SYSMAPCFG0; /*!< Offset: 0x004 (R/W) SYSMAP configure register */
309+
__IOM uint32_t SYSMAPADDR1; /*!< Offset: 0x008 (R/W) SYSMAP configure register */
310+
__IOM uint32_t SYSMAPCFG1; /*!< Offset: 0x00c (R/W) SYSMAP configure register */
311+
__IOM uint32_t SYSMAPADDR2; /*!< Offset: 0x010 (R/W) SYSMAP configure register */
312+
__IOM uint32_t SYSMAPCFG2; /*!< Offset: 0x014 (R/W) SYSMAP configure register */
313+
__IOM uint32_t SYSMAPADDR3; /*!< Offset: 0x018 (R/W) SYSMAP configure register */
314+
__IOM uint32_t SYSMAPCFG3; /*!< Offset: 0x01c (R/W) SYSMAP configure register */
315+
__IOM uint32_t SYSMAPADDR4; /*!< Offset: 0x020 (R/W) SYSMAP configure register */
316+
__IOM uint32_t SYSMAPCFG4; /*!< Offset: 0x024 (R/W) SYSMAP configure register */
317+
__IOM uint32_t SYSMAPADDR5; /*!< Offset: 0x028 (R/W) SYSMAP configure register */
318+
__IOM uint32_t SYSMAPCFG5; /*!< Offset: 0x02c (R/W) SYSMAP configure register */
319+
__IOM uint32_t SYSMAPADDR6; /*!< Offset: 0x030 (R/W) SYSMAP configure register */
320+
__IOM uint32_t SYSMAPCFG6; /*!< Offset: 0x034 (R/W) SYSMAP configure register */
321+
__IOM uint32_t SYSMAPADDR7; /*!< Offset: 0x038 (R/W) SYSMAP configure register */
322+
__IOM uint32_t SYSMAPCFG7; /*!< Offset: 0x03c (R/W) SYSMAP configure register */
323+
} SYSMAP_Type;
324+
325+
326+
/*@} end of group CSI_SYSMAP */
327+
328+
293329
/**
294330
\ingroup CSI_core_register
295331
\defgroup CSI_SysTick System Tick Timer (CORET)
@@ -383,12 +419,14 @@ typedef struct
383419
#define TCIP_BASE (0xE000E000UL) /*!< Titly Coupled IP Base Address */
384420
#define CORET_BASE (0xE0004000UL) /*!< CORET Base Address */
385421
#define CLIC_BASE (0xE0800000UL) /*!< CLIC Base Address */
422+
#define SYSMAP_BASE (0xEFFFF000UL) /*!< SYSMAP Base Address */
386423
#define DCC_BASE (0xE4010000UL) /*!< DCC Base Address */
387424
#define CACHE_BASE (TCIP_BASE + 0x1000UL) /*!< CACHE Base Address */
388425

389426
#define CORET ((CORET_Type *) CORET_BASE ) /*!< SysTick configuration struct */
390427
#define CLIC ((CLIC_Type *) CLIC_BASE ) /*!< CLIC configuration struct */
391428
#define DCC ((DCC_Type *) DCC_BASE ) /*!< DCC configuration struct */
429+
#define SYSMAP ((SYSMAP_Type *) SYSMAP_BASE ) /*!< SYSMAP configuration struct */
392430
#define CACHE ((CACHE_Type *) CACHE_BASE ) /*!< cache configuration struct */
393431

394432
/*@} */
@@ -646,7 +684,7 @@ __STATIC_INLINE void csi_mpu_disable_region(uint32_t idx)
646684
*/
647685
__STATIC_INLINE uint32_t csi_coret_config(uint32_t ticks, int32_t IRQn)
648686
{
649-
if (CORET->MTIMECMP) {
687+
if ((CORET->MTIMECMP != 0) && (CORET->MTIMECMP != 0xffffffffffffffff)) {
650688
CORET->MTIMECMP = CORET->MTIMECMP + ticks;
651689
} else {
652690
CORET->MTIMECMP = CORET->MTIME + ticks;
@@ -691,6 +729,126 @@ __STATIC_INLINE uint32_t csi_coret_get_valueh(void)
691729
}
692730

693731
/*@} end of CSI_Core_SysTickFunctions */
732+
/* ########################## SYSMAP functions #################################### */
733+
/**
734+
\ingroup CSI_Core_FunctionInterface
735+
\defgroup CSI_Core_SYSMAPFunctions SYSMAP Functions
736+
\brief Functions that manage system map attribute
737+
@{
738+
*/
739+
740+
/**
741+
\brief Get SYSMAPCFGx Register by index
742+
\details Returns the content of the SYSMAPxCFG Register.
743+
\param [in] idx SYSMAP region index
744+
\return SYSMAPxCFG Register value
745+
*/
746+
__STATIC_INLINE uint8_t __get_SYSMAPCFGx(uint32_t idx)
747+
{
748+
switch (idx)
749+
{
750+
case 0: return SYSMAP->SYSMAPCFG0;
751+
case 1: return SYSMAP->SYSMAPCFG1;
752+
case 2: return SYSMAP->SYSMAPCFG2;
753+
case 3: return SYSMAP->SYSMAPCFG3;
754+
case 4: return SYSMAP->SYSMAPCFG4;
755+
case 5: return SYSMAP->SYSMAPCFG5;
756+
case 6: return SYSMAP->SYSMAPCFG6;
757+
case 7: return SYSMAP->SYSMAPCFG7;
758+
default: return 0;
759+
}
760+
}
761+
762+
/**
763+
\brief Set SYSMAPCFGx by index
764+
\details Writes the given value to the SYSMAPxCFG Register.
765+
\param [in] idx SYSMAPx region index
766+
\param [in] sysmapxcfg SYSMAPxCFG Register value to set
767+
*/
768+
__STATIC_INLINE void __set_SYSMAPCFGx(uint32_t idx, uint32_t sysmapxcfg)
769+
{
770+
switch (idx)
771+
{
772+
case 0: SYSMAP->SYSMAPCFG0 = sysmapxcfg; break;
773+
case 1: SYSMAP->SYSMAPCFG1 = sysmapxcfg; break;
774+
case 2: SYSMAP->SYSMAPCFG2 = sysmapxcfg; break;
775+
case 3: SYSMAP->SYSMAPCFG3 = sysmapxcfg; break;
776+
case 4: SYSMAP->SYSMAPCFG4 = sysmapxcfg; break;
777+
case 5: SYSMAP->SYSMAPCFG5 = sysmapxcfg; break;
778+
case 6: SYSMAP->SYSMAPCFG6 = sysmapxcfg; break;
779+
case 7: SYSMAP->SYSMAPCFG7 = sysmapxcfg; break;
780+
default: return;
781+
}
782+
}
783+
784+
/**
785+
\brief Get SYSMAPADDRx Register by index
786+
\details Returns the content of the SYSMAPADDRx Register.
787+
\param [in] idx SYSMAP region index
788+
\return SYSMAPADDRx Register value
789+
*/
790+
__STATIC_INLINE uint32_t __get_SYSMAPADDRx(uint32_t idx)
791+
{
792+
switch(idx)
793+
{
794+
case 0: return SYSMAP->SYSMAPADDR0;
795+
case 1: return SYSMAP->SYSMAPADDR1;
796+
case 2: return SYSMAP->SYSMAPADDR2;
797+
case 3: return SYSMAP->SYSMAPADDR3;
798+
case 4: return SYSMAP->SYSMAPADDR4;
799+
case 5: return SYSMAP->SYSMAPADDR5;
800+
case 6: return SYSMAP->SYSMAPADDR6;
801+
case 7: return SYSMAP->SYSMAPADDR7;
802+
default: return 0;
803+
}
804+
}
805+
806+
/**
807+
\brief Set SYSMAPADDRx by index
808+
\details Writes the given value to the SYSMAPADDRx Register.
809+
\param [in] idx SYSMAP region index
810+
\param [in] sysmapaddr SYSMAPADDRx Register value to set
811+
*/
812+
__STATIC_INLINE void __set_SYSMAPADDRx(uint32_t idx, uint32_t sysmapxaddr)
813+
{
814+
switch (idx)
815+
{
816+
case 0: SYSMAP->SYSMAPADDR0 = sysmapxaddr; break;
817+
case 1: SYSMAP->SYSMAPADDR1 = sysmapxaddr; break;
818+
case 2: SYSMAP->SYSMAPADDR2 = sysmapxaddr; break;
819+
case 3: SYSMAP->SYSMAPADDR3 = sysmapxaddr; break;
820+
case 4: SYSMAP->SYSMAPADDR4 = sysmapxaddr; break;
821+
case 5: SYSMAP->SYSMAPADDR5 = sysmapxaddr; break;
822+
case 6: SYSMAP->SYSMAPADDR6 = sysmapxaddr; break;
823+
case 7: SYSMAP->SYSMAPADDR7 = sysmapxaddr; break;
824+
default: return;
825+
}
826+
}
827+
828+
/**
829+
\brief configure system map attribute.
830+
\details
831+
\param [in] idx system map region (0, 1, 2, ..., 7).
832+
\param [in] base_addr base address must be aligned with page size.
833+
\param [in] enable enable or disable memory protected region.
834+
*/
835+
__STATIC_INLINE void csi_sysmap_config_region(uint32_t idx, uint32_t base_addr, uint32_t attr)
836+
{
837+
uint32_t addr = 0;
838+
839+
if (idx > 7) {
840+
return;
841+
}
842+
843+
addr = base_addr >> 12;
844+
attr = attr << 2;
845+
846+
__set_SYSMAPADDRx(idx, addr);
847+
__set_SYSMAPCFGx(idx, attr);
848+
}
849+
850+
/*@} end of CSI_Core_SYSMAPFunctions */
851+
694852

695853
/* ##################################### DCC function ########################################### */
696854
/**
@@ -986,7 +1144,7 @@ __STATIC_INLINE void csi_dcache_invalid_range (uint32_t *addr, int32_t dsize)
9861144
__STATIC_INLINE void csi_dcache_clean_range (uint32_t *addr, int32_t dsize)
9871145
{
9881146

989-
#if (__DCACHE_PRESENT == 1)
1147+
#if (__DCACHE_PRESENT == 1U)
9901148
int32_t op_size = dsize + (uint32_t)addr % 32;
9911149
uint32_t op_addr = (uint32_t) addr & CACHE_INV_ADDR_Msk;
9921150
int32_t linesize = 32;

‎bsp/thead-smart/drivers/csi_rv32_gcc.h‎

Lines changed: 23 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -184,6 +184,29 @@ __ALWAYS_STATIC_INLINE void __set_MHCR(uint32_t mhcr)
184184
__ASM volatile("csrw mhcr, %0" : : "r"(mhcr));
185185
}
186186

187+
/**
188+
\brief Get MHINT
189+
\details Returns the content of the MHINT Register.
190+
\return MHINT Register value
191+
*/
192+
__ALWAYS_STATIC_INLINE uint32_t __get_MHINT(void)
193+
{
194+
uint32_t result;
195+
196+
__ASM volatile("csrr %0, mhint" : "=r"(result));
197+
return (result);
198+
}
199+
200+
/**
201+
\brief Set MHINT
202+
\details Writes the given value to the MHINT Register.
203+
\param [in] MHINT Register value to set
204+
*/
205+
__ALWAYS_STATIC_INLINE void __set_MHINT(uint32_t mhint)
206+
{
207+
__ASM volatile("csrw mhint, %0" : : "r"(mhint));
208+
}
209+
187210
/**
188211
\brief Get MISA Register
189212
\details Returns the content of the MISA Register.

‎bsp/thead-smart/drivers/isr.c‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -25,7 +25,7 @@ extern void systick_handler(void);
2525
extern void xPortSysTickHandler(void);
2626
extern void OSTimeTick(void);
2727

28-
#define ATTRIBUTE_ISR
28+
#define ATTRIBUTE_ISR __attribute__ ((interrupt ("machine")))
2929

3030
#define readl(addr) \
3131
({ unsigned int __v = (*(volatile unsigned int *) (addr)); __v; })
@@ -37,7 +37,7 @@ extern void OSTimeTick(void);
3737
#endif
3838

3939

40-
void __attribute__((isr)) SysTick_Handler(void)
40+
ATTRIBUTE_ISR void SysTick_Handler(void)
4141
{
4242
#if(CONFIG_KERNEL_RTTHREAD == 1)
4343
CSI_INTRPT_ENTER();

‎bsp/thead-smart/drivers/startup_gcc.S‎

Lines changed: 34 additions & 33 deletions
Original file line numberDiff line numberDiff line change
@@ -24,7 +24,7 @@ __Vectors:
2424
.long Default_Handler
2525
.long Default_Handler
2626
.long Default_Handler
27-
.long Default_IRQHandler
27+
.long SysTick_Handler
2828
.long Default_Handler
2929
.long Default_Handler
3030
.long Default_Handler
@@ -35,38 +35,39 @@ __Vectors:
3535
.long Default_Handler
3636

3737
/* External interrupts */
38-
.long Default_IRQHandler
39-
.long Default_IRQHandler
40-
.long Default_IRQHandler
41-
.long Default_IRQHandler
42-
.long Default_IRQHandler
43-
.long Default_IRQHandler
44-
.long Default_IRQHandler
45-
.long Default_IRQHandler
46-
.long Default_IRQHandler
47-
.long Default_IRQHandler
48-
.long Default_IRQHandler
49-
.long Default_IRQHandler
50-
.long Default_IRQHandler
51-
.long Default_IRQHandler
52-
.long Default_IRQHandler
53-
.long Default_IRQHandler
54-
.long Default_IRQHandler
55-
.long Default_IRQHandler
56-
.long Default_IRQHandler
57-
.long Default_IRQHandler
58-
.long Default_IRQHandler
59-
.long Default_IRQHandler
60-
.long Default_IRQHandler
61-
.long Default_IRQHandler
62-
.long Default_IRQHandler
63-
.long Default_IRQHandler
64-
.long Default_IRQHandler
65-
.long Default_IRQHandler
66-
.long Default_IRQHandler
67-
.long Default_IRQHandler
68-
.long Default_IRQHandler
69-
.long Default_IRQHandler
38+
.long USART_IRQHandler
39+
.long Default_Handler
40+
.long TIM0_IRQHandler
41+
.long Default_Handler
42+
.long Default_Handler
43+
.long Default_Handler
44+
.long Default_Handler
45+
.long Default_Handler
46+
.long Default_Handler
47+
.long Default_Handler
48+
.long Default_Handler
49+
.long Default_Handler
50+
.long Default_Handler
51+
.long Default_Handler
52+
.long Default_Handler
53+
.long Default_Handler
54+
.long Default_Handler
55+
.long Default_Handler
56+
.long Default_Handler
57+
.long Default_Handler
58+
.long Default_Handler
59+
.long Default_Handler
60+
.long Default_Handler
61+
.long Default_Handler
62+
.long Default_Handler
63+
.long Default_Handler
64+
.long Default_Handler
65+
.long Default_Handler
66+
.long Default_Handler
67+
.long Default_Handler
68+
.long Default_Handler
69+
.long Default_Handler
70+
.size __Vectors,.-__Vectors
7071

7172
.text
7273
.align 2

‎bsp/thead-smart/drivers/system.c‎

Lines changed: 21 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -39,6 +39,23 @@ static void _system_init_for_kernel(void)
3939
drv_irq_enable(CORET_IRQn);
4040
}
4141

42+
/**
43+
* @brief initialize system map
44+
* @param None
45+
* @return None
46+
*/
47+
void systemmap_config(void)
48+
{
49+
csi_sysmap_config_region(0, 0x20000000, SYSMAP_SYSMAPCFG_B_Msk | SYSMAP_SYSMAPCFG_C_Msk);
50+
csi_sysmap_config_region(1, 0x40000000, SYSMAP_SYSMAPCFG_B_Msk | SYSMAP_SYSMAPCFG_C_Msk);
51+
csi_sysmap_config_region(2, 0x50000000, SYSMAP_SYSMAPCFG_SO_Msk);
52+
csi_sysmap_config_region(3, 0x50700000, SYSMAP_SYSMAPCFG_B_Msk | SYSMAP_SYSMAPCFG_C_Msk);
53+
csi_sysmap_config_region(4, 0x60000000, SYSMAP_SYSMAPCFG_SO_Msk);
54+
csi_sysmap_config_region(5, 0x80000000, SYSMAP_SYSMAPCFG_B_Msk | SYSMAP_SYSMAPCFG_C_Msk);
55+
csi_sysmap_config_region(6, 0x90000000, SYSMAP_SYSMAPCFG_B_Msk | SYSMAP_SYSMAPCFG_C_Msk);
56+
csi_sysmap_config_region(7, 0xf0000000, SYSMAP_SYSMAPCFG_SO_Msk);
57+
}
58+
4259
/**
4360
* @brief initialize the system
4461
* Initialize the psr and vbr.
@@ -48,8 +65,9 @@ static void _system_init_for_kernel(void)
4865
void SystemInit(void)
4966
{
5067
int i;
68+
systemmap_config();
5169
/* enable mstatus FS */
52-
#if ((CONFIG_CPU_E906F==1) || (CONFIG_CPU_E906FD==1))
70+
#if (__riscv_flen)
5371
uint32_t mstatus = __get_MSTATUS();
5472
mstatus |= (1 << 13);
5573
__set_MSTATUS(mstatus);
@@ -77,7 +95,9 @@ void SystemInit(void)
7795
/* tspend use positive interrupt */
7896
CLIC->CLICINT[Machine_Software_IRQn].ATTR = 0x3;
7997

98+
#if ((CONFIG_CPU_E902 != 1) && (CONFIG_CPU_E902M != 1))
8099
csi_dcache_enable();
100+
#endif
81101
csi_icache_enable();
82102
drv_irq_enable(Machine_Software_IRQn);
83103

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