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| 1 | +/* |
| 2 | + * Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd. |
| 3 | + * |
| 4 | + * SPDX-License-Identifier: Apache-2.0 |
| 5 | + * |
| 6 | + * Change Logs: |
| 7 | + * Date Author Notes |
| 8 | + * 2019-03-11 wangyq the first version |
| 9 | + */ |
| 10 | + |
| 11 | +#include <rthw.h> |
| 12 | +#include <rtthread.h> |
| 13 | +#include <rtdevice.h> |
| 14 | +#include <board.h> |
| 15 | +#include <ald_timer.h> |
| 16 | +#include <ald_gpio.h> |
| 17 | + |
| 18 | +static rt_err_t es32f0_pwm_control(struct rt_device_pwm *device, int cmd, void *arg) |
| 19 | +{ |
| 20 | + rt_err_t ret = RT_EOK; |
| 21 | + timer_channel_t pwm_channel; |
| 22 | + timer_oc_init_t tim_ocinit; |
| 23 | + timer_handle_t *timer_initstruct = (timer_handle_t *)device->parent.user_data; |
| 24 | + struct rt_pwm_configuration *cfg = (struct rt_pwm_configuration *)arg; |
| 25 | + |
| 26 | + RT_ASSERT(timer_initstruct != RT_NULL); |
| 27 | + |
| 28 | + tim_ocinit.oc_mode = TIMER_OC_MODE_PWM1; |
| 29 | + tim_ocinit.oc_polarity = TIMER_OC_POLARITY_HIGH; |
| 30 | + tim_ocinit.oc_fast_en = DISABLE; |
| 31 | + tim_ocinit.ocn_polarity = TIMER_OCN_POLARITY_HIGH; |
| 32 | + tim_ocinit.ocn_idle = TIMER_OCN_IDLE_RESET; |
| 33 | + tim_ocinit.oc_idle = TIMER_OC_IDLE_RESET; |
| 34 | + |
| 35 | + /* select pwm output channel */ |
| 36 | + if (0 == cfg->channel) |
| 37 | + { |
| 38 | + pwm_channel = TIMER_CHANNEL_1; |
| 39 | + } |
| 40 | + else if (1 == cfg->channel) |
| 41 | + { |
| 42 | + pwm_channel = TIMER_CHANNEL_2; |
| 43 | + } |
| 44 | + else if (2 == cfg->channel) |
| 45 | + { |
| 46 | + if (timer_initstruct->perh == GP16C2T0 || timer_initstruct->perh == GP16C2T1) |
| 47 | + return RT_EINVAL; |
| 48 | + pwm_channel = TIMER_CHANNEL_3; |
| 49 | + } |
| 50 | + else if (3 == cfg->channel) |
| 51 | + { |
| 52 | + if (timer_initstruct->perh == GP16C2T0 || timer_initstruct->perh == GP16C2T1) |
| 53 | + return RT_EINVAL; |
| 54 | + pwm_channel = TIMER_CHANNEL_4; |
| 55 | + } |
| 56 | + else |
| 57 | + { |
| 58 | + return RT_EINVAL; |
| 59 | + } |
| 60 | + |
| 61 | + switch (cmd) |
| 62 | + { |
| 63 | + case PWM_CMD_ENABLE: |
| 64 | + timer_pwm_start(timer_initstruct, pwm_channel); |
| 65 | + break; |
| 66 | + |
| 67 | + case PWM_CMD_DISABLE: |
| 68 | + timer_pwm_stop(timer_initstruct, pwm_channel); |
| 69 | + break; |
| 70 | + |
| 71 | + case PWM_CMD_SET: |
| 72 | + /* count registers max 0xFFFF, auto adjust prescaler*/ |
| 73 | + do |
| 74 | + { |
| 75 | + timer_pwm_set_freq(timer_initstruct, 1000000000 / cfg->period); |
| 76 | + timer_initstruct->init.prescaler ++; |
| 77 | + } |
| 78 | + while (timer_initstruct->init.period > 0xFFFF); |
| 79 | + /* update prescaler */ |
| 80 | + WRITE_REG(timer_initstruct->perh->PRES, -- timer_initstruct->init.prescaler); |
| 81 | + timer_oc_config_channel(timer_initstruct, &tim_ocinit, pwm_channel); |
| 82 | + timer_pwm_set_duty(timer_initstruct, pwm_channel, cfg->pulse * 100 / cfg->period); |
| 83 | + break; |
| 84 | + |
| 85 | + case PWM_CMD_GET: |
| 86 | + cfg->pulse = timer_read_capture_value(timer_initstruct, pwm_channel) * 100 / READ_REG(timer_initstruct->perh->AR); |
| 87 | + break; |
| 88 | + |
| 89 | + default: |
| 90 | + break; |
| 91 | + } |
| 92 | + return ret; |
| 93 | +} |
| 94 | + |
| 95 | +const static struct rt_pwm_ops es32f0_pwm_ops = |
| 96 | +{ |
| 97 | + es32f0_pwm_control |
| 98 | +}; |
| 99 | + |
| 100 | +int rt_hw_pwm_init(void) |
| 101 | +{ |
| 102 | + rt_err_t ret = RT_EOK; |
| 103 | + gpio_init_t gpio_initstructure; |
| 104 | + |
| 105 | + gpio_initstructure.mode = GPIO_MODE_OUTPUT; |
| 106 | + gpio_initstructure.odos = GPIO_PUSH_PULL; |
| 107 | + gpio_initstructure.pupd = GPIO_PUSH_UP; |
| 108 | + gpio_initstructure.odrv = GPIO_OUT_DRIVE_NORMAL; |
| 109 | + gpio_initstructure.flt = GPIO_FILTER_DISABLE; |
| 110 | + gpio_initstructure.type = GPIO_TYPE_TTL; |
| 111 | + |
| 112 | +#ifdef BSP_USING_PWM0 /* 4 channels */ |
| 113 | + static struct rt_device_pwm pwm_dev0; |
| 114 | + static timer_handle_t timer_initstruct0; |
| 115 | + |
| 116 | + timer_initstruct0.perh = AD16C4T0; |
| 117 | + timer_pwm_init(&timer_initstruct0); |
| 118 | + |
| 119 | + /* gpio initialization */ |
| 120 | + gpio_initstructure.func = GPIO_FUNC_2; |
| 121 | + gpio_init(GPIOA, GPIO_PIN_8, &gpio_initstructure); |
| 122 | + gpio_init(GPIOA, GPIO_PIN_9, &gpio_initstructure); |
| 123 | + gpio_init(GPIOA, GPIO_PIN_10, &gpio_initstructure); |
| 124 | + gpio_init(GPIOA, GPIO_PIN_11, &gpio_initstructure); |
| 125 | + |
| 126 | + ret = rt_device_pwm_register(&pwm_dev0, "pwm0", &es32f0_pwm_ops, &timer_initstruct0); |
| 127 | +#endif |
| 128 | + |
| 129 | +#ifdef BSP_USING_PWM1 /* 4 channels */ |
| 130 | + static struct rt_device_pwm pwm_dev1; |
| 131 | + static timer_handle_t timer_initstruct1; |
| 132 | + |
| 133 | + timer_initstruct1.perh = GP16C4T0; |
| 134 | + timer_pwm_init(&timer_initstruct1); |
| 135 | + |
| 136 | + /* gpio initialization */ |
| 137 | + gpio_initstructure.func = GPIO_FUNC_2; |
| 138 | + gpio_init(GPIOB, GPIO_PIN_6, &gpio_initstructure); |
| 139 | + gpio_init(GPIOB, GPIO_PIN_7, &gpio_initstructure); |
| 140 | + gpio_init(GPIOB, GPIO_PIN_8, &gpio_initstructure); |
| 141 | + gpio_init(GPIOB, GPIO_PIN_9, &gpio_initstructure); |
| 142 | + |
| 143 | + ret = rt_device_pwm_register(&pwm_dev1, "pwm1", &es32f0_pwm_ops, &timer_initstruct1); |
| 144 | +#endif |
| 145 | + |
| 146 | +#ifdef BSP_USING_PWM2 /* 2 channels */ |
| 147 | + static struct rt_device_pwm pwm_dev2; |
| 148 | + static timer_handle_t timer_initstruct2; |
| 149 | + |
| 150 | + timer_initstruct2.perh = GP16C2T0; |
| 151 | + timer_pwm_init(&timer_initstruct2); |
| 152 | + |
| 153 | + /* gpio initialization */ |
| 154 | + gpio_initstructure.func = GPIO_FUNC_2; |
| 155 | + gpio_init(GPIOA, GPIO_PIN_0, &gpio_initstructure); |
| 156 | + gpio_init(GPIOA, GPIO_PIN_1, &gpio_initstructure); |
| 157 | + |
| 158 | + ret = rt_device_pwm_register(&pwm_dev2, "pwm2", &es32f0_pwm_ops, &timer_initstruct2); |
| 159 | +#endif |
| 160 | + |
| 161 | +#ifdef BSP_USING_PWM3 /* 2 channels */ |
| 162 | + static struct rt_device_pwm pwm_dev3; |
| 163 | + static timer_handle_t timer_initstruct3; |
| 164 | + |
| 165 | + timer_initstruct3.perh = GP16C2T1; |
| 166 | + timer_pwm_init(&timer_initstruct3); |
| 167 | + |
| 168 | + /* gpio initialization */ |
| 169 | + gpio_initstructure.func = GPIO_FUNC_3; |
| 170 | + gpio_init(GPIOC, GPIO_PIN_6, &gpio_initstructure); |
| 171 | + gpio_init(GPIOC, GPIO_PIN_7, &gpio_initstructure); |
| 172 | + |
| 173 | + ret = rt_device_pwm_register(&pwm_dev3, "pwm3", &es32f0_pwm_ops, &timer_initstruct3); |
| 174 | +#endif |
| 175 | + |
| 176 | + return ret; |
| 177 | +} |
| 178 | +INIT_DEVICE_EXPORT(rt_hw_pwm_init); |
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