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Commit 2d3ae92

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space instead of table keep the code style
1 parent 0458f0b commit 2d3ae92

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1 file changed

+48
-48
lines changed
  • libcpu/aarch64/cortex-a53

1 file changed

+48
-48
lines changed

libcpu/aarch64/cortex-a53/mmu.c

Lines changed: 48 additions & 48 deletions
Original file line numberDiff line numberDiff line change
@@ -12,17 +12,17 @@
1212

1313
#define TTBR_CNP 1
1414

15-
typedef unsigned long int uint64_t;
15+
typedef unsigned long int uint64_t;
1616

1717
static unsigned long main_tbl[512 * 20] __attribute__((aligned (4096)));
1818

19-
#define IS_ALIGNED(x, a) (((x) & ((typeof(x))(a) - 1)) == 0)
19+
#define IS_ALIGNED(x, a) (((x) & ((typeof(x))(a) - 1)) == 0)
2020

21-
#define PMD_TYPE_SECT (1 << 0)
21+
#define PMD_TYPE_SECT (1 << 0)
2222

23-
#define PMD_TYPE_TABLE (3 << 0)
23+
#define PMD_TYPE_TABLE (3 << 0)
2424

25-
#define PTE_TYPE_PAGE (3 << 0)
25+
#define PTE_TYPE_PAGE (3 << 0)
2626

2727
#define BITS_PER_VA 39
2828

@@ -31,7 +31,7 @@ static unsigned long main_tbl[512 * 20] __attribute__((aligned (4096)));
3131
#define GRANULE_SIZE (1 << GRANULE_SIZE_SHIFT)
3232
#define XLAT_ADDR_MASK ((1UL << BITS_PER_VA) - GRANULE_SIZE)
3333

34-
#define PMD_TYPE_MASK (3 << 0)
34+
#define PMD_TYPE_MASK (3 << 0)
3535

3636
int free_idx = 1;
3737

@@ -178,9 +178,9 @@ int armv8_map_2M(unsigned long va, unsigned long pa, int count, unsigned long at
178178

179179
static void set_table(uint64_t *pt, uint64_t *table_addr)
180180
{
181-
uint64_t val;
182-
val = (0x3UL | (uint64_t)table_addr);
183-
*pt = val;
181+
uint64_t val;
182+
val = (0x3UL | (uint64_t)table_addr);
183+
*pt = val;
184184
}
185185

186186
void mmu_memset2(unsigned char *dst, char v, int len)
@@ -193,59 +193,59 @@ void mmu_memset2(unsigned char *dst, char v, int len)
193193

194194
static uint64_t *create_table(void)
195195
{
196-
uint64_t *new_table = (uint64_t *)((unsigned char *)&main_tbl[0] + free_idx * 4096); //+ free_idx * GRANULE_SIZE;
197-
/* Mark all entries as invalid */
198-
mmu_memset2((unsigned char *)new_table, 0, 4096);
199-
free_idx++;
200-
return new_table;
196+
uint64_t *new_table = (uint64_t *)((unsigned char *)&main_tbl[0] + free_idx * 4096); //+ free_idx * GRANULE_SIZE;
197+
/* Mark all entries as invalid */
198+
mmu_memset2((unsigned char *)new_table, 0, 4096);
199+
free_idx++;
200+
return new_table;
201201
}
202202

203203
static int pte_type(uint64_t *pte)
204204
{
205-
return *pte & PMD_TYPE_MASK;
205+
return *pte & PMD_TYPE_MASK;
206206
}
207207

208208
static int level2shift(int level)
209209
{
210-
/* Page is 12 bits wide, every level translates 9 bits */
211-
return (12 + 9 * (3 - level));
210+
/* Page is 12 bits wide, every level translates 9 bits */
211+
return (12 + 9 * (3 - level));
212212
}
213213

214214
static uint64_t *get_level_table(uint64_t *pte)
215215
{
216-
uint64_t *table = (uint64_t *)(*pte & XLAT_ADDR_MASK);
217-
218-
if (pte_type(pte) != PMD_TYPE_TABLE)
216+
uint64_t *table = (uint64_t *)(*pte & XLAT_ADDR_MASK);
217+
218+
if (pte_type(pte) != PMD_TYPE_TABLE)
219219
{
220-
table = create_table();
221-
set_table(pte, table);
222-
}
223-
return table;
220+
table = create_table();
221+
set_table(pte, table);
222+
}
223+
return table;
224224
}
225225

226226
static void map_region(uint64_t virt, uint64_t phys, uint64_t size, uint64_t attr)
227227
{
228-
uint64_t block_size = 0;
229-
uint64_t block_shift = 0;
230-
uint64_t *pte;
231-
uint64_t idx = 0;
232-
uint64_t addr = 0;
233-
uint64_t *table = 0;
234-
int level = 0;
235-
236-
addr = virt;
237-
while (size)
228+
uint64_t block_size = 0;
229+
uint64_t block_shift = 0;
230+
uint64_t *pte;
231+
uint64_t idx = 0;
232+
uint64_t addr = 0;
233+
uint64_t *table = 0;
234+
int level = 0;
235+
236+
addr = virt;
237+
while (size)
238238
{
239-
table = &main_tbl[0];
240-
for (level = 0; level < 4; level++)
239+
table = &main_tbl[0];
240+
for (level = 0; level < 4; level++)
241241
{
242-
block_shift = level2shift(level);
242+
block_shift = level2shift(level);
243243
idx = addr >> block_shift;
244-
idx = idx%512;
244+
idx = idx%512;
245245
block_size = (uint64_t)(1L << block_shift);
246-
pte = table + idx;
246+
pte = table + idx;
247247

248-
if (size >= block_size && IS_ALIGNED(addr, block_size))
248+
if (size >= block_size && IS_ALIGNED(addr, block_size))
249249
{
250250
attr &= 0xfff0000000000ffcUL;
251251
if(level != 3)
@@ -256,14 +256,14 @@ static void map_region(uint64_t virt, uint64_t phys, uint64_t size, uint64_t att
256256
{
257257
*pte = phys | (attr | 0x3UL);
258258
}
259-
addr += block_size;
260-
phys += block_size;
261-
size -= block_size;
262-
break;
263-
}
264-
table = get_level_table(pte);
265-
}
266-
}
259+
addr += block_size;
260+
phys += block_size;
261+
size -= block_size;
262+
break;
263+
}
264+
table = get_level_table(pte);
265+
}
266+
}
267267
}
268268

269269
void armv8_map(unsigned long va, unsigned long pa, unsigned long size, unsigned long attr)

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