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bsp: k230: Provide a unified interrupt header file
Originally, the interrupt definitions of various peripherals were distributed in various peripheral drivers, resulting in duplicate definitions. Now they are defined in one place. Signed-off-by: Chen Wang <[email protected]>
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‎bsp/k230/board/board.h‎

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Original file line numberDiff line numberDiff line change
@@ -13,6 +13,7 @@
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#include "rtconfig.h"
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#include "mem_layout.h"
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#include "irq_num.h"
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/*
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* K230 Memory Map

‎bsp/k230/board/irq_num.h‎

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@@ -0,0 +1,198 @@
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/*
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* Copyright (c) 2006-2025, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define K230_IRQ_BASE 16
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9+
/* See TRM 2.4 */
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#define K230_IRQ_UART0 K230_IRQ_BASE + 0
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#define K230_IRQ_UART1 K230_IRQ_BASE + 1
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#define K230_IRQ_UART2 K230_IRQ_BASE + 2
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#define K230_IRQ_UART3 K230_IRQ_BASE + 3
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#define K230_IRQ_UART4 K230_IRQ_BASE + 4
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#define K230_IRQ_I2C0 K230_IRQ_BASE + 5
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#define K230_IRQ_I2C1 K230_IRQ_BASE + 6
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#define K230_IRQ_I2C2 K230_IRQ_BASE + 7
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#define K230_IRQ_I2C3 K230_IRQ_BASE + 8
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#define K230_IRQ_I2C4 K230_IRQ_BASE + 9
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#define K230_IRQ_PWM0 K230_IRQ_BASE + 10
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#define K230_IRQ_PWM1 K230_IRQ_BASE + 11
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#define K230_IRQ_PWM2 K230_IRQ_BASE + 12
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#define K230_IRQ_PWM3 K230_IRQ_BASE + 13
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#define K230_IRQ_PWM4 K230_IRQ_BASE + 14
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#define K230_IRQ_PWM5 K230_IRQ_BASE + 15
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#define K230_IRQ_GPIO0_0 K230_IRQ_BASE + 16
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#define K230_IRQ_GPIO0_1 K230_IRQ_BASE + 17
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#define K230_IRQ_GPIO0_2 K230_IRQ_BASE + 18
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#define K230_IRQ_GPIO0_3 K230_IRQ_BASE + 19
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#define K230_IRQ_GPIO0_4 K230_IRQ_BASE + 20
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#define K230_IRQ_GPIO0_5 K230_IRQ_BASE + 21
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#define K230_IRQ_GPIO0_6 K230_IRQ_BASE + 22
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#define K230_IRQ_GPIO0_7 K230_IRQ_BASE + 23
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#define K230_IRQ_GPIO0_8 K230_IRQ_BASE + 24
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#define K230_IRQ_GPIO0_9 K230_IRQ_BASE + 25
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#define K230_IRQ_GPIO0_10 K230_IRQ_BASE + 26
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#define K230_IRQ_GPIO0_11 K230_IRQ_BASE + 27
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#define K230_IRQ_GPIO0_12 K230_IRQ_BASE + 28
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#define K230_IRQ_GPIO0_13 K230_IRQ_BASE + 29
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#define K230_IRQ_GPIO0_14 K230_IRQ_BASE + 30
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#define K230_IRQ_GPIO0_15 K230_IRQ_BASE + 31
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#define K230_IRQ_GPIO0_16 K230_IRQ_BASE + 32
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#define K230_IRQ_GPIO0_17 K230_IRQ_BASE + 33
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#define K230_IRQ_GPIO0_18 K230_IRQ_BASE + 34
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#define K230_IRQ_GPIO0_19 K230_IRQ_BASE + 35
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#define K230_IRQ_GPIO0_20 K230_IRQ_BASE + 36
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#define K230_IRQ_GPIO0_21 K230_IRQ_BASE + 37
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#define K230_IRQ_GPIO0_22 K230_IRQ_BASE + 38
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#define K230_IRQ_GPIO0_23 K230_IRQ_BASE + 39
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#define K230_IRQ_GPIO0_24 K230_IRQ_BASE + 40
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#define K230_IRQ_GPIO0_25 K230_IRQ_BASE + 41
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#define K230_IRQ_GPIO0_26 K230_IRQ_BASE + 42
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#define K230_IRQ_GPIO0_27 K230_IRQ_BASE + 43
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#define K230_IRQ_GPIO0_28 K230_IRQ_BASE + 44
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#define K230_IRQ_GPIO0_29 K230_IRQ_BASE + 45
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#define K230_IRQ_GPIO0_30 K230_IRQ_BASE + 46
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#define K230_IRQ_GPIO0_31 K230_IRQ_BASE + 47
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#define K230_IRQ_GPIO1_0 K230_IRQ_BASE + 48
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#define K230_IRQ_GPIO1_1 K230_IRQ_BASE + 49
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#define K230_IRQ_GPIO1_2 K230_IRQ_BASE + 50
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#define K230_IRQ_GPIO1_3 K230_IRQ_BASE + 51
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#define K230_IRQ_GPIO1_4 K230_IRQ_BASE + 52
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#define K230_IRQ_GPIO1_5 K230_IRQ_BASE + 53
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#define K230_IRQ_GPIO1_6 K230_IRQ_BASE + 54
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#define K230_IRQ_GPIO1_7 K230_IRQ_BASE + 55
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#define K230_IRQ_GPIO1_8 K230_IRQ_BASE + 56
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#define K230_IRQ_GPIO1_9 K230_IRQ_BASE + 57
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#define K230_IRQ_GPIO1_10 K230_IRQ_BASE + 58
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#define K230_IRQ_GPIO1_11 K230_IRQ_BASE + 59
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#define K230_IRQ_GPIO1_12 K230_IRQ_BASE + 60
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#define K230_IRQ_GPIO1_13 K230_IRQ_BASE + 61
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#define K230_IRQ_GPIO1_14 K230_IRQ_BASE + 62
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#define K230_IRQ_GPIO1_15 K230_IRQ_BASE + 63
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#define K230_IRQ_GPIO1_16 K230_IRQ_BASE + 64
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#define K230_IRQ_GPIO1_17 K230_IRQ_BASE + 65
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#define K230_IRQ_GPIO1_18 K230_IRQ_BASE + 66
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#define K230_IRQ_GPIO1_19 K230_IRQ_BASE + 67
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#define K230_IRQ_GPIO1_20 K230_IRQ_BASE + 68
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#define K230_IRQ_GPIO1_21 K230_IRQ_BASE + 69
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#define K230_IRQ_GPIO1_22 K230_IRQ_BASE + 70
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#define K230_IRQ_GPIO1_23 K230_IRQ_BASE + 71
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#define K230_IRQ_GPIO1_24 K230_IRQ_BASE + 72
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#define K230_IRQ_GPIO1_25 K230_IRQ_BASE + 73
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#define K230_IRQ_GPIO1_26 K230_IRQ_BASE + 74
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#define K230_IRQ_GPIO1_27 K230_IRQ_BASE + 75
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#define K230_IRQ_GPIO1_28 K230_IRQ_BASE + 76
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#define K230_IRQ_GPIO1_29 K230_IRQ_BASE + 77
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#define K230_IRQ_GPIO1_30 K230_IRQ_BASE + 78
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#define K230_IRQ_GPIO1_31 K230_IRQ_BASE + 79
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#define K230_IRQ_AUDIO K230_IRQ_BASE + 80
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#define K230_IRQ_JAMLINK0 K230_IRQ_BASE + 81
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#define K230_IRQ_JAMLINK1 K230_IRQ_BASE + 82
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#define K230_IRQ_JAMLINK2 K230_IRQ_BASE + 83
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#define K230_IRQ_JAMLINK3 K230_IRQ_BASE + 84
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#define K230_IRQ_TIMER0 K230_IRQ_BASE + 85
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#define K230_IRQ_TIMER1 K230_IRQ_BASE + 86
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#define K230_IRQ_TIMER2 K230_IRQ_BASE + 87
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#define K230_IRQ_TIMER3 K230_IRQ_BASE + 88
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#define K230_IRQ_TIMER4 K230_IRQ_BASE + 89
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#define K230_IRQ_TIMER5 K230_IRQ_BASE + 90
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#define K230_IRQ_WDT0 K230_IRQ_BASE + 91
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#define K230_IRQ_WDT1 K230_IRQ_BASE + 92
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#define K230_IRQ_MB_CPU12CPU0_0 K230_IRQ_BASE + 93
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#define K230_IRQ_MB_CPU12CPU0_1 K230_IRQ_BASE + 94
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#define K230_IRQ_MB_CPU02CPU1_0 K230_IRQ_BASE + 95
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#define K230_IRQ_MB_CPU02CPU1_1 K230_IRQ_BASE + 96
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#define K230_IRQ_SYSCTL K230_IRQ_BASE + 97
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#define K230_IRQ_ISP_VI K230_IRQ_BASE + 98
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#define K230_IRQ_IPI_END_FRAME0 K230_IRQ_BASE + 99
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#define K230_IRQ_IPI_END_FRAME_2IF0 K230_IRQ_BASE + 100
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#define K230_IRQ_IPI_END_FRAME_3IF0 K230_IRQ_BASE + 101
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#define K230_IRQ_IPI_END_FRAME1 K230_IRQ_BASE + 102
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#define K230_IRQ_IPI_END_FRAME_2IF1 K230_IRQ_BASE + 103
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#define K230_IRQ_IPI_END_FRAME_3IF1 K230_IRQ_BASE + 104
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#define K230_IRQ_IPI_END_FRAME2 K230_IRQ_BASE + 105
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#define K230_IRQ_IPI_END_FRAME_2IF2 K230_IRQ_BASE + 106
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#define K230_IRQ_IPI_END_FRAME_3IF2 K230_IRQ_BASE + 107
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#define K230_IRQ_ISP0 K230_IRQ_BASE + 108
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#define K230_IRQ_ISP1 K230_IRQ_BASE + 109
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#define K230_IRQ_ISP2 K230_IRQ_BASE + 110
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#define K230_IRQ_ISP_MI0 K230_IRQ_BASE + 111
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#define K230_IRQ_ISP_FE0 K230_IRQ_BASE + 112
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#define K230_IRQ_ISP_IRQ0 K230_IRQ_BASE + 113
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#define K230_IRQ_ISP_DWE K230_IRQ_BASE + 114
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#define K230_IRQ_ISP_FE K230_IRQ_BASE + 115
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#define K230_IRQ_VIDEO K230_IRQ_BASE + 116
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#define K230_IRQ_DISP_VO K230_IRQ_BASE + 117
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#define K230_IRQ_DISP_DSI K230_IRQ_BASE + 118
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#define K230_IRQ_DISP_XAQ2 K230_IRQ_BASE + 119
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#define K230_IRQ_DWC_DDRPHY K230_IRQ_BASE + 120
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#define K230_IRQ_DFI_ALERT_ERR K230_IRQ_BASE + 121
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#define K230_IRQ_DECOMP_CTRL K230_IRQ_BASE + 122
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#define K230_IRQ_PDMA K230_IRQ_BASE + 123
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#define K230_IRQ_GSDMA K230_IRQ_BASE + 124
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#define K230_IRQ_NONAI_2D K230_IRQ_BASE + 125
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#define K230_IRQ_SD0 K230_IRQ_BASE + 126
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#define K230_IRQ_SD0_WAKEUP K230_IRQ_BASE + 127
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#define K230_IRQ_SD1 K230_IRQ_BASE + 128
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#define K230_IRQ_SD1_WAKEUP K230_IRQ_BASE + 129
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#define K230_IRQ_SSI0_TXE K230_IRQ_BASE + 130
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#define K230_IRQ_SSI0_TXO K230_IRQ_BASE + 131
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#define K230_IRQ_SSI0_RXF K230_IRQ_BASE + 132
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#define K230_IRQ_SSI0_RXO K230_IRQ_BASE + 133
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#define K230_IRQ_SSI0_TXU K230_IRQ_BASE + 134
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#define K230_IRQ_SSI0_RXU K230_IRQ_BASE + 135
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#define K230_IRQ_SSI0_MST K230_IRQ_BASE + 136
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#define K230_IRQ_SSI0_DONE K230_IRQ_BASE + 137
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#define K230_IRQ_SSI0_AXIE K230_IRQ_BASE + 138
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#define K230_IRQ_SSI1_TXE K230_IRQ_BASE + 139
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#define K230_IRQ_SSI1_TXO K230_IRQ_BASE + 140
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#define K230_IRQ_SSI1_RXF K230_IRQ_BASE + 141
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#define K230_IRQ_SSI1_RXO K230_IRQ_BASE + 142
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#define K230_IRQ_SSI1_TXU K230_IRQ_BASE + 143
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#define K230_IRQ_SSI1_RXU K230_IRQ_BASE + 144
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#define K230_IRQ_SSI1_MST K230_IRQ_BASE + 145
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#define K230_IRQ_SSI1_DONE K230_IRQ_BASE + 146
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#define K230_IRQ_SSI1_AXIE K230_IRQ_BASE + 147
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#define K230_IRQ_SSI2_TXE K230_IRQ_BASE + 148
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#define K230_IRQ_SSI2_TXO K230_IRQ_BASE + 149
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#define K230_IRQ_SSI2_RXF K230_IRQ_BASE + 150
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#define K230_IRQ_SSI2_RXO K230_IRQ_BASE + 151
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#define K230_IRQ_SSI2_TXU K230_IRQ_BASE + 152
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#define K230_IRQ_SSI2_RXU K230_IRQ_BASE + 153
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#define K230_IRQ_SSI2_MST K230_IRQ_BASE + 154
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#define K230_IRQ_SSI2_DONE K230_IRQ_BASE + 155
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#define K230_IRQ_SSI2_AXIE K230_IRQ_BASE + 156
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#define K230_IRQ_OTG0 K230_IRQ_BASE + 157
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#define K230_IRQ_OTG1 K230_IRQ_BASE + 158
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#define K230_IRQ_PMU K230_IRQ_BASE + 159
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#define K230_IRQ_OBS_MAINFAULT0 K230_IRQ_BASE + 160
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#define K230_IRQ_OBS_MAINFAULT1 K230_IRQ_BASE + 161
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#define K230_IRQ_MCTL_PROBE0 K230_IRQ_BASE + 162
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#define K230_IRQ_MCTL_PROBE1 K230_IRQ_BASE + 163
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#define K230_IRQ_MCTL_PROBE2 K230_IRQ_BASE + 164
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#define K230_IRQ_MCTL_PROBE3 K230_IRQ_BASE + 165
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#define K230_IRQ_MCTL_PROBE4 K230_IRQ_BASE + 166
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#define K230_IRQ_SRAM_PROBE0 K230_IRQ_BASE + 167
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#define K230_IRQ_SRAM_PROBE1 K230_IRQ_BASE + 168
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#define K230_IRQ_SEC K230_IRQ_BASE + 169
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#define K230_IRQ_DPU K230_IRQ_BASE + 170
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#define K230_IRQ_DPU_INT_TYPE0 K230_IRQ_BASE + 171
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#define K230_IRQ_DPU_INT_TYPE1 K230_IRQ_BASE + 172
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#define K230_IRQ_GNNE K230_IRQ_BASE + 173
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#define K230_IRQ_FFT K230_IRQ_BASE + 174
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#define K230_IRQ_AI_2D K230_IRQ_BASE + 175
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#define K230_IRQ_CPU0CPU1_PAR_VIO K230_IRQ_BASE + 176
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#define K230_IRQ_ADC0 K230_IRQ_BASE + 177
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#define K230_IRQ_ADC1 K230_IRQ_BASE + 178
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#define K230_IRQ_ADC2 K230_IRQ_BASE + 179
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#define K230_IRQ_PDMA_CHANNEL1 K230_IRQ_BASE + 180
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#define K230_IRQ_PDMA_CHANNEL2 K230_IRQ_BASE + 181
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#define K230_IRQ_PDMA_CHANNEL3 K230_IRQ_BASE + 182
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#define K230_IRQ_PDMA_CHANNEL4 K230_IRQ_BASE + 183
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#define K230_IRQ_PDMA_CHANNEL5 K230_IRQ_BASE + 184
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#define K230_IRQ_PDMA_CHANNEL6 K230_IRQ_BASE + 185
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#define K230_IRQ_PDMA_CHANNEL7 K230_IRQ_BASE + 186
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#define K230_IRQ_PDMA_ALL_CHANNEL K230_IRQ_BASE + 187
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#define K230_IRQ_ISP_VSE K230_IRQ_BASE + 188

‎bsp/k230/drivers/interdrv/gpio/drv_gpio.h‎

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@@ -32,9 +32,11 @@
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#ifndef DRV_GPIO_H__
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#define DRV_GPIO_H__
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35+
#include "board.h"
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3537
#define GPIO_IRQ_MAX_NUM (64)
3638
#define GPIO_MAX_NUM (64+8)
37-
#define IRQN_GPIO0_INTERRUPT 32
39+
#define IRQN_GPIO0_INTERRUPT K230_IRQ_GPIO0_0
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/* k230 gpio register table */
4042
#define DATA_OUTPUT 0x0

‎bsp/k230/drivers/interdrv/hwtimer/drv_timer.h‎

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@@ -34,6 +34,7 @@
3434
#include <stdint.h>
3535
#include <drivers/hwtimer.h>
3636
#include "sysctl_clk.h"
37+
#include "board.h"
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3839
#define MHz 1000000
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/* TIMER Control Register */
@@ -44,12 +45,12 @@
4445
#define TIMER_CR_INTERRUPT_MASK 0x00000004
4546
#define TIMER_CR_PWM_ENABLE 0x00000008
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47-
#define IRQN_TIMER_0_INTERRUPT 16+85
48-
#define IRQN_TIMER_1_INTERRUPT 16+86
49-
#define IRQN_TIMER_2_INTERRUPT 16+87
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#define IRQN_TIMER_3_INTERRUPT 16+88
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#define IRQN_TIMER_4_INTERRUPT 16+89
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#define IRQN_TIMER_5_INTERRUPT 16+90
48+
#define IRQN_TIMER_0_INTERRUPT K230_IRQ_TIMER0
49+
#define IRQN_TIMER_1_INTERRUPT K230_IRQ_TIMER1
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#define IRQN_TIMER_2_INTERRUPT K230_IRQ_TIMER2
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#define IRQN_TIMER_3_INTERRUPT K230_IRQ_TIMER3
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#define IRQN_TIMER_4_INTERRUPT K230_IRQ_TIMER4
53+
#define IRQN_TIMER_5_INTERRUPT K230_IRQ_TIMER5
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5455
typedef struct _timer_regs_channel
5556
{

‎bsp/k230/drivers/interdrv/pdma/drv_pdma.h‎

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@@ -33,6 +33,7 @@
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#define DRV_PDMA_H_
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3535
#include <rtdef.h>
36+
#include "board.h"
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3738
/**
3839
* @brief PDMA channel enumeration
@@ -71,20 +72,17 @@ typedef enum pdma_ch {
7172
/* Combined interrupt masks */
7273
#define PDMA_ALL_INTS (PDMA_PDONE_INT | PDMA_PITEM_INT | PDMA_PPAUSE_INT | PDMA_PTOUT_INT) /**< All PDMA interrupts mask */
7374

74-
#define PDMA_IRQ_OFFSET 16
75-
7675
/**
7776
* @brief PDMA channel interrupt numbers
78-
* @note These values equal (manual_specified_IRQ + PDMA_IRQ_OFFSET)
7977
*/
80-
#define PDMA_CHANNEL0_IRQn (123 + PDMA_IRQ_OFFSET) /**< Channel 0 IRQ number */
81-
#define PDMA_CHANNEL1_IRQn (180 + PDMA_IRQ_OFFSET) /**< Channel 1 IRQ number */
82-
#define PDMA_CHANNEL2_IRQn (181 + PDMA_IRQ_OFFSET) /**< Channel 2 IRQ number */
83-
#define PDMA_CHANNEL3_IRQn (182 + PDMA_IRQ_OFFSET) /**< Channel 3 IRQ number */
84-
#define PDMA_CHANNEL4_IRQn (183 + PDMA_IRQ_OFFSET) /**< Channel 4 IRQ number */
85-
#define PDMA_CHANNEL5_IRQn (184 + PDMA_IRQ_OFFSET) /**< Channel 5 IRQ number */
86-
#define PDMA_CHANNEL6_IRQn (185 + PDMA_IRQ_OFFSET) /**< Channel 6 IRQ number */
87-
#define PDMA_CHANNEL7_IRQn (186 + PDMA_IRQ_OFFSET) /**< Channel 7 IRQ number */
78+
#define PDMA_CHANNEL0_IRQn K230_IRQ_PDMA /**< Channel 0 IRQ number */
79+
#define PDMA_CHANNEL1_IRQn K230_IRQ_PDMA_CHANNEL1 /**< Channel 1 IRQ number */
80+
#define PDMA_CHANNEL2_IRQn K230_IRQ_PDMA_CHANNEL2 /**< Channel 2 IRQ number */
81+
#define PDMA_CHANNEL3_IRQn K230_IRQ_PDMA_CHANNEL3 /**< Channel 3 IRQ number */
82+
#define PDMA_CHANNEL4_IRQn K230_IRQ_PDMA_CHANNEL4 /**< Channel 4 IRQ number */
83+
#define PDMA_CHANNEL5_IRQn K230_IRQ_PDMA_CHANNEL5 /**< Channel 5 IRQ number */
84+
#define PDMA_CHANNEL6_IRQn K230_IRQ_PDMA_CHANNEL6 /**< Channel 6 IRQ number */
85+
#define PDMA_CHANNEL7_IRQn K230_IRQ_PDMA_CHANNEL7 /**< Channel 7 IRQ number */
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8987
/**
9088
* @brief PDMA channel state enumeration

‎bsp/k230/drivers/interdrv/sdio/drv_sdhci.h‎

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -7,12 +7,14 @@
77
#ifndef __DRV_SDHCI__
88
#define __DRV_SDHCI__
99

10+
#include "board.h"
11+
1012
#define false 0
1113
#define true 1
1214
#define SDEMMC0_BASE 0x91580000
1315
#define SDEMMC1_BASE 0x91581000
14-
#define IRQN_SD0 142
15-
#define IRQN_SD1 144
16+
#define IRQN_SD0 K230_IRQ_SD0
17+
#define IRQN_SD1 K230_IRQ_SD1
1618

1719
/*
1820
* Controller registers

‎bsp/k230/drivers/interdrv/uart/drv_uart.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -17,7 +17,7 @@
1717
#define UART_DEFAULT_BAUDRATE 115200
1818
#define UART_CLK 50000000
1919
#define UART_ADDR UART0_BASE_ADDR
20-
#define UART_IRQ 0x10
20+
#define UART_IRQ K230_IRQ_UART0
2121

2222

2323
#define UART_RBR (0x00) /* receive buffer register */

‎bsp/k230/drivers/utest/test_pdma.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -32,7 +32,7 @@
3232
#include "board.h"
3333
#include "drv_pdma.h"
3434

35-
#define UART0_IRQ 0x10
35+
#define UART0_IRQ K230_IRQ_UART0
3636

3737
#define CACHE_LINE_SIZE 64
3838

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