Skip to content

Commit 402732e

Browse files
committed
Merge branch 'master' of https://github.com/RT-Thread/rt-thread
2 parents 369557a + c5fd1aa commit 402732e

File tree

25 files changed

+694
-426
lines changed

25 files changed

+694
-426
lines changed

bsp/frdm-k64f/SConstruct

Lines changed: 2 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -30,8 +30,5 @@ Export('rtconfig')
3030
# prepare building environment
3131
objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
3232

33-
# build program
34-
env.Program(TARGET, objs)
35-
36-
# end building
37-
EndBuilding(TARGET)
33+
# do building
34+
DoBuilding(TARGET, objs)

bsp/stm32f40x/Libraries/SConscript

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -18,8 +18,8 @@ if rtconfig.CROSS_TOOL == 'gcc':
1818
src = src + ['CMSIS/ST/STM32F4xx/Source/Templates/gcc_ride7/startup_stm32f4xx.s']
1919
elif rtconfig.CROSS_TOOL == 'keil':
2020
src = src + ['CMSIS/ST/STM32F4xx/Source/Templates/arm/startup_stm32f4xx.s']
21-
# elif rtconfig.CROSS_TOOL == 'iar':
22-
# src = src + ['CMSIS/CM3/DeviceSupport/ST/STM32F10x/startup/iar/' + startup_scripts[rtconfig.STM32_TYPE]]
21+
elif rtconfig.CROSS_TOOL == 'iar':
22+
src = src + ['CMSIS/ST/STM32F4xx/Source/Templates/iar/startup_stm32f4xx.s']
2323

2424
path = [cwd + '/STM32F4xx_StdPeriph_Driver/inc',
2525
cwd + '/CMSIS/ST/STM32F4xx/Include',

bsp/stm32f40x/readme.md

Lines changed: 25 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,25 @@
1+
board info:
2+
STM32F4 discovery
3+
http://www.st.com/internet/evalboard/product/252419.jsp
4+
5+
note:
6+
in drivers/stm32f4xx_conf.h
7+
/* Redefine the HSE value; it's equal to 8 MHz on the STM32F4-DISCOVERY Kit */
8+
#define HSE_VALUE ((uint32_t)8000000)
9+
10+
11+
12+
**================= IAR WARNING =================**
13+
14+
after use `scons --target=iar -s` cmd to product IAR project, you have to add iar link file by hand
15+
16+
IAR steps:
17+
1. Project-->Options-->Linker
18+
2. Config-->Linker Configuration file
19+
3. select `Override Default`, then select `bsp/stm32f40x/stm32f40x_flash.icf`
20+
4. rebuild project
21+
22+
23+
**TODO**
24+
auto add *.icf by scons script
25+

bsp/stm32f40x/readme.txt

Lines changed: 0 additions & 9 deletions
This file was deleted.

bsp/stm32f40x/stm32f40x_flash.icf

Lines changed: 33 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,33 @@
1+
/*###ICF### Section handled by ICF editor, don't touch! ****/
2+
/*-Editor annotation file-*/
3+
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4+
/*-Specials-*/
5+
define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6+
/*-Memory Regions-*/
7+
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
8+
define symbol __ICFEDIT_region_ROM_end__ = 0x0807FFFF;
9+
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
10+
define symbol __ICFEDIT_region_RAM_end__ = 0x2001FFFF; /*STM32 F446RE*/
11+
/*-Sizes-*/
12+
define symbol __ICFEDIT_size_cstack__ = 0x200;
13+
define symbol __ICFEDIT_size_heap__ = 0x000;
14+
/**** End of ICF editor section. ###ICF###*/
15+
16+
17+
define memory mem with size = 4G;
18+
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19+
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20+
21+
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22+
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23+
24+
initialize by copy { readwrite };
25+
do not initialize { section .noinit };
26+
27+
keep { section FSymTab };
28+
keep { section VSymTab };
29+
keep { section .rti_fn* };
30+
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
31+
32+
place in ROM_region { readonly };
33+
place in RAM_region { readwrite, block CSTACK, last block HEAP};

bsp/stm32f7-disco/drivers/board.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -25,7 +25,7 @@
2525
#include <rtthread.h>
2626
#include "board.h"
2727
#include "sram.h"
28-
28+
#include "drv_mpu.h"
2929

3030
/**
3131
* @addtogroup STM32
@@ -165,7 +165,7 @@ void HAL_ResumeTick(void)
165165
void rt_hw_board_init()
166166
{
167167
/* Configure the MPU attributes as Write Through */
168-
//mpu_init();
168+
mpu_init();
169169

170170
/* Enable the CPU Cache */
171171
CPU_CACHE_Enable();

bsp/stm32f7-disco/drivers/drv_mpu.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -81,4 +81,4 @@ int mpu_init(void)
8181
HAL_MPU_Enable(MPU_PRIVILEGED_DEFAULT);
8282
return 0;
8383
}
84-
INIT_BOARD_EXPORT(mpu_init);
84+
//INIT_BOARD_EXPORT(mpu_init);

components/dfs/filesystems/lwip/lwip_netdb.c

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -29,6 +29,7 @@ struct hostent *gethostbyname(const char *name)
2929
{
3030
return lwip_gethostbyname(name);
3131
}
32+
RTM_EXPORT(gethostbyname);
3233

3334
int gethostbyname_r(const char *name, struct hostent *ret, char *buf,
3435
size_t buflen, struct hostent **result, int *h_errnop)
@@ -40,6 +41,7 @@ void freeaddrinfo(struct addrinfo *ai)
4041
{
4142
lwip_freeaddrinfo(ai);
4243
}
44+
RTM_EXPORT(freeaddrinfo);
4345

4446
int getaddrinfo(const char *nodename,
4547
const char *servname,
@@ -48,3 +50,4 @@ int getaddrinfo(const char *nodename,
4850
{
4951
return lwip_getaddrinfo(nodename, servname, hints, res);
5052
}
53+
RTM_EXPORT(getaddrinfo);

components/dfs/filesystems/lwip/lwip_select.c

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -118,5 +118,6 @@ select(int maxfdp1, fd_set *readset, fd_set *writeset, fd_set *exceptset,
118118

119119
return result;
120120
}
121+
RTM_EXPORT(select);
121122

122123
#endif

0 commit comments

Comments
 (0)