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[bsp/gd32] 更新GD32 SPI驱动
1 parent bc4c036 commit 4028ee7

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2 files changed

+167
-33
lines changed

2 files changed

+167
-33
lines changed

‎bsp/gd32/arm/libraries/gd32_drivers/drv_spi.c‎

Lines changed: 159 additions & 30 deletions
Original file line numberDiff line numberDiff line change
@@ -11,7 +11,7 @@
1111

1212
#ifdef RT_USING_SPI
1313

14-
#if defined(BSP_USING_SPI0) || defined(BSP_USING_SPI1) || defined(BSP_USING_SPI2) || defined(BSP_USING_SPI3) || defined(BSP_USING_SPI4)
14+
#if defined(BSP_USING_SPI0) || defined(BSP_USING_SPI1) || defined(BSP_USING_SPI2) || defined(BSP_USING_SPI3) || defined(BSP_USING_SPI4) || defined(BSP_USING_SPI5)
1515
#define LOG_TAG "drv.spi"
1616

1717
#include <rtdbg.h>
@@ -31,6 +31,9 @@ static struct rt_spi_bus spi_bus3;
3131
#ifdef BSP_USING_SPI4
3232
static struct rt_spi_bus spi_bus4;
3333
#endif
34+
#ifdef BSP_USING_SPI5
35+
static struct rt_spi_bus spi_bus5;
36+
#endif
3437

3538
static const struct gd32_spi spi_bus_obj[] = {
3639

@@ -40,12 +43,16 @@ static const struct gd32_spi spi_bus_obj[] = {
4043
"spi0",
4144
RCU_SPI0,
4245
RCU_GPIOA,
46+
RCU_GPIOA,
47+
RCU_GPIOA,
4348
&spi_bus0,
4449
GPIOA,
45-
#if defined SOC_SERIES_GD32F4xx
50+
GPIOA,
51+
GPIOA,
52+
#if defined (SOC_SERIES_GD32F4xx) || defined (SOC_SERIES_GD32H7xx) || (defined SOC_SERIES_GD32F5xx)
4653
GPIO_AF_5,
4754
#endif
48-
#if defined SOC_SERIES_GD32E23x
55+
#if defined (SOC_SERIES_GD32E23x)
4956
GPIO_AF_0,
5057
#endif
5158
GPIO_PIN_5,
@@ -60,20 +67,20 @@ static const struct gd32_spi spi_bus_obj[] = {
6067
"spi1",
6168
RCU_SPI1,
6269
RCU_GPIOB,
70+
RCU_GPIOB,
71+
RCU_GPIOB,
6372
&spi_bus1,
6473
GPIOB,
65-
#if defined SOC_SERIES_GD32F4xx
74+
GPIOB,
75+
GPIOB,
76+
#if defined (SOC_SERIES_GD32F4xx) || defined (SOC_SERIES_GD32H7xx) || (defined SOC_SERIES_GD32F5xx)
6677
GPIO_AF_5,
6778
#endif
6879
#if defined SOC_SERIES_GD32E23x
6980
GPIO_AF_0,
7081
#endif
7182

72-
#if defined SOC_SERIES_GD32E23x
7383
GPIO_PIN_13,
74-
#else
75-
GPIO_PIN_12,
76-
#endif
7784
GPIO_PIN_14,
7885
GPIO_PIN_15,
7986
},
@@ -85,9 +92,13 @@ static const struct gd32_spi spi_bus_obj[] = {
8592
"spi2",
8693
RCU_SPI2,
8794
RCU_GPIOB,
95+
RCU_GPIOB,
96+
RCU_GPIOB,
8897
&spi_bus2,
8998
GPIOB,
90-
#if defined SOC_SERIES_GD32F4xx
99+
GPIOB,
100+
GPIOB,
101+
#if defined (SOC_SERIES_GD32F4xx) || defined (SOC_SERIES_GD32H7xx) || (defined SOC_SERIES_GD32F5xx)
91102
GPIO_AF_6,
92103
#endif
93104
GPIO_PIN_3,
@@ -102,9 +113,13 @@ static const struct gd32_spi spi_bus_obj[] = {
102113
"spi3",
103114
RCU_SPI3,
104115
RCU_GPIOE,
116+
RCU_GPIOE,
117+
RCU_GPIOE,
105118
&spi_bus3,
106-
GPIOB,
107-
#if defined SOC_SERIES_GD32F4xx
119+
GPIOE,
120+
GPIOE,
121+
GPIOE,
122+
#if defined (SOC_SERIES_GD32F4xx) || defined (SOC_SERIES_GD32H7xx) || (defined SOC_SERIES_GD32F5xx)
108123
GPIO_AF_5,
109124
#endif
110125
GPIO_PIN_2,
@@ -119,16 +134,43 @@ static const struct gd32_spi spi_bus_obj[] = {
119134
"spi4",
120135
RCU_SPI4,
121136
RCU_GPIOF,
137+
RCU_GPIOF,
138+
RCU_GPIOF,
122139
&spi_bus4,
123140
GPIOF,
124-
#if defined SOC_SERIES_GD32F4xx
141+
GPIOF,
142+
GPIOF,
143+
#if defined (SOC_SERIES_GD32F4xx) || defined (SOC_SERIES_GD32H7xx) || (defined SOC_SERIES_GD32F5xx)
125144
GPIO_AF_5,
126145
#endif
127146
GPIO_PIN_7,
128147
GPIO_PIN_8,
129148
GPIO_PIN_9,
130-
}
149+
150+
},
131151
#endif /* BSP_USING_SPI4 */
152+
153+
#ifdef BSP_USING_SPI5
154+
{
155+
SPI5,
156+
"spi5",
157+
RCU_SPI5,
158+
RCU_GPIOG,
159+
RCU_GPIOG,
160+
161+
RCU_GPIOG,
162+
&spi_bus5,
163+
GPIOG,
164+
GPIOG,
165+
GPIOG,
166+
#if defined (SOC_SERIES_GD32F4xx) || defined (SOC_SERIES_GD32H7xx) || (defined SOC_SERIES_GD32F5xx)
167+
GPIO_AF_5,
168+
#endif
169+
GPIO_PIN_13,
170+
GPIO_PIN_12,
171+
GPIO_PIN_14,
172+
}
173+
#endif /* BSP_USING_SPI5 */
132174
};
133175

134176
/* private rt-thread spi ops function */
@@ -150,17 +192,30 @@ static void gd32_spi_init(struct gd32_spi *gd32_spi)
150192
{
151193
/* enable SPI clock */
152194
rcu_periph_clock_enable(gd32_spi->spi_clk);
153-
rcu_periph_clock_enable(gd32_spi->gpio_clk);
195+
rcu_periph_clock_enable(gd32_spi->sck_gpio_clk);
196+
rcu_periph_clock_enable(gd32_spi->miso_gpio_clk);
197+
rcu_periph_clock_enable(gd32_spi->mosi_gpio_clk);
154198

155-
#if defined SOC_SERIES_GD32F4xx || defined SOC_SERIES_GD32E23x
199+
#if defined (SOC_SERIES_GD32F4xx) || defined (SOC_SERIES_GD32H7xx) || (defined SOC_SERIES_GD32F5xx) || (defined SOC_SERIES_GD32E23x)
156200
/*GPIO pin configuration*/
157-
gpio_af_set(gd32_spi->spi_port, gd32_spi->alt_func_num, gd32_spi->sck_pin | gd32_spi->mosi_pin | gd32_spi->miso_pin);
158-
159-
gpio_mode_set(gd32_spi->spi_port, GPIO_MODE_AF, GPIO_PUPD_NONE, gd32_spi->sck_pin | gd32_spi->mosi_pin | gd32_spi->miso_pin);
160-
#if defined SOC_SERIES_GD32E23x
161-
gpio_output_options_set(gd32_spi->spi_port, GPIO_OTYPE_PP, GPIO_OSPEED_50MHZ, gd32_spi->sck_pin | gd32_spi->mosi_pin | gd32_spi->miso_pin);
201+
gpio_af_set(gd32_spi->sck_spi_port, gd32_spi->alt_func_num, gd32_spi->sck_pin);
202+
gpio_af_set(gd32_spi->miso_spi_port, gd32_spi->alt_func_num, gd32_spi->miso_pin);
203+
gpio_af_set(gd32_spi->mosi_spi_port, gd32_spi->alt_func_num, gd32_spi->mosi_pin);
204+
gpio_mode_set(gd32_spi->sck_spi_port, GPIO_MODE_AF, GPIO_PUPD_NONE, gd32_spi->sck_pin);
205+
gpio_mode_set(gd32_spi->miso_spi_port, GPIO_MODE_AF, GPIO_PUPD_NONE, gd32_spi->miso_pin);
206+
gpio_mode_set(gd32_spi->mosi_spi_port, GPIO_MODE_AF, GPIO_PUPD_NONE, gd32_spi->mosi_pin);
207+
#if defined (SOC_SERIES_GD32H7xx)
208+
gpio_output_options_set(gd32_spi->sck_spi_port, GPIO_OTYPE_PP, GPIO_OSPEED_100_220MHZ, gd32_spi->sck_pin);
209+
gpio_output_options_set(gd32_spi->miso_spi_port, GPIO_OTYPE_PP, GPIO_OSPEED_100_220MHZ, gd32_spi->miso_pin);
210+
gpio_output_options_set(gd32_spi->mosi_spi_port, GPIO_OTYPE_PP, GPIO_OSPEED_100_220MHZ, gd32_spi->mosi_pin);
211+
#elif defined (SOC_SERIES_GD32E23x)
212+
gpio_output_options_set(gd32_spi->sck_spi_port, GPIO_OTYPE_PP, GPIO_OSPEED_50MHZ, gd32_spi->sck_pin);
213+
gpio_output_options_set(gd32_spi->miso_spi_port, GPIO_OTYPE_PP, GPIO_OSPEED_50MHZ, gd32_spi->miso_pin);
214+
gpio_output_options_set(gd32_spi->mosi_spi_port, GPIO_OTYPE_PP, GPIO_OSPEED_50MHZ, gd32_spi->mosi_pin);
162215
#else
163-
gpio_output_options_set(gd32_spi->spi_port, GPIO_OTYPE_PP, GPIO_OSPEED_MAX, gd32_spi->sck_pin | gd32_spi->mosi_pin | gd32_spi->miso_pin);
216+
gpio_output_options_set(gd32_spi->sck_spi_port, GPIO_OTYPE_PP, GPIO_OSPEED_MAX, gd32_spi->sck_pin);
217+
gpio_output_options_set(gd32_spi->miso_spi_port, GPIO_OTYPE_PP, GPIO_OSPEED_MAX, gd32_spi->miso_pin);
218+
gpio_output_options_set(gd32_spi->mosi_spi_port, GPIO_OTYPE_PP, GPIO_OSPEED_MAX, gd32_spi->mosi_pin);
164219
#endif
165220
#else
166221
/* Init SPI SCK MOSI */
@@ -186,6 +241,17 @@ static rt_err_t spi_configure(struct rt_spi_device* device,
186241
/* Init SPI */
187242
gd32_spi_init(spi_device);
188243

244+
#if defined SOC_SERIES_GD32H7xx
245+
/* data_width */
246+
if(configuration->data_width >=4 && configuration->data_width <= 32)
247+
{
248+
spi_init_struct.data_size = CFG0_DZ(configuration->data_width - 1);
249+
}
250+
else
251+
{
252+
return -RT_EIO;
253+
}
254+
#else
189255
/* data_width */
190256
if(configuration->data_width <= 8)
191257
{
@@ -199,6 +265,7 @@ static rt_err_t spi_configure(struct rt_spi_device* device,
199265
{
200266
return -RT_EIO;
201267
}
268+
#endif
202269

203270
/* baudrate */
204271
{
@@ -306,19 +373,30 @@ static rt_ssize_t spixfer(struct rt_spi_device* device, struct rt_spi_message* m
306373
struct rt_spi_bus * gd32_spi_bus = (struct rt_spi_bus *)device->bus;
307374
struct gd32_spi *spi_device = (struct gd32_spi *)gd32_spi_bus->parent.user_data;
308375
struct rt_spi_configuration * config = &device->config;
309-
rt_base_t cs_pin = (rt_base_t)device->parent.user_data;
310376
uint32_t spi_periph = spi_device->spi_periph;
311377

312378
RT_ASSERT(device != NULL);
313379
RT_ASSERT(message != NULL);
314380

315381
/* take CS */
316-
if(message->cs_take)
382+
if (message->cs_take && !(device->config.mode & RT_SPI_NO_CS) && (device->cs_pin != PIN_NONE))
317383
{
318-
rt_pin_write(cs_pin, PIN_LOW);
319-
LOG_D("spi take cs\n");
384+
if (device->config.mode & RT_SPI_CS_HIGH)
385+
{
386+
rt_pin_write(device->cs_pin, PIN_HIGH);
387+
}
388+
else
389+
{
390+
rt_pin_write(device->cs_pin, PIN_LOW);
391+
}
320392
}
321393

394+
LOG_D("%s transfer prepare and start", spi_drv->config->bus_name);
395+
LOG_D("%s sendbuf: %X, recvbuf: %X, length: %d",
396+
spi_drv->config->bus_name,
397+
(uint32_t)message->send_buf,
398+
(uint32_t)message->recv_buf, message->length);
399+
322400
{
323401
if(config->data_width <= 8)
324402
{
@@ -339,12 +417,20 @@ static rt_ssize_t spixfer(struct rt_spi_device* device, struct rt_spi_message* m
339417

340418
/* Todo: replace register read/write by gd32f4 lib */
341419
/* Wait until the transmit buffer is empty */
420+
#if defined (SOC_SERIES_GD32H7xx)
421+
while(RESET == spi_i2s_flag_get(spi_periph, SPI_FLAG_TP));
422+
#else
342423
while(RESET == spi_i2s_flag_get(spi_periph, SPI_FLAG_TBE));
424+
#endif
343425
/* Send the byte */
344426
spi_i2s_data_transmit(spi_periph, data);
345427

346428
/* Wait until a data is received */
429+
#if defined (SOC_SERIES_GD32H7xx)
430+
while(RESET == spi_i2s_flag_get(spi_periph, SPI_FLAG_RP));
431+
#else
347432
while(RESET == spi_i2s_flag_get(spi_periph, SPI_FLAG_RBNE));
433+
#endif
348434
/* Get the received data */
349435
data = spi_i2s_data_receive(spi_periph);
350436

@@ -371,12 +457,52 @@ static rt_ssize_t spixfer(struct rt_spi_device* device, struct rt_spi_message* m
371457
}
372458

373459
/* Wait until the transmit buffer is empty */
460+
#if defined (SOC_SERIES_GD32H7xx)
461+
while(RESET == spi_i2s_flag_get(spi_periph, SPI_FLAG_TP));
462+
#else
374463
while(RESET == spi_i2s_flag_get(spi_periph, SPI_FLAG_TBE));
464+
#endif
375465
/* Send the byte */
376466
spi_i2s_data_transmit(spi_periph, data);
377467

378468
/* Wait until a data is received */
469+
#if defined (SOC_SERIES_GD32H7xx)
470+
while(RESET == spi_i2s_flag_get(spi_periph, SPI_FLAG_RP));
471+
#else
379472
while(RESET == spi_i2s_flag_get(spi_periph, SPI_FLAG_RBNE));
473+
#endif
474+
/* Get the received data */
475+
data = spi_i2s_data_receive(spi_periph);
476+
477+
if(recv_ptr != RT_NULL)
478+
{
479+
*recv_ptr++ = data;
480+
}
481+
}
482+
}
483+
#if defined SOC_SERIES_GD32H7xx
484+
else if(config->data_width <= 32)
485+
{
486+
const rt_uint32_t * send_ptr = message->send_buf;
487+
rt_uint32_t * recv_ptr = message->recv_buf;
488+
rt_uint32_t size = message->length;
489+
490+
while(size--)
491+
{
492+
rt_uint32_t data = 0xFF;
493+
494+
if(send_ptr != RT_NULL)
495+
{
496+
data = *send_ptr++;
497+
}
498+
499+
/* Wait until the transmit buffer is empty */
500+
while(RESET == spi_i2s_flag_get(spi_periph, SPI_FLAG_TP));
501+
/* Send the byte */
502+
spi_i2s_data_transmit(spi_periph, data);
503+
504+
/* Wait until a data is received */
505+
while(RESET == spi_i2s_flag_get(spi_periph, SPI_FLAG_RP));
380506
/* Get the received data */
381507
data = spi_i2s_data_receive(spi_periph);
382508

@@ -386,13 +512,16 @@ static rt_ssize_t spixfer(struct rt_spi_device* device, struct rt_spi_message* m
386512
}
387513
}
388514
}
515+
#endif
389516
}
390517

391518
/* release CS */
392-
if(message->cs_release)
519+
if (message->cs_release && !(device->config.mode & RT_SPI_NO_CS) && (device->cs_pin != PIN_NONE))
393520
{
394-
rt_pin_write(cs_pin, PIN_HIGH);
395-
LOG_D("spi release cs\n");
521+
if (device->config.mode & RT_SPI_CS_HIGH)
522+
rt_pin_write(device->cs_pin, PIN_LOW);
523+
else
524+
rt_pin_write(device->cs_pin, PIN_HIGH);
396525
}
397526

398527
return message->length;
@@ -420,7 +549,7 @@ rt_err_t rt_hw_spi_device_attach(const char *bus_name, const char *device_name,
420549
rt_pin_write(cs_pin, PIN_HIGH);
421550
}
422551

423-
result = rt_spi_bus_attach_device(spi_device, device_name, bus_name, (void *)cs_pin);
552+
result = rt_spi_bus_attach_device_cspin(spi_device, device_name, bus_name, cs_pin, RT_NULL);
424553

425554
if (result != RT_EOK)
426555
{
@@ -455,6 +584,6 @@ int rt_hw_spi_init(void)
455584

456585
INIT_BOARD_EXPORT(rt_hw_spi_init);
457586

458-
#endif /* BSP_USING_SPI0 || BSP_USING_SPI1 || BSP_USING_SPI2 || BSP_USING_SPI3 || BSP_USING_SPI4*/
587+
#endif /* BSP_USING_SPI0 || BSP_USING_SPI1 || BSP_USING_SPI2 || BSP_USING_SPI3 || BSP_USING_SPI4 || BSP_USING_SPI5 */
459588
#endif /* RT_USING_SPI */
460589

‎bsp/gd32/arm/libraries/gd32_drivers/drv_spi.h‎

Lines changed: 8 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -13,6 +13,7 @@
1313

1414
#include <rthw.h>
1515
#include <rtthread.h>
16+
#include <rtdevice.h>
1617
#include <board.h>
1718

1819
#ifdef __cplusplus
@@ -31,10 +32,14 @@ struct gd32_spi
3132
uint32_t spi_periph;
3233
char *bus_name;
3334
rcu_periph_enum spi_clk;
34-
rcu_periph_enum gpio_clk;
35+
rcu_periph_enum sck_gpio_clk;
36+
rcu_periph_enum miso_gpio_clk;
37+
rcu_periph_enum mosi_gpio_clk;
3538
struct rt_spi_bus *spi_bus;
36-
uint32_t spi_port;
37-
#if defined SOC_SERIES_GD32F4xx || defined SOC_SERIES_GD32E23x
39+
uint32_t sck_spi_port;
40+
uint32_t miso_spi_port;
41+
uint32_t mosi_spi_port;
42+
#if defined SOC_SERIES_GD32F4xx || defined SOC_SERIES_GD32E23x || defined SOC_SERIES_GD32H7xx || defined SOC_SERIES_GD32F5xx
3843
uint32_t alt_func_num;
3944
#endif
4045
uint16_t sck_pin;

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