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zhuzhuzhuszhuzhuzhus
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do some format && change include
1 parent 25edf72 commit 4287aa7

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4 files changed

+73
-75
lines changed

4 files changed

+73
-75
lines changed

‎components/drivers/phy/general_phy.h‎

Lines changed: 36 additions & 36 deletions
Original file line numberDiff line numberDiff line change
@@ -12,16 +12,16 @@
1212
#define __PHY_GENERAL_H__
1313
/* The forced speed, 10Mb, 100Mb, gigabit, 2.5Gb, 10GbE. */
1414
#define SPEED_10 10
15-
#define SPEED_100 100
16-
#define SPEED_1000 1000
17-
#define SPEED_2500 2500
18-
#define SPEED_10000 10000
15+
#define SPEED_100 100
16+
#define SPEED_1000 1000
17+
#define SPEED_2500 2500
18+
#define SPEED_10000 10000
1919
/* Advertisement control register. */
2020
#define RT_ADVERTISE_SLCT 0x001f /* Selector bits */
2121
#define RT_ADVERTISE_CSMA 0x0001 /* Only selector supported */
22-
#define RT_ADVERTISE_10HALF 0x0020 /* Try for 10mbps half-duplex */
22+
#define RT_ADVERTISE_10HALF 0x0020 /* Try for 10mbps half-duplex */
2323
#define RT_ADVERTISE_1000XFULL 0x0020 /* Try for 1000BASE-X full-duplex */
24-
#define RT_ADVERTISE_10FULL 0x0040 /* Try for 10mbps full-duplex */
24+
#define RT_ADVERTISE_10FULL 0x0040 /* Try for 10mbps full-duplex */
2525
#define RT_ADVERTISE_1000XHALF 0x0040 /* Try for 1000BASE-X half-duplex */
2626
#define RT_ADVERTISE_100HALF 0x0080 /* Try for 100mbps half-duplex */
2727
#define RT_ADVERTISE_1000XPAUSE 0x0080 /* Try for 1000BASE-X pause */
@@ -31,7 +31,7 @@
3131
#define RT_ADVERTISE_PAUSE_CAP 0x0400 /* Try for pause */
3232
#define RT_ADVERTISE_PAUSE_ASYM 0x0800 /* Try for asymetric pause */
3333
#define RT_ADVERTISE_RESV 0x1000 /* Unused... */
34-
#define RT_ADVERTISE_RFAULT 0x2000 /* Say we can detect faults */
34+
#define RT_ADVERTISE_RFAULT 0x2000 /* Say we can detect faults */
3535
#define RT_ADVERTISE_LPACK 0x4000 /* Ack link partners response */
3636
#define RT_ADVERTISE_NPAGE 0x8000 /* Next page bit */
3737

@@ -47,14 +47,14 @@
4747
#define RT_ADVERTISED__100baseT_Full (1 << 3)
4848
#define RT_ADVERTISED__1000baseT_Half (1 << 4)
4949
#define RT_ADVERTISED__1000baseT_Full (1 << 5)
50-
#define RT_ADVERTISED__Autoneg (1 << 6)
51-
#define RT_ADVERTISED__TP (1 << 7)
52-
#define RT_ADVERTISED__AUI (1 << 8)
53-
#define RT_ADVERTISED__MII (1 << 9)
54-
#define RT_ADVERTISED__FIBRE (1 << 10)
55-
#define RT_ADVERTISED__BNC (1 << 11)
50+
#define RT_ADVERTISED__Autoneg (1 << 6)
51+
#define RT_ADVERTISED__TP (1 << 7)
52+
#define RT_ADVERTISED__AUI (1 << 8)
53+
#define RT_ADVERTISED__MII (1 << 9)
54+
#define RT_ADVERTISED__FIBRE (1 << 10)
55+
#define RT_ADVERTISED__BNC (1 << 11)
5656
#define RT_ADVERTISED__10000baseT_Full (1 << 12)
57-
#define RT_ADVERTISED__Pause (1 << 13)
57+
#define RT_ADVERTISED__Pause (1 << 13)
5858
#define RT_ADVERTISED__Asym_Pause (1 << 14)
5959
#define RT_ADVERTISED__2500baseX_Full (1 << 15)
6060
#define RT_ADVERTISED__Backplane (1 << 16)
@@ -67,44 +67,44 @@
6767

6868
/* Basic mode status register. */
6969
#define RT_BMSR_ERCAP 0x0001 /* Ext-reg capability */
70-
#define RT_BMSR_JCD 0x0002 /* Jabber detected */
70+
#define RT_BMSR_JCD 0x0002 /* Jabber detected */
7171
#define RT_BMSR_LSTATUS 0x0004 /* Link status */
7272
#define RT_BMSR_ANEGCAPABLE 0x0008 /* Able to do auto-negotiation */
7373
#define RT_BMSR_RFAULT 0x0010 /* Remote fault detected */
7474
#define RT_BMSR_ANEGCOMPLETE 0x0020 /* Auto-negotiation complete */
7575
#define RT_BMSR_RESV 0x00c0 /* Unused... */
7676
#define RT_BMSR_ESTATEN 0x0100 /* Extended Status in R15 */
77-
#define RT_BMSR_100HALF2 0x0200 /* Can do 100BASE-T2 HDX */
78-
#define RT_BMSR_100FULL2 0x0400 /* Can do 100BASE-T2 FDX */
77+
#define RT_BMSR_100HALF2 0x0200 /* Can do 100BASE-T2 HDX */
78+
#define RT_BMSR_100FULL2 0x0400 /* Can do 100BASE-T2 FDX */
7979
#define RT_BMSR_10HALF 0x0800 /* Can do 10mbps, half-duplex */
8080
#define RT_BMSR_10FULL 0x1000 /* Can do 10mbps, full-duplex */
8181
#define RT_BMSR_100HALF 0x2000 /* Can do 100mbps, half-duplex */
8282
#define RT_BMSR_100FULL 0x4000 /* Can do 100mbps, full-duplex */
83-
#define RT_BMSR_100BASE4 0x8000 /* Can do 100mbps, 4k packets */
83+
#define RT_BMSR_100BASE4 0x8000 /* Can do 100mbps, 4k packets */
8484
/* 1000BASE-T Control register */
8585
#define RT_ADVERTISE_1000FULL 0x0200 /* Advertise 1000BASE-T full duplex */
8686
#define RT_ADVERTISE_1000HALF 0x0100 /* Advertise 1000BASE-T half duplex */
87-
#define CTL1000_AS_MASTER 0x0800
87+
#define CTL1000_AS_MASTER 0x0800
8888
#define CTL1000_ENABLE_MASTER 0x1000
8989

9090
/* Duplex, half or full. */
9191
#define DUPLEX_HALF 0x00
9292
#define DUPLEX_FULL 0x01
9393

94-
#define AUTONEG_DISABLE 0x00
95-
#define AUTONEG_ENABLE 0x01
94+
#define AUTONEG_DISABLE 0x00
95+
#define AUTONEG_ENABLE 0x01
9696
#define RT_PHY_1000BTSR_MSCF 0x8000
9797
#define RT_PHY_1000BTSR_MSCR 0x4000
98-
#define RT_PHY_1000BTSR_LRS 0x2000
99-
#define RT_PHY_1000BTSR_RRS 0x1000
98+
#define RT_PHY_1000BTSR_LRS 0x2000
99+
#define RT_PHY_1000BTSR_RRS 0x1000
100100
#define RT_PHY_1000BTSR_1000FD 0x0800
101101
#define RT_PHY_1000BTSR_1000HD 0x0400
102102

103103
/* Link partner ability register. */
104-
#define RT_LINK_PARTNER__SLCT 0x001f /* Same as advertise selector */
105-
#define RT_LINK_PARTNER__10HALF 0x0020 /* Can do 10mbps half-duplex */
104+
#define RT_LINK_PARTNER__SLCT 0x001f /* Same as advertise selector */
105+
#define RT_LINK_PARTNER__10HALF 0x0020 /* Can do 10mbps half-duplex */
106106
#define RT_LINK_PARTNER__1000XFULL 0x0020 /* Can do 1000BASE-X full-duplex */
107-
#define RT_LINK_PARTNER__10FULL 0x0040 /* Can do 10mbps full-duplex */
107+
#define RT_LINK_PARTNER__10FULL 0x0040 /* Can do 10mbps full-duplex */
108108
#define RT_LINK_PARTNER__1000XHALF 0x0040 /* Can do 1000BASE-X half-duplex */
109109
#define RT_LINK_PARTNER__100HALF 0x0080 /* Can do 100mbps half-duplex */
110110
#define RT_LINK_PARTNER__1000XPAUSE 0x0080 /* Can do 1000BASE-X pause */
@@ -113,26 +113,26 @@
113113
#define RT_LINK_PARTNER__100BASE4 0x0200 /* Can do 100mbps 4k packets */
114114
#define RT_LINK_PARTNER__PAUSE_CAP 0x0400 /* Can pause */
115115
#define RT_LINK_PARTNER__PAUSE_ASYM 0x0800 /* Can pause asymetrically */
116-
#define RT_LINK_PARTNER__RESV 0x1000 /* Unused... */
117-
#define RT_LINK_PARTNER__RFAULT 0x2000 /* Link partner faulted */
118-
#define RT_LINK_PARTNER__LPACK 0x4000 /* Link partner acked us */
119-
#define RT_LINK_PARTNER__NPAGE 0x8000 /* Next page bit */
116+
#define RT_LINK_PARTNER__RESV 0x1000 /* Unused... */
117+
#define RT_LINK_PARTNER__RFAULT 0x2000 /* Link partner faulted */
118+
#define RT_LINK_PARTNER__LPACK 0x4000 /* Link partner acked us */
119+
#define RT_LINK_PARTNER__NPAGE 0x8000 /* Next page bit */
120120

121121
#define RT_LINK_PARTNER__DUPLEX (RT_LINK_PARTNER__10FULL | RT_LINK_PARTNER__100FULL)
122122
#define RT_LINK_PARTNER__100 (RT_LINK_PARTNER__100FULL | RT_LINK_PARTNER__100HALF | RT_LINK_PARTNER__100BASE4)
123123
/* Expansion register for auto-negotiation. */
124-
#define RT_EXPANSION_REG_NWAY 0x0001 /* Can do N-way auto-nego */
125-
#define RT_EXPANSION_REG_LCWP 0x0002 /* Got new RX page code word */
124+
#define RT_EXPANSION_REG_NWAY 0x0001 /* Can do N-way auto-nego */
125+
#define RT_EXPANSION_REG_LCWP 0x0002 /* Got new RX page code word */
126126
#define RT_EXPANSION_REG_ENABLENPAGE 0x0004 /* This enables npage words */
127-
#define RT_EXPANSION_REG_NPCAPABLE 0x0008 /* Link partner supports npage */
128-
#define RT_EXPANSION_REG_MFAULTS 0x0010 /* Multiple faults detected */
129-
#define RT_EXPANSION_REG_RESV 0xffe0 /* Unused... */
127+
#define RT_EXPANSION_REG_NPCAPABLE 0x0008 /* Link partner supports npage */
128+
#define RT_EXPANSION_REG_MFAULTS 0x0010 /* Multiple faults detected */
129+
#define RT_EXPANSION_REG_RESV 0xffe0 /* Unused... */
130130

131131
#define RT_SUPORT_1000B_XFULL 0x8000 /* Can do 1000BX Full */
132132
#define RT_SUPORT_1000B_XHALF 0x4000 /* Can do 1000BX Half */
133133
#define RT_SUPORT_1000B_TFULL 0x2000 /* Can do 1000BT Full */
134134
#define RT_SUPORT_1000B_THALF 0x1000 /* Can do 1000BT Half */
135-
#define RT_PHY_ANEG_TIMEOUT 4000
135+
#define RT_PHY_ANEG_TIMEOUT 4000
136136
struct rt_phy_device;
137137

138138
int rt_genphy_parse_link(struct rt_phy_device *phydev);

‎components/drivers/phy/mdio.h‎

Lines changed: 35 additions & 36 deletions
Original file line numberDiff line numberDiff line change
@@ -10,63 +10,62 @@
1010
#ifndef __PHY_MDIO_H__
1111
#define __PHY_MDIO_H__
1212
#include <rtthread.h>
13-
#include <drivers/phy.h>
13+
#include <rtdevice.h>
1414

1515
#define RT_MDIO_DEVAD_NONE (-1)
16-
#define RT_MDIO_MMD_PMAPMD 1 /* Physical Medium Attachment/
16+
#define RT_MDIO_MMD_PMAPMD 1 /* Physical Medium Attachment/
1717
* Physical Medium Dependent */
1818
#define RT_MDIO_MMD_WIS 2 /* WAN Interface Sublayer */
1919
#define RT_MDIO_MMD_PCS 3 /* Physical Coding Sublayer */
20-
#define RT_MDIO_MMD_PHYXS 4 /* PHY Extender Sublayer */
21-
#define RT_MDIO_MMD_DTEXS 5 /* DTE Extender Sublayer */
20+
#define RT_MDIO_MMD_PHYXS 4 /* PHY Extender Sublayer */
21+
#define RT_MDIO_MMD_DTEXS 5 /* DTE Extender Sublayer */
2222
#define RT_MDIO_MMD_TC 6 /* Transmission Convergence */
2323
#define RT_MDIO_MMD_AN 7 /* Auto-Negotiation */
24-
#define RT_MDIO_MMD_C22EXT 29 /* Clause 22 extension */
25-
#define RT_MDIO_MMD_VEND1 30 /* Vendor specific 1 */
26-
#define RT_MDIO_MMD_VEND2 31 /* Vendor specific 2 */
24+
#define RT_MDIO_MMD_C22EXT 29 /* Clause 22 extension */
25+
#define RT_MDIO_MMD_VEND1 30 /* Vendor specific 1 */
26+
#define RT_MDIO_MMD_VEND2 31 /* Vendor specific 2 */
2727

28-
/* Generic MII registers. */
29-
#define RT_MII_BMCR 0x00 /* Basic mode control register */
30-
#define RT_MII_BMSR 0x01 /* Basic mode status register */
28+
#define RT_MII_BMCR 0x00 /* Basic mode control register */
29+
#define RT_MII_BMSR 0x01 /* Basic mode status register */
3130
#define RT_MII_PHYSID1 0x02 /* PHYS ID 1 */
3231
#define RT_MII_PHYSID2 0x03 /* PHYS ID 2 */
33-
#define RT_MII_ADVERTISE 0x04 /* Advertisement control reg */
32+
#define RT_MII_ADVERTISE 0x04 /* Advertisement control reg */
3433
#define RT_MII_LPA 0x05 /* Link partner ability reg */
35-
#define RT_MII_EXPANSION 0x06 /* Expansion register */
34+
#define RT_MII_EXPANSION 0x06 /* Expansion register */
3635
#define RT_MII_CTRL1000 0x09 /* 1000BASE-T control */
3736
#define RT_MII_STAT1000 0x0a /* 1000BASE-T status */
3837
#define RT_MII_MMD_CTRL 0x0d /* MMD Access Control Register */
3938
#define RT_MII_MMD_DATA 0x0e /* MMD Access Data Register */
4039
#define RT_MII_ESTATUS 0x0f /* Extended Status */
4140
#define RT_MII_DCOUNTER 0x12 /* Disconnect counter */
42-
#define RT_MII_FCSCOUNTER 0x13 /* False carrier counter */
41+
#define RT_MII_FCSCOUNTER 0x13 /* False carrier counter */
4342
#define RT_MII_NWAYTEST 0x14 /* N-way auto-neg test reg */
44-
#define RT_MII_RERRCOUNTER 0x15 /* Receive error counter */
45-
#define RT_MII_SREVISION 0x16 /* Silicon revision */
43+
#define RT_MII_RERRCOUNTER 0x15 /* Receive error counter */
44+
#define RT_MII_SREVISION 0x16 /* Silicon revision */
4645
#define RT_MII_RESV1 0x17 /* Reserved... */
4746
#define RT_MII_LBRERROR 0x18 /* Lpback, rx, bypass error */
4847
#define RT_MII_PHYADDR 0x19 /* PHY address */
4948
#define RT_MII_RESV2 0x1a /* Reserved... */
50-
#define RT_MII_TPISTATUS 0x1b /* TPI status for 10mbps */
49+
#define RT_MII_TPISTATUS 0x1b /* TPI status for 10mbps */
5150
#define RT_MII_NCONFIG 0x1c /* Network interface config */
5251

5352
/* Basic mode control register. */
54-
#define RT_BMCR_RESV 0x003f /* Unused... */
53+
#define RT_BMCR_RESV 0x003f /* Unused... */
5554
#define RT_BMCR_SPEED1000 0x0040 /* MSB of Speed (1000) */
56-
#define RT_BMCR_CTST 0x0080 /* Collision test */
55+
#define RT_BMCR_CTST 0x0080 /* Collision test */
5756
#define RT_BMCR_FULLDPLX 0x0100 /* Full duplex */
5857
#define RT_BMCR_ANRESTART 0x0200 /* Auto negotiation restart */
59-
#define RT_BMCR_ISOLATE 0x0400 /* Isolate data paths from MII */
60-
#define RT_BMCR_PDOWN 0x0800 /* Enable low power state */
58+
#define RT_BMCR_ISOLATE 0x0400 /* Isolate data paths from MII */
59+
#define RT_BMCR_PDOWN 0x0800 /* Enable low power state */
6160
#define RT_BMCR_ANENABLE 0x1000 /* Enable auto negotiation */
6261
#define RT_BMCR_SPEED100 0x2000 /* Select 100Mbps */
6362
#define RT_BMCR_LOOPBACK 0x4000 /* TXD loopback bits */
64-
#define RT_BMCR_RESET 0x8000 /* Reset to default state */
65-
#define RT_BMCR_SPEED10 0x0000 /* Select 10Mbps */
63+
#define RT_BMCR_RESET 0x8000 /* Reset to default state */
64+
#define RT_BMCR_SPEED10 0x0000 /* Select 10Mbps */
6665

6766
#define RT_MII_MMD_CTRL_DEVAD_MASK 0x1f /* Mask MMD DEVAD*/
68-
#define RT_MII_MMD_CTRL_ADDR 0x0000 /* Address */
69-
#define RT_MII_MMD_CTRL_NOINCR 0x4000 /* no post increment */
67+
#define RT_MII_MMD_CTRL_ADDR 0x0000 /* Address */
68+
#define RT_MII_MMD_CTRL_NOINCR 0x4000 /* no post increment */
7069
#define RT_MII_MMD_CTRL_INCR_RDWT 0x8000 /* post increment on reads & writes */
7170
#define RT_MII_MMD_CTRL_INCR_ON_WT 0xC000 /* post increment on writes only */
7271

@@ -75,25 +74,25 @@
7574

7675
struct mii_bus
7776
{
78-
struct rt_list_node node;
77+
struct rt_list_node node;
7978
char name[RT_NAME_MAX];
80-
void *priv;
81-
int (*read)(struct mii_bus *bus, int addr, int devad, int reg);
82-
int (*write)(struct mii_bus *bus, int addr, int devad, int reg,rt_uint16_t val);
79+
void* priv;
80+
int (*read)(struct mii_bus* bus, int addr, int devad, int reg);
81+
int (*write)(struct mii_bus* bus, int addr, int devad, int reg, rt_uint16_t val);
8382
/** @read_c45: Perform a C45 read transfer on the bus */
84-
int (*read_c45)(struct mii_bus *bus, int addr, int devad, int reg);
83+
int (*read_c45)(struct mii_bus* bus, int addr, int devad, int reg);
8584
/** @write_c45: Perform a C45 write transfer on the bus */
86-
int (*write_c45)(struct mii_bus *bus, int addr, int devad,int reg, rt_uint16_t val);
87-
int (*reset)(struct mii_bus *bus);
88-
struct rt_phy_device *phymap[RT_PHY_MAX];
85+
int (*write_c45)(struct mii_bus* bus, int addr, int devad, int reg, rt_uint16_t val);
86+
int (*reset)(struct mii_bus* bus);
87+
struct rt_phy_device* phymap[RT_PHY_MAX];
8988
rt_uint32_t phy_mask;
9089
int reset_delay_us;
9190
int reset_post_delay_us;
9291
};
9392

94-
rt_err_t rt_mdio_register(struct mii_bus *bus);
95-
rt_err_t rt_mdio_unregister(struct mii_bus *bus);
93+
rt_err_t rt_mdio_register(struct mii_bus* bus);
94+
rt_err_t rt_mdio_unregister(struct mii_bus* bus);
9695

97-
struct mii_bus *rt_mdio_get_bus_by_name(const char *busname);
98-
struct mii_bus *rt_mdio_alloc(void);
96+
struct mii_bus* rt_mdio_get_bus_by_name(const char* busname);
97+
struct mii_bus* rt_mdio_alloc(void);
9998
#endif

‎components/drivers/phy/ofw.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -8,7 +8,7 @@
88
* 2024-09-25 zhujiale the first version
99
*/
1010
#include <rtthread.h>
11-
#include <drivers/phy.h>
11+
#include <rtdevice.h>
1212
#include <stdio.h>
1313
#define DBG_TAG "rtdm.phy"
1414
#define DBG_LVL DBG_INFO

‎components/drivers/phy/phy.c‎

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -10,8 +10,7 @@
1010
*/
1111
#include <stddef.h>
1212
#include <rthw.h>
13-
#include <drivers/phy.h>
14-
#include <drivers/core/bus.h>
13+
#include <rtdevice.h>
1514
#define DBG_TAG "rtdm.phy"
1615
#define DBG_LVL DBG_INFO
1716
#include <rtdbg.h>

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