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GuozhanxinGuozhanxin
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Merge pull request #5037 from Rbb666/master
添加ART-PI在rtthread主分支的bsp模板。
2 parents 54b7814 + b31ef3c commit 45440d2

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5 files changed

+243
-81
lines changed

5 files changed

+243
-81
lines changed

‎bsp/stm32/stm32h750-artpi-h750/applications/main.c‎

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -28,3 +28,12 @@ int main(void)
2828
rt_thread_mdelay(500);
2929
}
3030
}
31+
32+
#include "stm32h7xx.h"
33+
static int vtor_config(void)
34+
{
35+
/* Vector Table Relocation in Internal QSPI_FLASH */
36+
SCB->VTOR = QSPI_BASE;
37+
return 0;
38+
}
39+
INIT_BOARD_EXPORT(vtor_config);

‎bsp/stm32/stm32h750-artpi-h750/board/Kconfig‎

Lines changed: 85 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -9,12 +9,12 @@ config SOC_STM32H750XB
99

1010
menu "Onboard Peripheral Drivers"
1111

12-
config BSP_USING_QSPI_FLASH
13-
bool "Enable QSPI FLASH (W25Q64)"
14-
select BSP_USING_QSPI
15-
select RT_USING_SFUD
16-
select RT_SFUD_USING_QSPI
12+
config BSP_USING_USB_TO_USART
13+
bool "Enable Debuger USART (uart4)"
14+
select BSP_USING_UART
15+
select BSP_USING_UART4
1716
default n
17+
1818
endmenu
1919

2020
menu "On-chip Peripheral Drivers"
@@ -26,27 +26,96 @@ menu "On-chip Peripheral Drivers"
2626

2727
menuconfig BSP_USING_UART
2828
bool "Enable UART"
29-
default y
29+
default n
3030
select RT_USING_SERIAL
31+
select RT_SERIAL_USING_DMA
3132
if BSP_USING_UART
33+
config BSP_USING_UART1
34+
bool "Enable UART1"
35+
default n
36+
37+
config BSP_UART1_RX_USING_DMA
38+
bool "Enable UART1 RX DMA"
39+
depends on BSP_USING_UART1 && RT_SERIAL_USING_DMA
40+
default n
41+
42+
config BSP_UART1_TX_USING_DMA
43+
bool "Enable UART1 TX DMA"
44+
depends on BSP_USING_UART1 && RT_SERIAL_USING_DMA
45+
default n
46+
3247
config BSP_USING_UART3
3348
bool "Enable UART3"
34-
default y
35-
49+
default n
50+
3651
config BSP_USING_UART4
3752
bool "Enable UART4"
38-
default y
53+
default n
54+
55+
config BSP_USING_UART6
56+
bool "Enable UART6"
57+
default n
3958
endif
4059

41-
42-
43-
config BSP_USING_SDIO
44-
bool "Enable SDIO"
45-
select RT_USING_SDIO
46-
select RT_USING_DFS
60+
config BSP_USING_ONCHIP_RTC
61+
bool "Enable Onchip RTC"
62+
select RT_USING_RTC
4763
default n
4864

49-
65+
menuconfig BSP_USING_I2C
66+
bool "Enable I2C BUS (software simulation)"
67+
select RT_USING_I2C
68+
select RT_USING_I2C_BITOPS
69+
select RT_USING_PIN
70+
default n
71+
if BSP_USING_I2C
72+
menuconfig BSP_USING_I2C1
73+
bool "Enable I2C1 BUS (software simulation)"
74+
default n
75+
select RT_USING_I2C
76+
select RT_USING_I2C_BITOPS
77+
select RT_USING_PIN
78+
if BSP_USING_I2C1
79+
comment "Notice: PB6 --> 22; PB7 --> 23"
80+
config BSP_I2C1_SCL_PIN
81+
int "I2C1 scl pin number"
82+
range 0 175
83+
default 22
84+
config BSP_I2C1_SDA_PIN
85+
int "I2C1 sda pin number"
86+
range 0 175
87+
default 23
88+
endif
89+
menuconfig BSP_USING_I2C2
90+
bool "Enable I2C2 BUS (software simulation)"
91+
default n
92+
if BSP_USING_I2C2
93+
comment "Notice: PH13 --> 125; PH15 --> 127"
94+
config BSP_I2C2_SCL_PIN
95+
int "i2c2 scl pin number"
96+
range 1 176
97+
default 127
98+
config BSP_I2C2_SDA_PIN
99+
int "I2C2 sda pin number"
100+
range 0 175
101+
default 125
102+
endif
103+
menuconfig BSP_USING_I2C3
104+
bool "Enable I2C3 BUS (software simulation)"
105+
default n
106+
if BSP_USING_I2C3
107+
comment "Notice: PH12 --> 124; PH11 --> 123"
108+
config BSP_I2C3_SCL_PIN
109+
int "i2c3 scl pin number"
110+
range 0 175
111+
default 123
112+
config BSP_I2C3_SDA_PIN
113+
int "I2C3 sda pin number"
114+
range 0 175
115+
default 124
116+
endif
117+
endif
118+
50119
source "../libraries/HAL_Drivers/Kconfig"
51120

52121
endmenu

‎bsp/stm32/stm32h750-artpi-h750/board/board.c‎

Lines changed: 88 additions & 52 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* Copyright (c) 2006-2018, RT-Thread Development Team
2+
* Copyright (c) 2006-2021, RT-Thread Development Team
33
*
44
* SPDX-License-Identifier: Apache-2.0
55
*
@@ -16,59 +16,95 @@
1616
*/
1717
void SystemClock_Config(void)
1818
{
19-
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
20-
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
21-
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
19+
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
20+
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
21+
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
2222

23-
/** Supply configuration update enable
24-
*/
25-
HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);
26-
/** Configure the main internal regulator output voltage
27-
*/
28-
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE0);
23+
/** Supply configuration update enable
24+
*/
25+
HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);
26+
/** Configure the main internal regulator output voltage
27+
*/
28+
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE0);
2929

30-
while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
31-
/** Initializes the RCC Oscillators according to the specified parameters
32-
* in the RCC_OscInitTypeDef structure.
33-
*/
34-
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
35-
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
36-
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
37-
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
38-
RCC_OscInitStruct.PLL.PLLM = 5;
39-
RCC_OscInitStruct.PLL.PLLN = 192;
40-
RCC_OscInitStruct.PLL.PLLP = 2;
41-
RCC_OscInitStruct.PLL.PLLQ = 2;
42-
RCC_OscInitStruct.PLL.PLLR = 2;
43-
RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_2;
44-
RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE;
45-
RCC_OscInitStruct.PLL.PLLFRACN = 0;
46-
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
47-
{
48-
Error_Handler();
49-
}
50-
/** Initializes the CPU, AHB and APB buses clocks
51-
*/
52-
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
53-
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2
54-
|RCC_CLOCKTYPE_D3PCLK1|RCC_CLOCKTYPE_D1PCLK1;
55-
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
56-
RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
57-
RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2;
58-
RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2;
59-
RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2;
60-
RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2;
61-
RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2;
30+
while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
31+
32+
/** Initializes the RCC Oscillators according to the specified parameters
33+
* in the RCC_OscInitTypeDef structure.
34+
*/
35+
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
36+
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
37+
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
38+
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
39+
RCC_OscInitStruct.PLL.PLLM = 5;
40+
RCC_OscInitStruct.PLL.PLLN = 192;
41+
RCC_OscInitStruct.PLL.PLLP = 2;
42+
RCC_OscInitStruct.PLL.PLLQ = 2;
43+
RCC_OscInitStruct.PLL.PLLR = 2;
44+
RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_2;
45+
RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE;
46+
RCC_OscInitStruct.PLL.PLLFRACN = 0;
47+
48+
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
49+
{
50+
Error_Handler();
51+
}
52+
53+
/** Initializes the CPU, AHB and APB buses clocks
54+
*/
55+
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
56+
| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2
57+
| RCC_CLOCKTYPE_D3PCLK1 | RCC_CLOCKTYPE_D1PCLK1;
58+
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
59+
RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
60+
RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2;
61+
RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2;
62+
RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2;
63+
RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2;
64+
RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2;
65+
66+
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
67+
{
68+
Error_Handler();
69+
}
70+
71+
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_LTDC | RCC_PERIPHCLK_USART3
72+
| RCC_PERIPHCLK_UART4 | RCC_PERIPHCLK_SPI4
73+
| RCC_PERIPHCLK_SPI1 | RCC_PERIPHCLK_SDMMC
74+
| RCC_PERIPHCLK_ADC | RCC_PERIPHCLK_USB
75+
| RCC_PERIPHCLK_LPTIM1 | RCC_PERIPHCLK_FMC;
76+
PeriphClkInitStruct.PLL2.PLL2M = 2;
77+
PeriphClkInitStruct.PLL2.PLL2N = 64;
78+
PeriphClkInitStruct.PLL2.PLL2P = 2;
79+
PeriphClkInitStruct.PLL2.PLL2Q = 2;
80+
PeriphClkInitStruct.PLL2.PLL2R = 4;
81+
PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2VCIRANGE_3;
82+
PeriphClkInitStruct.PLL2.PLL2VCOSEL = RCC_PLL2VCOWIDE;
83+
PeriphClkInitStruct.PLL2.PLL2FRACN = 0;
84+
PeriphClkInitStruct.PLL3.PLL3M = 5;
85+
PeriphClkInitStruct.PLL3.PLL3N = 160;
86+
PeriphClkInitStruct.PLL3.PLL3P = 8;
87+
PeriphClkInitStruct.PLL3.PLL3Q = 8;
88+
PeriphClkInitStruct.PLL3.PLL3R = 24;
89+
PeriphClkInitStruct.PLL3.PLL3RGE = RCC_PLL3VCIRANGE_2;
90+
PeriphClkInitStruct.PLL3.PLL3VCOSEL = RCC_PLL3VCOWIDE;
91+
PeriphClkInitStruct.PLL3.PLL3FRACN = 0;
92+
PeriphClkInitStruct.FmcClockSelection = RCC_FMCCLKSOURCE_PLL2;
93+
PeriphClkInitStruct.SdmmcClockSelection = RCC_SDMMCCLKSOURCE_PLL2;
94+
PeriphClkInitStruct.Spi123ClockSelection = RCC_SPI123CLKSOURCE_PLL2;
95+
PeriphClkInitStruct.Spi45ClockSelection = RCC_SPI45CLKSOURCE_PLL3;
96+
PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_D2PCLK1;
97+
PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
98+
PeriphClkInitStruct.Lptim1ClockSelection = RCC_LPTIM1CLKSOURCE_LSI;
99+
PeriphClkInitStruct.AdcClockSelection = RCC_ADCCLKSOURCE_PLL2;
100+
101+
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
102+
{
103+
Error_Handler();
104+
}
62105

63-
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
64-
{
65-
Error_Handler();
66-
}
67-
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART3|RCC_PERIPHCLK_UART4;
68-
PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_D2PCLK1;
69-
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
70-
{
71-
Error_Handler();
72-
}
106+
/** Enable USB Voltage detector
107+
*/
108+
HAL_PWREx_EnableUSBVoltageDetector();
73109
}
74110

‎bsp/stm32/stm32h750-artpi-h750/board/board.h‎

Lines changed: 57 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* Copyright (c) 2006-2018, RT-Thread Development Team
2+
* Copyright (c) 2006-2021, RT-Thread Development Team
33
*
44
* SPDX-License-Identifier: Apache-2.0
55
*
@@ -20,12 +20,62 @@
2020
extern "C" {
2121
#endif
2222

23-
#define STM32_FLASH_START_ADRESS ((uint32_t)0x08000000)
24-
#define STM32_FLASH_SIZE (128 * 1024)
25-
#define STM32_FLASH_END_ADDRESS ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE))
23+
/*-------------------------- CHIP CONFIG BEGIN --------------------------*/
2624

27-
#define STM32_SRAM_SIZE (128)
28-
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
25+
#define CHIP_FAMILY_STM32
26+
#define CHIP_SERIES_STM32H7
27+
#define CHIP_NAME_STM32H750XBHX
28+
29+
/*-------------------------- CHIP CONFIG END --------------------------*/
30+
31+
/*-------------------------- ROM/RAM CONFIG BEGIN --------------------------*/
32+
#define ROM_START ((uint32_t)0x90000000)
33+
#define ROM_SIZE (16384)
34+
#define ROM_END ((uint32_t)(ROM_START + ROM_SIZE * 1024))
35+
36+
#define RAM_START (0x24000000)
37+
#define RAM_SIZE (512)
38+
#define RAM_END (RAM_START + RAM_SIZE * 1024)
39+
40+
/*-------------------------- ROM/RAM CONFIG END --------------------------*/
41+
42+
/*-------------------------- CLOCK CONFIG BEGIN --------------------------*/
43+
44+
#define BSP_CLOCK_SOURCE ("HSE")
45+
#define BSP_CLOCK_SOURCE_FREQ_MHZ ((int32_t)0)
46+
#define BSP_CLOCK_SYSTEM_FREQ_MHZ ((int32_t)480)
47+
48+
/*-------------------------- CLOCK CONFIG END --------------------------*/
49+
50+
/*-------------------------- UART CONFIG BEGIN --------------------------*/
51+
52+
/** After configuring corresponding UART or UART DMA, you can use it.
53+
*
54+
* STEP 1, define macro define related to the serial port opening based on the serial port number
55+
* such as #define BSP_USING_UATR1
56+
*
57+
* STEP 2, according to the corresponding pin of serial port, define the related serial port information macro
58+
* such as #define BSP_UART1_TX_PIN "PA9"
59+
* #define BSP_UART1_RX_PIN "PA10"
60+
*
61+
* STEP 3, if you want using SERIAL DMA, you must open it in the RT-Thread Settings.
62+
* RT-Thread Setting -> Components -> Device Drivers -> Serial Device Drivers -> Enable Serial DMA Mode
63+
*
64+
* STEP 4, according to serial port number to define serial port tx/rx DMA function in the board.h file
65+
* such as #define BSP_UART1_RX_USING_DMA
66+
*
67+
*/
68+
#define STM32_FLASH_START_ADRESS ROM_START
69+
#define STM32_FLASH_SIZE ROM_SIZE
70+
#define STM32_FLASH_END_ADDRESS ROM_END
71+
72+
#define RAM_START (0x24000000)
73+
#define RAM_SIZE (512)
74+
#define RAM_END (RAM_START + RAM_SIZE * 1024)
75+
76+
#define STM32_SRAM1_SIZE RAM_SIZE
77+
#define STM32_SRAM1_START RAM_START
78+
#define STM32_SRAM1_END RAM_END
2979

3080
#if defined(__CC_ARM) || defined(__CLANG_ARM)
3181
extern int Image$$RW_IRAM1$$ZI$$Limit;
@@ -38,7 +88,7 @@ extern int __bss_end;
3888
#define HEAP_BEGIN (&__bss_end)
3989
#endif
4090

41-
#define HEAP_END STM32_SRAM_END
91+
#define HEAP_END STM32_SRAM1_END
4292

4393
void SystemClock_Config(void);
4494

‎bsp/stm32/stm32h750-artpi-h750/board/linker_scripts/link.sct‎

Lines changed: 4 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -2,18 +2,16 @@
22
; *** Scatter-Loading Description File generated by uVision ***
33
; *************************************************************
44

5-
LR_IROM1 0x08000000 0x00020000 { ; load region size_region
6-
ER_IROM1 0x08000000 0x00020000 { ; load address = execution address
5+
LR_IROM1 0x90000000 0x00800000 { ; load region size_region
6+
ER_IROM1 0x90000000 0x00800000 { ; load address = execution address
77
*.o (RESET, +First)
88
*(InRoot$$Sections)
99
.ANY (+RO)
1010
.ANY (+XO)
1111
}
12-
RW_IRAM1 0x20000000 0x00020000 { ; RW data
13-
.ANY (+RW +ZI)
14-
}
15-
RW_IRAM2 0x24000000 0x00080000 {
12+
RW_IRAM1 0x24000000 0x00080000 { ; AXI SRAM 512K
1613
.ANY (+RW +ZI)
1714
}
1815
}
1916

17+

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