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HaryyZHaryyZ
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添加了spim的底层驱动和设备驱动
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‎bsp/nrf5x/libraries/drivers/drv_spim.c‎

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#include <stdint.h>
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#include <string.h>
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#include "board.h"
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#include "drv_spim.h"
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#include "nrfx_spim.h"
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#include "rtconfig.h"
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#include <rtthread.h>
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#include <rtdevice.h>
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#define DBG_LEVEL DBG_LOG
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#include <rtdbg.h>
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//#define LOG_TAG "drv.spim"
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#ifdef BSP_USING_SPIM
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#if defined(BSP_USING_SPIM0) || defined(BSP_USING_SPIM1) || defined(BSP_USING_SPIM2) || defined(BSP_USING_SPIM3)
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static struct nrfx_drv_spim_config spim_config[] =
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{
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#ifdef BSP_USING_SPIM0
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NRFX_SPIM0_CONFIG,
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#endif
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#ifdef BSP_USING_SPIM1
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NRFX_SPIM1_CONFIG,
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#endif
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#ifdef BSP_USING_SPIM2
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NRFX_SPIM2_CONFIG,
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#endif
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#ifdef BSP_USING_SPIM3
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NRFX_SPIM3_CONFIG,
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#endif
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};
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static struct nrfx_drv_spim spim_bus_obj[sizeof(spim_config) / sizeof(spim_config[0])];
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//Configure SPIM bus pins using the menuconfig
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static struct nrfx_drv_spim_pin_config bsp_spim_pin[] =
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{
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#ifdef BSP_USING_SPIM0
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{
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.sck_pin = BSP_SPIM0_SCK_PIN,
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.mosi_pin = BSP_SPIM0_MOSI_PIN,
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.miso_pin = BSP_SPIM0_MISO_PIN,
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.ss_pin = BSP_SPIM0_SS_PIN
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},
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#endif
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#ifdef BSP_USING_SPIM1
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{
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.sck_pin = BSP_SPIM1_SCK_PIN,
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.mosi_pin = BSP_SPIM1_MOSI_PIN,
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.miso_pin = BSP_SPIM1_MISO_PIN,
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.ss_pin = BSP_SPIM1_SS_PIN
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},
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#endif
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#ifdef BSP_USING_SPIM2
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{
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.sck_pin = BSP_SPIM2_SCK_PIN,
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.mosi_pin = BSP_SPIM2_MOSI_PIN,
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.miso_pin = BSP_SPIM2_MISO_PIN,
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.ss_pin = BSP_SPIM2_SS_PIN
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},
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#endif
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#ifdef BSP_USING_SPIM3
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{
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.sck_pin = BSP_SPIM3_SCK_PIN,
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.mosi_pin = BSP_SPIM3_MOSI_PIN,
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.miso_pin = BSP_SPIM3_MISO_PIN,
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.ss_pin = BSP_SPIM3_SS_PIN
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},
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#endif
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};
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static rt_uint8_t spim_index_find(struct rt_spi_bus *spi_bus)
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{
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for (int i = 0; i < sizeof(spim_config) / sizeof(spim_config[0]); i++)
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{
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if(spi_bus == &spim_bus_obj[i].spim_bus)
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return i;
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}
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return 0xFF;
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}
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/**
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* spi event handler function
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*/
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#ifdef BSP_USING_SPIM0
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static void spim0_handler(const nrfx_spim_evt_t *p_event, void *p_context)
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{
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LOG_I("\nspim0_handler");
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}
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#endif
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#ifdef BSP_USING_SPIM1
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static void spim1_handler(const nrfx_spim_evt_t *p_event, void *p_context)
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{
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LOG_I("\nspim1_handler");
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}
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#endif
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#ifdef BSP_USING_SPIM2
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static void spim2_handler(const nrfx_spim_evt_t *p_event, void *p_context)
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{
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return;
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}
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#endif
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#ifdef BSP_USING_SPIM3
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static void spim3_handler(const nrfx_spim_evt_t *p_event, void *p_context)
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{
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return;
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}
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#endif
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nrfx_spim_evt_handler_t spim_handler[] = {
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#ifdef BSP_USING_SPIM0
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spim0_handler,
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#endif
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#ifdef BSP_USING_SPIM1
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spim1_handler,
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#endif
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#ifdef BSP_USING_SPIM2
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spim2_handler,
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#endif
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#ifdef BSP_USING_SPIM3
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spim3_handler,
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#endif
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};
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/**
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* @brief This function config spi bus
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* @param device
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* @param configuration
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* @retval RT_EOK / -RT_ERROR
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*/
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static rt_err_t spim_configure(struct rt_spi_device *device,
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struct rt_spi_configuration *configuration)
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{
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RT_ASSERT(device != RT_NULL);
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RT_ASSERT(device->bus != RT_NULL);
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RT_ASSERT(device->bus->parent.user_data != RT_NULL);
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RT_ASSERT(configuration != RT_NULL);
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rt_uint8_t index = spim_index_find(device->bus);
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RT_ASSERT(index != 0xFF);
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nrfx_spim_t spim = spim_bus_obj[index].spim;
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nrfx_spim_config_t config = NRFX_SPIM_DEFAULT_CONFIG(bsp_spim_pin[index].sck_pin,
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bsp_spim_pin[index].mosi_pin,
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bsp_spim_pin[index].miso_pin,
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bsp_spim_pin[index].ss_pin);
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config.ss_active_high = false;
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/* spi config ss pin */
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/* spi config bit order */
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if(configuration->mode & RT_SPI_MSB)
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{
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config.bit_order = NRF_SPIM_BIT_ORDER_MSB_FIRST;
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}
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else
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{
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config.bit_order = NRF_SPIM_BIT_ORDER_LSB_FIRST;
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}
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/* spi mode config */
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switch (configuration->mode & NRF_SPIM_MODE_3)
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{
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case NRF_SPIM_MODE_0/* RT_SPI_CPOL:0 , RT_SPI_CPHA:0 */:
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config.mode = NRF_SPIM_MODE_0;
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break;
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case NRF_SPIM_MODE_1/* RT_SPI_CPOL:0 , RT_SPI_CPHA:1 */:
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config.mode = NRF_SPIM_MODE_1;
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break;
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case NRF_SPIM_MODE_2/* RT_SPI_CPOL:1 , RT_SPI_CPHA:0 */:
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config.mode = NRF_SPIM_MODE_2;
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break;
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case NRF_SPIM_MODE_3/* RT_SPI_CPOL:1 , RT_SPI_CPHA:1 */:
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config.mode = NRF_SPIM_MODE_3;
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break;
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default:
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LOG_E("spim_configure mode error %x\n",configuration->mode);
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return -RT_ERROR;
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}
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/* spi frequency config */
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switch (configuration->max_hz / 1000)
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{
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case 125:
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config.frequency = NRF_SPIM_FREQ_125K;
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break;
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case 250:
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config.frequency = NRF_SPIM_FREQ_250K;
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break;
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case 500:
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config.frequency = NRF_SPIM_FREQ_500K;
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break;
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case 1000:
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config.frequency = NRF_SPIM_FREQ_1M;
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break;
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case 2000:
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config.frequency = NRF_SPIM_FREQ_2M;
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break;
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case 4000:
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config.frequency = NRF_SPIM_FREQ_4M;
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break;
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case 8000:
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config.frequency = NRF_SPIM_FREQ_8M;
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break;
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case 16000:
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config.frequency = NRF_SPIM_FREQ_16M;
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break;
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case 32000:
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config.frequency = NRF_SPIM_FREQ_32M;
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break;
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default:
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LOG_E("spim_configure rate error %d\n",configuration->max_hz);
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break;
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}
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rt_memcpy((void*)&spim_bus_obj[index].spim_config, (void*)&config, sizeof(nrfx_spim_config_t));
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void * context = RT_NULL;
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nrfx_spim_evt_handler_t handler = RT_NULL; //spi send callback handler ,default NULL
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#if USING_SPI_DMA
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/* 创造、初始化完成量 */
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struct rt_completion *cpt = (struct rt_completion*)rt_malloc(sizeof(struct rt_completion));
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rt_completion_init(cpt);
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/* 创造、初始化spi关于dma的信息体 */
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struct spi_dma_message *mess = (struct spi_dma_message*)rt_malloc(sizeof(struct spi_dma_message));
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//step 1
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mess->cs_pin = device->cs_pin;
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//step 2
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mess->cs_take = 0;
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mess->cs_release = 0;
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//step 3
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mess->use_hw_ss = config.use_hw_ss;
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//step 4
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mess->ss_active_high = config.ss_active_high;
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//step 6
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mess->cpt = cpt;
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/* 赋值 */
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context = (void*)mess;
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handler = spim_handler[index];
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#endif
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nrfx_err_t nrf_ret = nrfx_spim_init(&spim, &config, handler, context);
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if(NRFX_SUCCESS == nrf_ret)
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return RT_EOK;
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else
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LOG_E("spim configure fail. %x", nrf_ret);
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return -RT_ERROR;
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}
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static rt_ssize_t spimxfer(struct rt_spi_device *device, struct rt_spi_message *message)
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{
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RT_ASSERT(device != RT_NULL);
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RT_ASSERT(device->bus != RT_NULL);
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RT_ASSERT(device->bus->parent.user_data != RT_NULL);
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rt_uint8_t index = spim_index_find(device->bus);
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nrfx_err_t nrf_ret;
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RT_ASSERT(index != 0xFF);
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nrfx_spim_t * p_instance = &(spim_bus_obj[index].spim);
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nrfx_spim_xfer_desc_t p_xfer_desc = NRFX_SPIM_XFER_TRX(message->send_buf, message->length, message->recv_buf, message->length);
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if(message->send_buf == RT_NULL)
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{
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p_xfer_desc.tx_length = 0;
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}
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if(message->recv_buf == RT_NULL)
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{
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p_xfer_desc.rx_length = 0;
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}
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nrf_ret = rtt_nrfx_spim_xfer(p_instance, &p_xfer_desc, 0, message, device);
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if( NRFX_SUCCESS != nrf_ret)
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{
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LOG_E("SPIM data transfer fail. %x", nrf_ret);
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return 0;
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}
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else
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{
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return message->length;
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}
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}
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/* spi bus callback function */
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static const struct rt_spi_ops nrfx_spim_ops =
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{
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.configure = spim_configure,
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.xfer = spimxfer,
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};
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/*spim bus init*/
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static int rt_hw_spim_bus_init(void)
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{
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rt_err_t result = -RT_ERROR;
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for (int i = 0; i < sizeof(spim_config) / sizeof(spim_config[0]); i++)
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{
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spim_bus_obj[i].spim = spim_config[i].spi;
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spim_bus_obj[i].spim_bus.parent.user_data = &spim_config[i]; //SPI INSTANCE
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result = rt_spi_bus_register(&spim_bus_obj[i].spim_bus, spim_config[i].bus_name, &nrfx_spim_ops);
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RT_ASSERT(result == RT_EOK);
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}
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return result;
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}
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int rt_hw_spim_init(void)
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{
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return rt_hw_spim_bus_init();
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}
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INIT_BOARD_EXPORT(rt_hw_spim_init);
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#endif /* BSP_USING_SPIM0 || BSP_USING_SPIM1 || BSP_USING_SPIM2 || BSP_USING_SPIM3 */
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#endif /*BSP_USING_SPIM*/
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