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[xuantie] 添加玄铁R,C全系列RTOS支持
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bsp/xuantie/libraries/xuantie_libraries/chip_riscv_dummy/src/arch/c906/SConscript renamed to bsp/xuantie/libraries/xuantie_libraries/chip_riscv_dummy/src/arch/c906fd/SConscript

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bsp/xuantie/libraries/xuantie_libraries/chip_riscv_dummy/src/arch/c906/startup.S renamed to bsp/xuantie/libraries/xuantie_libraries/chip_riscv_dummy/src/arch/c906fd/startup.S

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bsp/xuantie/libraries/xuantie_libraries/chip_riscv_dummy/src/arch/c906/system.c renamed to bsp/xuantie/libraries/xuantie_libraries/chip_riscv_dummy/src/arch/c906fd/system.c

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bsp/xuantie/libraries/xuantie_libraries/chip_riscv_dummy/src/arch/c906/trap_c.c renamed to bsp/xuantie/libraries/xuantie_libraries/chip_riscv_dummy/src/arch/c906fd/trap_c.c

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bsp/xuantie/libraries/xuantie_libraries/chip_riscv_dummy/src/arch/c906/vectors.S renamed to bsp/xuantie/libraries/xuantie_libraries/chip_riscv_dummy/src/arch/c906fd/vectors.S

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bsp/xuantie/libraries/xuantie_libraries/chip_riscv_dummy/src/arch/c908/SConscript renamed to bsp/xuantie/libraries/xuantie_libraries/chip_riscv_dummy/src/arch/c908v/SConscript

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bsp/xuantie/libraries/xuantie_libraries/chip_riscv_dummy/src/arch/c908/startup.S renamed to bsp/xuantie/libraries/xuantie_libraries/chip_riscv_dummy/src/arch/c908v/startup.S

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bsp/xuantie/libraries/xuantie_libraries/chip_riscv_dummy/src/arch/c908/system.c renamed to bsp/xuantie/libraries/xuantie_libraries/chip_riscv_dummy/src/arch/c908v/system.c

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bsp/xuantie/libraries/xuantie_libraries/chip_riscv_dummy/src/arch/c908/trap_c.c renamed to bsp/xuantie/libraries/xuantie_libraries/chip_riscv_dummy/src/arch/c908v/trap_c.c

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bsp/xuantie/libraries/xuantie_libraries/chip_riscv_dummy/src/arch/c908/vectors.S renamed to bsp/xuantie/libraries/xuantie_libraries/chip_riscv_dummy/src/arch/c908v/vectors.S

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