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add spi custom configuration function and enhance muti object initlization and setting
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+89
-28
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1 file changed

+89
-28
lines changed

bsp/ESP32_C3/drivers/drv_spi.c

Lines changed: 89 additions & 28 deletions
Original file line numberDiff line numberDiff line change
@@ -10,6 +10,7 @@
1010

1111
#include <rtthread.h>
1212
#include <rtdevice.h>
13+
#include <time.h>
1314

1415
#include "rtdef.h"
1516
#include "rttypes.h"
@@ -20,6 +21,7 @@
2021
#include "driver/spi_master.h"
2122

2223
#include "drv_spi.h"
24+
#include "drivers/dev_spi.h"
2325

2426
#ifdef RT_USING_SPI
2527
#ifdef BSP_USING_SPI2
@@ -29,7 +31,6 @@
2931
static struct rt_spi_bus spi_bus2;
3032

3133
static spi_device_handle_t spi;
32-
3334
static spi_bus_config_t buscfg;
3435

3536
static struct esp32_spi spi_bus_obj[] = {
@@ -62,20 +63,9 @@ static void esp32_spi_init(struct esp32_spi *esp32_spi)
6263
spi_configure(NULL,NULL);
6364
}
6465

65-
static void spi_pin_mode(rt_base_t pin)
66-
{
67-
gpio_config_t io_conf;
68-
io_conf.intr_type = GPIO_INTR_DISABLE;
69-
io_conf.mode = GPIO_MODE_OUTPUT;
70-
io_conf.pin_bit_mask = (1ULL << pin);
71-
io_conf.pull_down_en = 0;
72-
io_conf.pull_up_en = 1;
73-
}
74-
7566
static rt_err_t spi_configure(struct rt_spi_device* device,
7667
struct rt_spi_configuration* configuration)
7768
{
78-
/* spi_pin_mode(RT_BSP_SPI_CS_PIN);*/
7969
static spi_bus_config_t buscfg =
8070
{
8171
.miso_io_num=SPI2_IOMUX_PIN_NUM_MISO, /*MISO*/
@@ -89,20 +79,88 @@ static rt_err_t spi_configure(struct rt_spi_device* device,
8979
esp_err_t err = spi_bus_initialize(SPI2_HOST, &buscfg, SPI_DMA_CH_AUTO);
9080
ESP_ERROR_CHECK(err);
9181

92-
static spi_device_interface_config_t devcfg={
93-
.clock_speed_hz = SPI_MASTER_FREQ_8M,
94-
.mode = 0,
95-
.spics_io_num = RT_BSP_SPI_CS_PIN,
96-
.queue_size = 7,
97-
};
82+
static spi_device_interface_config_t devcfg;
83+
if(configuration->data_width == 8)
84+
{
85+
size_t length; ///< Total data length, in bits
86+
size_t rxlength; ///< Total data length received, should be not greater than ``length`` in full-duplex mode (0 defaults this to the value of ``length``)
87+
}
88+
89+
LOG_W("configuration->max_hz = %d \n",configuration->max_hz);
90+
if(configuration->max_hz >= SPI_MASTER_FREQ_80M)
91+
{
92+
devcfg.clock_speed_hz = SPI_MASTER_FREQ_80M; ///< 80MHz
93+
}
94+
else if(configuration->max_hz >= SPI_MASTER_FREQ_40M)
95+
{
96+
devcfg.clock_speed_hz = SPI_MASTER_FREQ_40M; ///< 40MHz
97+
}
98+
else if(configuration->max_hz >= SPI_MASTER_FREQ_26M)
99+
{
100+
devcfg.clock_speed_hz = SPI_MASTER_FREQ_26M; ///< 26.67MHz
101+
}
102+
else if(configuration->max_hz >= SPI_MASTER_FREQ_20M)
103+
{
104+
devcfg.clock_speed_hz = SPI_MASTER_FREQ_20M; ///< 20MHz
105+
}
106+
else if(configuration->max_hz >= SPI_MASTER_FREQ_16M)
107+
{
108+
devcfg.clock_speed_hz = SPI_MASTER_FREQ_16M; ///< 16MHz
109+
}
110+
else if(configuration->max_hz >= SPI_MASTER_FREQ_13M)
111+
{
112+
devcfg.clock_speed_hz = SPI_MASTER_FREQ_13M; ///< 13.33MHz
113+
}
114+
else if(configuration->max_hz >= SPI_MASTER_FREQ_11M)
115+
{
116+
devcfg.clock_speed_hz = SPI_MASTER_FREQ_11M; ///< 11.43MHz
117+
}
118+
else if(configuration->max_hz >= SPI_MASTER_FREQ_10M)
119+
{
120+
devcfg.clock_speed_hz = SPI_MASTER_FREQ_10M; ///< 10MHz
121+
}
122+
else if(configuration->max_hz >= SPI_MASTER_FREQ_9M)
123+
{
124+
devcfg.clock_speed_hz = SPI_MASTER_FREQ_9M ; ///< 8.89MHz
125+
}
126+
else
127+
{
128+
devcfg.clock_speed_hz = SPI_MASTER_FREQ_8M ;
129+
}
130+
131+
switch (configuration->mode)
132+
{
133+
case RT_SPI_MODE_0: /*!< CPOL = 0, CPHA = 0 */
134+
devcfg.mode = 0;
135+
case RT_SPI_MODE_1: /*!< CPOL = 0, CPHA = 1 */
136+
devcfg.mode = 1;
137+
case RT_SPI_MODE_2: /*!< CPOL = 1, CPHA = 0 */
138+
devcfg.mode = 2;
139+
case RT_SPI_MODE_3: /*!< CPOL = 1, CPHA = 1 */
140+
devcfg.mode = 3;
141+
default:
142+
devcfg.mode = 0;
143+
}
144+
145+
/* todo: support changing cs_pin,queue_size or specifing spi_device_interface_config_t and
146+
* spi_transaction_t by resever data.Meanwhile finish the initialization of interrupt
147+
* callback function and dma.
148+
*/
149+
150+
devcfg.spics_io_num = RT_BSP_SPI_CS_PIN;
151+
devcfg.queue_size = 7;
98152

99153
err = spi_bus_add_device(SPI2_HOST, &devcfg, &spi);
100154
ESP_ERROR_CHECK(err);
101155

102-
spi_bus_obj[0].bus_name = "spi2";
103-
spi_bus_obj[0].spi_bus = &spi_bus2;
104-
spi_bus_obj[0].esp32_spi_bus_cfg = &buscfg;
105-
156+
/* Although there is only one spi bus object, it will be a template for other bsps of ESP32 series */
157+
for(int i = 0; i < sizeof(spi_bus_obj)/sizeof(spi_bus_obj[0]); i++)
158+
{
159+
spi_bus_obj[i].bus_name = "spi2";
160+
spi_bus_obj[i].spi_bus = &spi_bus2;
161+
spi_bus_obj[i].esp32_spi_bus_cfg = &buscfg;
162+
}
163+
106164
return RT_EOK;
107165
};
108166

@@ -116,8 +174,8 @@ static rt_ssize_t spixfer(struct rt_spi_device* device, struct rt_spi_message* m
116174

117175
trans.tx_buffer = message->send_buf;
118176
trans.rx_buffer = message->recv_buf;
119-
trans.length = message->length;
120-
trans.rxlength = message->length;
177+
trans.length = (message->length)*8;
178+
trans.rxlength = (message->length)*8;
121179

122180
spi_device_acquire_bus(spi, portMAX_DELAY);
123181
esp_err_t err = spi_device_polling_transmit(spi, &trans);
@@ -161,12 +219,15 @@ int rt_hw_spi_init(void)
161219
{
162220
int result = 0;
163221

164-
spi_bus_obj[0].spi_bus->parent.user_data = (void *)&spi_bus_obj[0];
165-
result = rt_spi_bus_register(spi_bus_obj[0].spi_bus, spi_bus_obj[0].bus_name, &esp32_spi_ops);
222+
for(int i = 0; i < sizeof(spi_bus_obj)/sizeof(spi_bus_obj[0]); i++)
223+
{
224+
spi_bus_obj[i].spi_bus->parent.user_data = (void *)&spi_bus_obj[i];
225+
result = rt_spi_bus_register(spi_bus_obj[i].spi_bus, spi_bus_obj[i].bus_name, &esp32_spi_ops);
166226

167-
RT_ASSERT(result == RT_EOK);
227+
RT_ASSERT(result == RT_EOK);
168228

169-
LOG_D("%s bus init done", spi_bus_obj[i].bus_name);
229+
LOG_D("%s bus init done", spi_bus_obj[i].bus_name);
230+
}
170231

171232
return result;
172233
}

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