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bsp: k230: support pinctrl driver
Signed-off-by: Chen Wang <[email protected]>
1 parent 39dca86 commit 6a93936

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‎bsp/k230/drivers/interdrv/pinctl/SConscript‎

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# RT-Thread building script for component
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from building import *
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cwd = GetCurrentDir()
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src = Glob('*.c')
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CPPPATH = [cwd]
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group = DefineGroup('PINCTRL', src, depend = [], CPPPATH = CPPPATH)
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Return('group')

‎bsp/k230/drivers/interdrv/pinctl/drv_pinctrl.c‎

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/*
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* Copyright (c) 2006-2025 RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <rtthread.h>
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#include <ioremap.h>
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#include "board.h"
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#include "drv_pinctrl.h"
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#include <rtdbg.h>
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#define DBG_TAG "PINCTRL"
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#ifdef RT_DEBUG
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#define DBG_LVL DBG_LOG
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#else
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#define DBG_LVL DBG_WARNING
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#endif
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#define DBG_COLOR
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#define MAX_NUM_PIN 64
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#define IO_CFG_SEL_MASK 0x7
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#define IO_CFG_SEL_OFFSET 11
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#define IO_CFG_IE_MASK 0x1
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#define IO_CFG_IE_OFFSET 8
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#define IO_CFG_OE_MASK 0x1
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#define IO_CFG_OE_OFFSET 7
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#define IO_CFG_PU_MASK 0x1
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#define IO_CFG_PU_OFFSET 6
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#define IO_CFG_PD_MASK 0x1
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#define IO_CFG_PD_OFFSET 5
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#define IO_CFG_DRV_MASK 0xF
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#define IO_CFG_DRV_OFFSET 1
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#define IO_CFG_ST_MASK 0x1
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#define IO_CFG_ST_OFFSET 0
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volatile static rt_ubase_t pinctrl_base;
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static int check_pin(rt_uint32_t pin)
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{
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if (pin < 0 || pin > MAX_NUM_PIN)
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{
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LOG_E("pin %d is not valid\n", pin);
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return -RT_EINVAL;
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}
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return 0;
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}
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rt_inline rt_uint32_t _read32(rt_uint32_t pin)
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{
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return HWREG32(pinctrl_base + (pin * 4));
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}
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rt_inline void _write32(rt_uint32_t pin, rt_uint32_t value)
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{
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HWREG32(pinctrl_base + (pin * 4)) = value;
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}
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void k230_pinctrl_set_function(rt_uint32_t pin, rt_uint32_t func)
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{
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if (check_pin(pin) != 0)
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return;
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if (func > IOMUX_FUNC5)
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return;
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rt_uint32_t val = _read32(pin);
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val &= ~(IO_CFG_SEL_MASK << IO_CFG_SEL_OFFSET); /* Clear bits 11-13 */
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/* Set bits 11-13 to the function value */
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val |= (func << IO_CFG_SEL_OFFSET);
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_write32(pin, val);
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}
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void k230_pinctrl_set_ie(rt_uint32_t pin, rt_uint32_t ie)
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{
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if (check_pin(pin) != 0)
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return;
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rt_uint32_t val = _read32(pin);
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if (ie)
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val |= IO_CFG_IE_MASK << IO_CFG_IE_OFFSET;
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else
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val &= ~(IO_CFG_IE_MASK << IO_CFG_IE_OFFSET);
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_write32(pin, val);
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}
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void k230_pinctrl_set_oe(rt_uint32_t pin, rt_uint32_t oe)
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{
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if (check_pin(pin) != 0)
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return;
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rt_uint32_t val = _read32(pin);
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if (oe)
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val |= IO_CFG_OE_MASK << IO_CFG_OE_OFFSET;
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else
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val &= ~(IO_CFG_OE_MASK << IO_CFG_OE_OFFSET);
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_write32(pin, val);
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}
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void k230_pinctrl_set_pu(rt_uint32_t pin, rt_uint32_t pu)
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{
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if (check_pin(pin) != 0)
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return;
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rt_uint32_t val = _read32(pin);
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if (pu)
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val |= IO_CFG_PU_MASK << IO_CFG_PU_OFFSET;
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else
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val &= ~(IO_CFG_PU_MASK << IO_CFG_PU_OFFSET);
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_write32(pin, val);
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}
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void k230_pinctrl_set_pd(rt_uint32_t pin, rt_uint32_t pd)
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{
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if (check_pin(pin) != 0)
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return;
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rt_uint32_t val = _read32(pin);
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if (pd)
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val |= IO_CFG_PD_MASK << IO_CFG_PD_OFFSET;
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else
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val &= ~(IO_CFG_PD_MASK << IO_CFG_PD_OFFSET);
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_write32(pin, val);
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}
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void k230_pinctrl_set_drv(rt_uint32_t pin, rt_uint32_t drv)
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{
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if (check_pin(pin) != 0)
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return;
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/* FIXME: Unsupported yet */
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}
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void k230_pinctrl_set_st(rt_uint32_t pin, rt_uint32_t st)
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{
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if (check_pin(pin) != 0)
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return;
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rt_uint32_t val = _read32(pin);
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if (st)
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val |= IO_CFG_ST_MASK << IO_CFG_ST_OFFSET;
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else
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val &= ~(IO_CFG_ST_MASK << IO_CFG_ST_OFFSET);
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_write32(pin, val);
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}
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rt_uint32_t k230_pinctrl_get_regval(rt_uint32_t pin)
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{
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if (check_pin(pin) != 0)
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return 0;
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return _read32(pin);
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}
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int k230_pinctrl_init(void)
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{
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rt_err_t ret;
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pinctrl_base = (rt_ubase_t)rt_ioremap((void *)IOMUX_BASE_ADDR, IOMUX_IO_SIZE);
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return RT_EOK;
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}
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INIT_BOARD_EXPORT(k230_pinctrl_init);

‎bsp/k230/drivers/interdrv/pinctl/drv_pinctrl.h‎

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/*
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* Copyright (c) 2006-2025 RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef _DRV_PINCTRL_H_
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#define _DRV_PINCTRL_H_
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#include <rtthread.h>
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#define IOMUX_FUNC1 (rt_uint32_t)0
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#define IOMUX_FUNC2 (rt_uint32_t)1
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#define IOMUX_FUNC3 (rt_uint32_t)2
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#define IOMUX_FUNC4 (rt_uint32_t)3
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#define IOMUX_FUNC5 (rt_uint32_t)4
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void k230_pinctrl_set_function(rt_uint32_t pin, rt_uint32_t func);
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void k230_pinctrl_set_ie(rt_uint32_t pin, rt_uint32_t ie);
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void k230_pinctrl_set_oe(rt_uint32_t pin, rt_uint32_t oe);
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void k230_pinctrl_set_pu(rt_uint32_t pin, rt_uint32_t pu);
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void k230_pinctrl_set_pd(rt_uint32_t pin, rt_uint32_t pd);
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void k230_pinctrl_set_drv(rt_uint32_t pin, rt_uint32_t drv);
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void k230_pinctrl_set_st(rt_uint32_t pin, rt_uint32_t st);
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rt_uint32_t k230_pinctrl_get_regval(rt_uint32_t pin);
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#endif /* _DRV_PINCTRL_H_ */

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