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Merge pull request #25 from RT-Thread/master
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bsp/gd32103c-eval/Kconfig

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Original file line numberDiff line numberDiff line change
@@ -96,5 +96,14 @@ menu "On-chip Peripheral Drivers"
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bool "using hwtimer7"
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default n
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endif
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config BSP_USING_WDT
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bool "Enable Watchdog Timer"
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select RT_USING_WDT
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default n
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config BSP_USING_RTC
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bool "using internal rtc"
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default n
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select RT_USING_RTC
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100109
endmenu

bsp/gd32103c-eval/README.md

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@@ -48,6 +48,8 @@ msh />
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| GPIO | 支持 | GPIOA~G |
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| ADC | 支持 | ADC0~1 |
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| HWTIMER | 支持 | TIMER0~7 |
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| RTC | 支持 | RTC |
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| WDT | 支持 | Free watchdog timer |
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| IIC | 未支持 | I2C0~1 |
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| SPI | 未支持 | SPI0~2 |
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| ETH | 未支持 | |

bsp/gd32103c-eval/drivers/SConscript

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Original file line numberDiff line numberDiff line change
@@ -24,6 +24,12 @@ if GetDepend('RT_USING_ADC'):
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if GetDepend('RT_USING_HWTIMER'):
2525
src += ['drv_hwtimer.c']
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27+
if GetDepend('RT_USING_RTC'):
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src += ['drv_rtc.c']
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if GetDepend('RT_USING_WDT'):
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src += ['drv_iwdt.c']
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2733
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
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Return('group')
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Original file line numberDiff line numberDiff line change
@@ -0,0 +1,111 @@
1+
/*
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* Copyright (c) 2006-2021, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
7+
* Date Author Notes
8+
* 2021-03-03 iysheng first version
9+
*/
10+
11+
#include <board.h>
12+
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#define DBG_TAG "drv.wdt"
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#define DBG_LVL DBG_INFO
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#include <rtdbg.h>
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#ifdef RT_USING_WDT
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typedef struct {
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struct rt_watchdog_device wdt;
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rt_uint32_t min_threshold_s;
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rt_uint32_t max_threshold_s;
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rt_uint32_t current_threshold_s;
24+
} gd32_wdt_device_t;
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static gd32_wdt_device_t g_wdt_dev;
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static rt_err_t gd32_iwdt_init(rt_watchdog_t *wdt)
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{
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rcu_osci_on(RCU_IRC40K);
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if (ERROR == rcu_osci_stab_wait(RCU_IRC40K))
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{
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LOG_E("failed init IRC40K clock for free watchdog.");
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return -EINVAL;
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}
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g_wdt_dev.min_threshold_s = 1;
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g_wdt_dev.max_threshold_s = (0xfff << 8) / 40000;
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LOG_I("threshold section [%u, %d]", \
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g_wdt_dev.min_threshold_s, g_wdt_dev.max_threshold_s);
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IWDG_Write_Enable(IWDG_WRITEACCESS_ENABLE);
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IWDG_SetPrescaler(IWDG_PRESCALER_256);
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IWDG_SetReloadValue(0xfff);
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IWDG_Write_Enable(IWDG_WRITEACCESS_DISABLE);
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return 0;
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}
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static rt_err_t gd32_iwdt_control(rt_watchdog_t *wdt, int cmd, void *arg)
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{
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rt_uint32_t param;
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switch (cmd)
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{
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case RT_DEVICE_CTRL_WDT_KEEPALIVE:
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IWDG_ReloadCounter();
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break;
59+
case RT_DEVICE_CTRL_WDT_SET_TIMEOUT:
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param = *(rt_uint32_t *) arg;
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if ((param > g_wdt_dev.max_threshold_s) || \
62+
(param < g_wdt_dev.min_threshold_s))
63+
{
64+
LOG_E("invalid param@%u.", param);
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return -E2BIG;
66+
}
67+
else
68+
{
69+
g_wdt_dev.current_threshold_s = param;
70+
}
71+
IWDG_Write_Enable(IWDG_WRITEACCESS_ENABLE);
72+
IWDG_SetReloadValue(param * 40000 >> 8);
73+
IWDG_Write_Enable(IWDG_WRITEACCESS_DISABLE);
74+
break;
75+
case RT_DEVICE_CTRL_WDT_GET_TIMEOUT:
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*(rt_uint32_t *)arg = g_wdt_dev.current_threshold_s;
77+
break;
78+
case RT_DEVICE_CTRL_WDT_START:
79+
IWDG_Enable();
80+
break;
81+
default:
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LOG_W("This command is not supported.");
83+
return -RT_ERROR;
84+
}
85+
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return RT_EOK;
87+
}
88+
89+
static struct rt_watchdog_ops g_wdt_ops = {
90+
gd32_iwdt_init,
91+
gd32_iwdt_control,
92+
};
93+
94+
static int rt_hw_iwdt_init(void)
95+
{
96+
rt_err_t ret;
97+
98+
g_wdt_dev.wdt.ops = &g_wdt_ops;
99+
/* register watchdog device */
100+
if (rt_hw_watchdog_register(&g_wdt_dev.wdt, "iwdt", \
101+
RT_DEVICE_FLAG_DEACTIVATE, RT_NULL) != RT_EOK)
102+
{
103+
LOG_E("wdt device register failed.");
104+
return -RT_ERROR;
105+
}
106+
LOG_D("wdt device register success.");
107+
108+
return ret;
109+
}
110+
INIT_BOARD_EXPORT(rt_hw_iwdt_init);
111+
#endif
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Original file line numberDiff line numberDiff line change
@@ -0,0 +1,139 @@
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/*
2+
* Copyright (c) 2006-2021, RT-Thread Development Team
3+
*
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* SPDX-License-Identifier: Apache-2.0
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*
6+
* Change Logs:
7+
* Date Author Notes
8+
* 2021-02-20 iysheng first version
9+
*/
10+
11+
#include <board.h>
12+
#include <sys/time.h>
13+
#include <drivers/drv_comm.h>
14+
15+
#define DBG_TAG "drv.rtc"
16+
#define DBG_LVL DBG_INFO
17+
18+
#include <rtdbg.h>
19+
20+
#ifdef RT_USING_RTC
21+
22+
typedef struct {
23+
struct rt_device rtc_dev;
24+
} gd32_rtc_device;
25+
26+
static gd32_rtc_device g_gd32_rtc_dev;
27+
28+
static time_t get_rtc_timestamp(void)
29+
{
30+
time_t rtc_counter;
31+
32+
rtc_counter = (time_t)RTC_GetCounter();
33+
34+
return rtc_counter;
35+
}
36+
37+
static rt_err_t set_rtc_timestamp(time_t time_stamp)
38+
{
39+
uint32_t rtc_counter;
40+
41+
rtc_counter = (uint32_t)time_stamp;
42+
43+
/* wait until LWOFF bit in RTC_CTL to 1 */
44+
RTC_WaitLWOFF();
45+
/* enter configure mode */
46+
RTC_EnterConfigMode();
47+
/* write data to rtc register */
48+
RTC_SetCounter(rtc_counter);
49+
/* exit configure mode */
50+
RTC_ExitConfigMode();
51+
/* wait until LWOFF bit in RTC_CTL to 1 */
52+
RTC_WaitLWOFF();
53+
54+
return RT_EOK;
55+
}
56+
57+
static rt_err_t rt_gd32_rtc_control(rt_device_t dev, int cmd, void *args)
58+
{
59+
rt_err_t result = RT_EOK;
60+
61+
RT_ASSERT(dev != RT_NULL);
62+
switch (cmd)
63+
{
64+
case RT_DEVICE_CTRL_RTC_GET_TIME:
65+
*(rt_uint32_t *)args = get_rtc_timestamp();
66+
break;
67+
68+
case RT_DEVICE_CTRL_RTC_SET_TIME:
69+
if (set_rtc_timestamp(*(rt_uint32_t *)args))
70+
{
71+
result = -RT_ERROR;
72+
}
73+
break;
74+
}
75+
76+
return result;
77+
}
78+
79+
#ifdef RT_USING_DEVICE_OPS
80+
const static struct rt_device_ops g_gd32_rtc_ops =
81+
{
82+
RT_NULL,
83+
RT_NULL,
84+
RT_NULL,
85+
RT_NULL,
86+
RT_NULL,
87+
rt_gd32_rtc_control
88+
};
89+
#endif
90+
91+
static int rt_hw_rtc_init(void)
92+
{
93+
rt_err_t ret;
94+
time_t rtc_counter;
95+
96+
rcu_periph_clock_enable(RCU_PMU);
97+
PWR_BackupAccess_Enable(ENABLE);
98+
rcu_periph_clock_enable(RCU_BKPI);
99+
100+
rtc_counter = get_rtc_timestamp();
101+
/* once the rtc clock source has been selected, if can't be changed
102+
* anymore unless the Backup domain is reset */
103+
rcu_bkp_reset_enable();
104+
rcu_bkp_reset_disable();
105+
rcu_periph_clock_enable(RCU_RTC);
106+
rcu_osci_on(RCU_LXTAL);
107+
if (SUCCESS == rcu_osci_stab_wait(RCU_LXTAL))
108+
{
109+
/* set lxtal as rtc clock source */
110+
rcu_rtc_clock_config(RCU_RTCSRC_LXTAL);
111+
}
112+
set_rtc_timestamp(rtc_counter);
113+
114+
#ifdef RT_USING_DEVICE_OPS
115+
g_gd32_rtc_dev.rtc_dev.ops = &g_gd32_rtc_ops;
116+
#else
117+
g_gd32_rtc_dev.rtc_dev.init = RT_NULL;
118+
g_gd32_rtc_dev.rtc_dev.open = RT_NULL;
119+
g_gd32_rtc_dev.rtc_dev.close = RT_NULL;
120+
g_gd32_rtc_dev.rtc_dev.read = RT_NULL;
121+
g_gd32_rtc_dev.rtc_dev.write = RT_NULL;
122+
g_gd32_rtc_dev.rtc_dev.control = rt_gd32_rtc_control;
123+
#endif
124+
g_gd32_rtc_dev.rtc_dev.type = RT_Device_Class_RTC;
125+
g_gd32_rtc_dev.rtc_dev.rx_indicate = RT_NULL;
126+
g_gd32_rtc_dev.rtc_dev.tx_complete = RT_NULL;
127+
g_gd32_rtc_dev.rtc_dev.user_data = RT_NULL;
128+
129+
ret = rt_device_register(&g_gd32_rtc_dev.rtc_dev, "rtc", \
130+
RT_DEVICE_FLAG_RDWR);
131+
if (ret != RT_EOK)
132+
{
133+
LOG_E("failed register internal rtc device, err=%d", ret);
134+
}
135+
136+
return ret;
137+
}
138+
INIT_DEVICE_EXPORT(rt_hw_rtc_init);
139+
#endif

bsp/nuvoton/README.md

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@@ -6,3 +6,4 @@ Current supported BSP shown in below table:
66
| [numaker-iot-m487](numaker-iot-m487) | Nuvoton NuMaker-IoT-M487 |
77
| [numaker-pfm-m487](numaker-pfm-m487) | Nuvoton NuMaker-PFM-M487 |
88
| [nk-980iot](nk-980iot) | Nuvoton NK-980IOT |
9+
| [numaker-m2354](numaker-m2354) | Nuvoton NuMaker-M2354 |

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