11/*
2- * Copyright (c) 2006-2018 , RT-Thread Development Team
2+ * Copyright (c) 2006-2021 , RT-Thread Development Team
33 *
44 * SPDX-License-Identifier: Apache-2.0
55 *
@@ -35,9 +35,9 @@ struct imxrt_i2c_bus
3535 volatile rt_uint32_t msg_ptr ;
3636 volatile rt_uint32_t dptr ;
3737 char * device_name ;
38- #ifdef SOC_IMXRT1170_SERIES
39- clock_root_t clock_root ;
40- #endif
38+ #ifdef SOC_IMXRT1170_SERIES
39+ clock_root_t clock_root ;
40+ #endif
4141};
4242
4343#if defined (BSP_USING_I2C1 )
@@ -70,7 +70,7 @@ struct imxrt_i2c_bus
7070
7171/* Select USB1 PLL (360 MHz) as master lpi2c clock source */
7272#define LPI2C_CLOCK_SOURCE_SELECT (1U)
73- #ifdef SOC_IMXRT1170_SERIES
73+ #ifdef SOC_IMXRT1170_SERIES
7474/* Clock divider for master lpi2c clock source */
7575#define LPI2C_CLOCK_SOURCE_DIVIDER (12U)
7676#else
@@ -157,19 +157,19 @@ static rt_err_t imxrt_lpi2c_configure(struct imxrt_i2c_bus *bus, lpi2c_master_co
157157 RT_ASSERT (cfg != RT_NULL );
158158
159159 bus -> parent .ops = & imxrt_i2c_ops ;
160- #ifdef SOC_IMXRT1170_SERIES
161- clock_root_config_t rootCfg = {0 };
162- rootCfg .mux = LPI2C_CLOCK_SOURCE_SELECT ;
163- rootCfg .div = LPI2C_CLOCK_SOURCE_DIVIDER + 1 ;
164- CLOCK_SetRootClock (bus -> clock_root , & rootCfg );
165- volatile uint32_t freq = CLOCK_GetRootClockFreq (bus -> clock_root );
166- LPI2C_MasterInit (bus -> I2C , cfg , freq );
160+ #ifdef SOC_IMXRT1170_SERIES
161+ clock_root_config_t rootCfg = {0 };
162+ rootCfg .mux = LPI2C_CLOCK_SOURCE_SELECT ;
163+ rootCfg .div = LPI2C_CLOCK_SOURCE_DIVIDER + 1 ;
164+ CLOCK_SetRootClock (bus -> clock_root , & rootCfg );
165+ volatile uint32_t freq = CLOCK_GetRootClockFreq (bus -> clock_root );
166+ LPI2C_MasterInit (bus -> I2C , cfg , freq );
167167#else
168- CLOCK_SetMux (kCLOCK_Lpi2cMux , LPI2C_CLOCK_SOURCE_SELECT );
169- CLOCK_SetDiv (kCLOCK_Lpi2cDiv , LPI2C_CLOCK_SOURCE_DIVIDER );
168+ CLOCK_SetMux (kCLOCK_Lpi2cMux , LPI2C_CLOCK_SOURCE_SELECT );
169+ CLOCK_SetDiv (kCLOCK_Lpi2cDiv , LPI2C_CLOCK_SOURCE_DIVIDER );
170170 LPI2C_MasterInit (bus -> I2C , cfg , LPI2C_CLOCK_FREQUENCY );
171- #endif
172-
171+ #endif
172+
173173 return RT_EOK ;
174174}
175175
@@ -267,36 +267,36 @@ static rt_size_t imxrt_i2c_mst_xfer(struct rt_i2c_bus_device *bus,
267267 {
268268 if (imxrt_i2c -> msg [i ].flags & RT_I2C_RD )
269269 {
270- if ((imxrt_i2c -> msg [i ].flags & RT_I2C_NO_START ) != RT_I2C_NO_START )
271- {
272- if (LPI2C_MasterStart (imxrt_i2c -> I2C , imxrt_i2c -> msg [i ].addr , kLPI2C_Write ) != kStatus_Success )
273- {
274- i = 0 ;
275- break ;
276- }
277-
278- while (LPI2C_MasterGetStatusFlags (imxrt_i2c -> I2C ) & kLPI2C_MasterNackDetectFlag )
279- {
280- }
281-
282- if (LPI2C_MasterRepeatedStart (imxrt_i2c -> I2C , imxrt_i2c -> msg [i ].addr , kLPI2C_Read ) != kStatus_Success )
283- {
284- i = 0 ;
285- break ;
286- }
287- }
288- else
289- {
290- if (LPI2C_MasterStart (imxrt_i2c -> I2C , imxrt_i2c -> msg [i ].addr , kLPI2C_Read ) != kStatus_Success )
291- {
292- i = 0 ;
293- break ;
294- }
295-
296- while (LPI2C_MasterGetStatusFlags (imxrt_i2c -> I2C ) & kLPI2C_MasterNackDetectFlag )
297- {
298- }
299- }
270+ if ((imxrt_i2c -> msg [i ].flags & RT_I2C_NO_START ) != RT_I2C_NO_START )
271+ {
272+ if (LPI2C_MasterStart (imxrt_i2c -> I2C , imxrt_i2c -> msg [i ].addr , kLPI2C_Write ) != kStatus_Success )
273+ {
274+ i = 0 ;
275+ break ;
276+ }
277+
278+ while (LPI2C_MasterGetStatusFlags (imxrt_i2c -> I2C ) & kLPI2C_MasterNackDetectFlag )
279+ {
280+ }
281+
282+ if (LPI2C_MasterRepeatedStart (imxrt_i2c -> I2C , imxrt_i2c -> msg [i ].addr , kLPI2C_Read ) != kStatus_Success )
283+ {
284+ i = 0 ;
285+ break ;
286+ }
287+ }
288+ else
289+ {
290+ if (LPI2C_MasterStart (imxrt_i2c -> I2C , imxrt_i2c -> msg [i ].addr , kLPI2C_Read ) != kStatus_Success )
291+ {
292+ i = 0 ;
293+ break ;
294+ }
295+
296+ while (LPI2C_MasterGetStatusFlags (imxrt_i2c -> I2C ) & kLPI2C_MasterNackDetectFlag )
297+ {
298+ }
299+ }
300300
301301 if (LPI2C_MasterStart (imxrt_i2c -> I2C , imxrt_i2c -> msg [i ].addr , kLPI2C_Read ) != kStatus_Success )
302302 {
@@ -321,16 +321,16 @@ static rt_size_t imxrt_i2c_mst_xfer(struct rt_i2c_bus_device *bus,
321321 i = 0 ;
322322 break ;
323323 }
324-
324+
325325 if (LPI2C_MasterWaitForTxFifoAllEmpty (imxrt_i2c -> I2C ) != kStatus_Success )
326326 {
327327 i = 0 ;
328328 break ;
329329 }
330-
331- if (LPI2C_MasterGetStatusFlags (imxrt_i2c -> I2C ) & kLPI2C_MasterNackDetectFlag )
330+
331+ if (LPI2C_MasterGetStatusFlags (imxrt_i2c -> I2C ) & kLPI2C_MasterNackDetectFlag )
332332 {
333- i = 0 ;
333+ i = 0 ;
334334 break ;
335335 }
336336
@@ -346,12 +346,12 @@ static rt_size_t imxrt_i2c_mst_xfer(struct rt_i2c_bus_device *bus,
346346 break ;
347347 }
348348 }
349-
350- if (LPI2C_MasterStop (imxrt_i2c -> I2C ) != kStatus_Success )
351- {
352- i = 0 ;
353- }
354-
349+
350+ if (LPI2C_MasterStop (imxrt_i2c -> I2C ) != kStatus_Success )
351+ {
352+ i = 0 ;
353+ }
354+
355355 }
356356
357357 imxrt_i2c -> msg = RT_NULL ;
@@ -434,7 +434,7 @@ int rt_hw_i2c_init(void)
434434#elif defined(HW_I2C5_BADURATE_100kHZ )
435435 masterConfig .baudRate_Hz = 100000U ;
436436#endif /* HW_I2C5_BADURATE_400kHZ */
437- lpi2c5 .clock_root = kCLOCK_Root_Lpi2c5 ;
437+ lpi2c5 .clock_root = kCLOCK_Root_Lpi2c5 ;
438438 imxrt_lpi2c_configure (& lpi2c5 , & masterConfig );
439439 rt_i2c_bus_device_register (& lpi2c5 .parent , lpi2c5 .device_name );
440440#endif /* BSP_USING_I2C5 */
@@ -446,7 +446,7 @@ int rt_hw_i2c_init(void)
446446#elif defined(HW_I2C6_BADURATE_100kHZ )
447447 masterConfig .baudRate_Hz = 100000U ;
448448#endif /* HW_I2C6_BADURATE_400kHZ */
449- lpi2c6 .clock_root = kCLOCK_Root_Lpi2c6 ;
449+ lpi2c6 .clock_root = kCLOCK_Root_Lpi2c6 ;
450450 imxrt_lpi2c_configure (& lpi2c6 , & masterConfig );
451451 rt_i2c_bus_device_register (& lpi2c6 .parent , lpi2c6 .device_name );
452452#endif /* BSP_USING_I2C6 */
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