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MuChengerMuChenger
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[fix] 格式化代码
1 parent 4639c25 commit 77ff90b

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4 files changed

+59
-55
lines changed

4 files changed

+59
-55
lines changed

‎bsp/gd32/risc-v/libraries/gd32_drivers/drv_gpio.c‎

Lines changed: 20 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* Copyright (c) 2006-2022, RT-Thread Development Team
2+
* Copyright (c) 2006-2025, RT-Thread Development Team
33
*
44
* SPDX-License-Identifier: Apache-2.0
55
*
@@ -184,7 +184,7 @@ static void gd32_pin_mode(rt_device_t dev, rt_base_t pin, rt_uint8_t mode)
184184
{
185185
const struct pin_index *index = RT_NULL;
186186

187-
#if defined(SOC_SERIES_GD32VF103V)
187+
#if defined(SOC_SERIES_GD32VF103V)
188188
rt_uint32_t pin_mode = GPIO_MODE_OUT_PP;
189189
#elif defined(SOC_SERIES_GD32VW55x)
190190
rt_uint32_t pin_mode = GPIO_MODE_OUTPUT;
@@ -208,61 +208,61 @@ static void gd32_pin_mode(rt_device_t dev, rt_base_t pin, rt_uint8_t mode)
208208
{
209209
case PIN_MODE_OUTPUT:
210210
/* output setting */
211-
#if defined(SOC_SERIES_GD32VF103V)
211+
#if defined(SOC_SERIES_GD32VF103V)
212212
pin_mode = GPIO_MODE_OUT_PP;
213213
#elif defined(SOC_SERIES_GD32VW55x)
214214
pin_mode = GPIO_MODE_OUTPUT;
215215
#else
216216
#error "not support soc"
217-
#endif
217+
#endif
218218
break;
219219
case PIN_MODE_OUTPUT_OD:
220220
/* output setting: od. */
221-
#if defined(SOC_SERIES_GD32VF103V)
221+
#if defined(SOC_SERIES_GD32VF103V)
222222
pin_mode = GPIO_MODE_OUT_OD;
223223
#elif defined(SOC_SERIES_GD32VW55x)
224224
pin_otype = GPIO_OTYPE_OD;
225225
#else
226226
#error "not support soc"
227-
#endif
227+
#endif
228228
break;
229229
case PIN_MODE_INPUT:
230230
/* input setting: not pull. */
231-
#if defined(SOC_SERIES_GD32VF103V)
231+
#if defined(SOC_SERIES_GD32VF103V)
232232
pin_mode = GPIO_MODE_IN_FLOATING;
233233
#elif defined(SOC_SERIES_GD32VW55x)
234234
pin_mode = GPIO_MODE_INPUT;
235235
#else
236236
#error "not support soc"
237-
#endif
237+
#endif
238238
break;
239239
case PIN_MODE_INPUT_PULLUP:
240240
/* input setting: pull up. */
241-
#if defined(SOC_SERIES_GD32VF103V)
241+
#if defined(SOC_SERIES_GD32VF103V)
242242
pin_mode = GPIO_MODE_IPU;
243243
#elif defined(SOC_SERIES_GD32VW55x)
244244
pin_mode = GPIO_MODE_INPUT;
245245
pin_pull_up_down = GPIO_PUPD_PULLUP;
246246
#else
247247
#error "not support soc"
248-
#endif
248+
#endif
249249
break;
250250
case PIN_MODE_INPUT_PULLDOWN:
251251
/* input setting: pull down. */
252-
#if defined(SOC_SERIES_GD32VF103V)
252+
#if defined(SOC_SERIES_GD32VF103V)
253253
pin_mode = GPIO_MODE_IPD;
254254
#elif defined(SOC_SERIES_GD32VW55x)
255255
pin_mode = GPIO_MODE_INPUT;
256256
pin_pull_up_down = GPIO_PUPD_PULLDOWN;
257257
#else
258258
#error "not support soc"
259-
#endif
259+
#endif
260260
break;
261261
default:
262262
break;
263263
}
264264

265-
#if defined(SOC_SERIES_GD32VF103V)
265+
#if defined(SOC_SERIES_GD32VF103V)
266266
gpio_init(index->gpio_periph, pin_mode, GPIO_OSPEED_50MHZ, index->pin);
267267
#elif defined(SOC_SERIES_GD32VW55x)
268268
gpio_mode_set(index->gpio_periph, pin_mode, pin_pull_up_down, index->pin);
@@ -271,7 +271,7 @@ static void gd32_pin_mode(rt_device_t dev, rt_base_t pin, rt_uint8_t mode)
271271
#error "not support soc"
272272
#endif /* SOC_GD32VW553H */
273273

274-
274+
275275
}
276276

277277
/**
@@ -378,6 +378,7 @@ static rt_err_t gd32_pin_attach_irq(struct rt_device *device, rt_base_t pin,
378378
rt_hw_interrupt_enable(level);
379379
return RT_EOK;
380380
}
381+
381382
if (pin_irq_hdr_tab[hdr_index].pin != -1)
382383
{
383384
rt_hw_interrupt_enable(level);
@@ -482,22 +483,22 @@ static rt_err_t gd32_pin_irq_enable(struct rt_device *device, rt_base_t pin, rt_
482483
return -RT_EINVAL;
483484
}
484485

485-
#if defined(SOC_SERIES_GD32VF103V)
486+
#if defined(SOC_SERIES_GD32VF103V)
486487
rcu_periph_clock_enable(RCU_AF);
487488
#elif defined(SOC_SERIES_GD32VW55x)
488489
rcu_periph_clock_enable(RCU_SYSCFG);
489490
#else
490-
#endif
491+
#endif
491492
/* enable and set interrupt priority */
492493
eclic_irq_enable(irqmap->irqno, 5U, 0U);
493494

494495
/* connect EXTI line to GPIO pin */
495-
#if defined(SOC_SERIES_GD32VF103V)
496+
#if defined(SOC_SERIES_GD32VF103V)
496497
gpio_exti_source_select(index->port_src, index->pin_src);
497498
#elif defined(SOC_SERIES_GD32VW55x)
498499
syscfg_exti_line_config(index->port_src, index->pin_src);
499500
#else
500-
#endif
501+
#endif
501502
/* configure EXTI line */
502503
exti_init((exti_line_enum)(index->pin), EXTI_INTERRUPT, trigger_mode);
503504
exti_interrupt_flag_clear((exti_line_enum)(index->pin));
@@ -629,3 +630,4 @@ int rt_hw_pin_init(void)
629630
INIT_BOARD_EXPORT(rt_hw_pin_init);
630631

631632
#endif
633+

‎bsp/gd32/risc-v/libraries/gd32_drivers/drv_gpio.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* Copyright (c) 2006-2022, RT-Thread Development Team
2+
* Copyright (c) 2006-2025, RT-Thread Development Team
33
*
44
* SPDX-License-Identifier: Apache-2.0
55
*

‎bsp/gd32/risc-v/libraries/gd32_drivers/drv_usart.c‎

Lines changed: 26 additions & 25 deletions
Original file line numberDiff line numberDiff line change
@@ -156,59 +156,59 @@ void UART7_IRQHandler(void)
156156
static const struct gd32_uart uart_obj[] = {
157157
#ifdef BSP_USING_UART0
158158
{
159-
USART0, // uart peripheral index
160-
USART0_IRQn, // uart iqrn
161-
RCU_USART0, RCU_GPIOB, RCU_GPIOA, // periph clock, tx gpio clock, rt gpio clock
162-
GPIOB, GPIO_PIN_15, // tx port, tx pin
163-
GPIOA, GPIO_PIN_8, // rx port, rx pin
159+
USART0, /* uart peripheral index */
160+
USART0_IRQn, /* uart iqrn */
161+
RCU_USART0, RCU_GPIOB, RCU_GPIOA, /* periph clock, tx gpio clock, rt gpio clock */
162+
GPIOB, GPIO_PIN_15, /* tx port, tx pin */
163+
GPIOA, GPIO_PIN_8, /* rx port, rx pin */
164164
&serial0,
165165
"uart0",
166166
},
167167
#endif
168168

169169
#ifdef BSP_USING_UART1
170170
{
171-
USART1, // uart peripheral index
172-
USART1_IRQn, // uart iqrn
173-
RCU_USART1, RCU_GPIOA, RCU_GPIOA, // periph clock, tx gpio clock, rt gpio clock
174-
GPIOA, GPIO_PIN_2, // tx port, tx pin
175-
GPIOA, GPIO_PIN_3, // rx port, rx pin
171+
USART1, /* uart peripheral index */
172+
USART1_IRQn, /* uart iqrn */
173+
RCU_USART1, RCU_GPIOA, RCU_GPIOA, /* periph clock, tx gpio clock, rt gpio clock */
174+
GPIOA, GPIO_PIN_2, /* tx port, tx pin */
175+
GPIOA, GPIO_PIN_3, /* rx port, rx pin */
176176
&serial1,
177177
"uart1",
178178
},
179179
#endif
180180

181181
#ifdef BSP_USING_UART2
182182
{
183-
USART2, // uart peripheral index
184-
USART2_IRQn, // uart iqrn
185-
RCU_USART2, RCU_GPIOB, RCU_GPIOB, // periph clock, tx gpio clock, rt gpio clock
186-
GPIOB, GPIO_PIN_10, // tx port, tx pin
187-
GPIOB, GPIO_PIN_11, // rx port, rx pin
183+
USART2, /* uart peripheral index */
184+
USART2_IRQn, /* uart iqrn */
185+
RCU_USART2, RCU_GPIOB, RCU_GPIOB, /* periph clock, tx gpio clock, rt gpio clock */
186+
GPIOB, GPIO_PIN_10, /* tx port, tx pin */
187+
GPIOB, GPIO_PIN_11, /* rx port, rx pin */
188188
&serial2,
189189
"uart2",
190190
},
191191
#endif
192192

193193
#ifdef BSP_USING_UART3
194194
{
195-
UART3, // uart peripheral index
196-
UART3_IRQn, // uart iqrn
197-
RCU_UART3, RCU_GPIOC, RCU_GPIOC, // periph clock, tx gpio clock, rt gpio clock
198-
GPIOC, GPIO_PIN_10, // tx port, tx pin
199-
GPIOC, GPIO_PIN_11, // rx port, rx pin
195+
UART3, /* uart peripheral index */
196+
UART3_IRQn, /* uart iqrn */
197+
RCU_UART3, RCU_GPIOC, RCU_GPIOC, /* periph clock, tx gpio clock, rt gpio clock */
198+
GPIOC, GPIO_PIN_10, /* tx port, tx pin */
199+
GPIOC, GPIO_PIN_11, /* rx port, rx pin */
200200
&serial3,
201201
"uart3",
202202
},
203203
#endif
204204

205205
#ifdef BSP_USING_UART4
206206
{
207-
UART4, // uart peripheral index
208-
UART4_IRQn, // uart iqrn
209-
RCU_UART4, RCU_GPIOC, RCU_GPIOD, // periph clock, tx gpio clock, rt gpio clock
210-
GPIOC, GPIO_PIN_12, // tx port, tx pin
211-
GPIOD, GPIO_PIN_2, // rx port, rx pin
207+
UART4, /* uart peripheral index */
208+
UART4_IRQn, /* uart iqrn */
209+
RCU_UART4, RCU_GPIOC, RCU_GPIOD, /* periph clock, tx gpio clock, rt gpio clock */
210+
GPIOC, GPIO_PIN_12, /* tx port, tx pin */
211+
GPIOD, GPIO_PIN_2, /* rx port, rx pin */
212212
&serial4,
213213
"uart4",
214214
},
@@ -451,3 +451,4 @@ int rt_hw_usart_init(void)
451451
return result;
452452
}
453453
#endif
454+

‎bsp/gd32/risc-v/libraries/gd32_drivers/drv_usart.h‎

Lines changed: 12 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* Copyright (c) 2006-2022, RT-Thread Development Team
2+
* Copyright (c) 2006-2025, RT-Thread Development Team
33
*
44
* SPDX-License-Identifier: Apache-2.0
55
*
@@ -20,18 +20,18 @@ extern "C" {
2020
#endif
2121

2222
/* GD32 uart driver */
23-
// Todo: compress uart info
23+
/* Todo: compress uart info */
2424
struct gd32_uart
2525
{
26-
uint32_t uart_periph; //Todo: 3bits
27-
IRQn_Type irqn; //Todo: 7bits
28-
rcu_periph_enum per_clk; //Todo: 5bits
29-
rcu_periph_enum tx_gpio_clk; //Todo: 5bits
30-
rcu_periph_enum rx_gpio_clk; //Todo: 5bits
31-
uint32_t tx_port; //Todo: 4bits
32-
uint16_t tx_pin; //Todo: 4bits
33-
uint32_t rx_port; //Todo: 4bits
34-
uint16_t rx_pin; //Todo: 4bits
26+
uint32_t uart_periph; /* Todo: 3bits */
27+
IRQn_Type irqn; /* Todo: 7bits */
28+
rcu_periph_enum per_clk; /* Todo: 5bits */
29+
rcu_periph_enum tx_gpio_clk; /* Todo: 5bits */
30+
rcu_periph_enum rx_gpio_clk; /* Todo: 5bits */
31+
uint32_t tx_port; /* Todo: 4bits */
32+
uint16_t tx_pin; /* Todo: 4bits */
33+
uint32_t rx_port; /* Todo: 4bits */
34+
uint16_t rx_pin; /* Todo: 4bits */
3535
struct rt_serial_device * serial;
3636
char *device_name;
3737
};
@@ -43,3 +43,4 @@ int rt_hw_usart_init(void);
4343
#endif
4444

4545
#endif /* __DRV_USART_H__ */
46+

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