Skip to content

Commit 7c66501

Browse files
FlyGoatFlyGoat
committed
[libcpu] Refine MIPS common code
MIPS common code was highly duplicated, This commit is a attempt to clean-up and refine these code. The context and exception handle flow is mostly identical with Linux, but a notable difference is that when FPU enabled, we save FP registers in stackframe unconditionally. Signed-off-by: Jiaxun Yang <[email protected]>
1 parent 4412336 commit 7c66501

25 files changed

+1325
-4740
lines changed

‎libcpu/mips/SConscript‎

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -13,6 +13,7 @@ list = os.listdir(cwd)
1313
group = group + SConscript(os.path.join('common', 'SConscript'))
1414

1515
# cpu porting code files
16-
group = group + SConscript(os.path.join(rtconfig.CPU, 'SConscript'))
16+
if rtconfig.CPU != 'common':
17+
group = group + SConscript(os.path.join(rtconfig.CPU, 'SConscript'))
1718

1819
Return('group')

‎libcpu/mips/common/Kconfig‎

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,9 @@
1+
menu "RT-Thread MIPS CPU"
2+
3+
config RT_USING_FPU
4+
bool "Using Float Point Unit"
5+
default n
6+
help
7+
Using Float Point Unit in code.
8+
9+
endmenu

‎libcpu/mips/common/asm.h‎

Lines changed: 34 additions & 37 deletions
Original file line numberDiff line numberDiff line change
@@ -1,114 +1,111 @@
11
/*
2-
* This file is subject to the terms and conditions of the GNU General Public
3-
* License. See the file "COPYING" in the main directory of this archive
4-
* for more details.
2+
* Assembly Macros For MIPS
53
*
6-
* Copyright (C) 1995, 1996, 1997, 1999, 2001 by Ralf Baechle
7-
* Copyright (C) 1999 by Silicon Graphics, Inc.
8-
* Copyright (C) 2001 MIPS Technologies, Inc.
9-
* Copyright (C) 2002 Maciej W. Rozycki
4+
* Copyright (c) 2006-2019, RT-Thread Development Team
105
*
11-
* Some useful macros for MIPS assembler code
6+
* SPDX-License-Identifier: Apache-2.0
127
*
13-
* Some of the routines below contain useless nops that will be optimized
14-
* away by gas in -O mode. These nops are however required to fill delay
15-
* slots in noreorder mode.
8+
* Change Logs:
9+
* Date Author Notes
10+
* 2019-12-04 Jiaxun Yang Initial version
1611
*/
12+
13+
1714
#ifndef __ASM_H__
1815
#define __ASM_H__
1916

2017
/*
2118
* LEAF - declare leaf routine
2219
*/
2320
#define LEAF(symbol) \
24-
.globl symbol; \
25-
.align 2; \
26-
.type symbol,@function; \
27-
.ent symbol,0; \
21+
.globl symbol; \
22+
.align 2; \
23+
.type symbol,@function; \
24+
.ent symbol,0; \
2825
symbol: .frame sp,0,ra
2926

3027
/*
3128
* NESTED - declare nested routine entry point
3229
*/
3330
#define NESTED(symbol, framesize, rpc) \
34-
.globl symbol; \
35-
.align 2; \
36-
.type symbol,@function; \
37-
.ent symbol,0; \
31+
.globl symbol; \
32+
.align 2; \
33+
.type symbol,@function; \
34+
.ent symbol,0; \
3835
symbol: .frame sp, framesize, rpc
3936

4037
/*
4138
* END - mark end of function
4239
*/
4340
#define END(function) \
44-
.end function; \
45-
.size function,.-function
41+
.end function; \
42+
.size function,.-function
4643

4744
/*
4845
* EXPORT - export definition of symbol
4946
*/
5047
#define EXPORT(symbol) \
51-
.globl symbol; \
48+
.globl symbol; \
5249
symbol:
5350

5451
/*
5552
* FEXPORT - export definition of a function symbol
5653
*/
5754
#define FEXPORT(symbol) \
58-
.globl symbol; \
59-
.type symbol,@function; \
55+
.globl symbol; \
56+
.type symbol,@function; \
6057
symbol:
6158

6259
/*
6360
* Global data declaration with size.
6461
*/
6562
#define EXPORTS(name,sz) \
66-
.globl name; \
67-
.type name,@object; \
68-
.size name,sz; \
63+
.globl name; \
64+
.type name,@object; \
65+
.size name,sz; \
6966
name:
7067

7168
/*
7269
* Weak data declaration with size.
7370
*/
7471
#define WEXPORT(name,sz) \
75-
.weakext name; \
76-
.type name,@object; \
77-
.size name,sz; \
72+
.weakext name; \
73+
.type name,@object; \
74+
.size name,sz; \
7875
name:
7976

8077
/*
8178
* Global data reference with size.
8279
*/
8380
#define IMPORT(name, size) \
84-
.extern name,size
81+
.extern name,size
8582

8683
/*
8784
* Global zeroed data.
8885
*/
8986
#define BSS(name,size) \
90-
.type name,@object; \
91-
.comm name,size
87+
.type name,@object; \
88+
.comm name,size
9289

9390
/*
9491
* Local zeroed data.
9592
*/
9693
#define LBSS(name,size) \
97-
.lcomm name,size
94+
.lcomm name,size
9895

9996

10097
/*
10198
* ABS - export absolute symbol
10299
*/
103100
#define ABS(symbol,value) \
104-
.globl symbol; \
101+
.globl symbol; \
105102
symbol = value
106103

107104

108105
#define TEXT(msg) \
109-
.pushsection .data; \
106+
.pushsection .data; \
110107
8: .asciiz msg; \
111-
.popsection;
108+
.popsection;
112109

113110

114111
#define ENTRY(name) \

‎libcpu/mips/common/context_gcc.S‎

Lines changed: 123 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,123 @@
1+
/*
2+
* Copyright (c) 2006-2019, RT-Thread Development Team
3+
*
4+
* SPDX-License-Identifier: Apache-2.0
5+
*
6+
* Change Logs:
7+
* Date Author Notes
8+
* 2019-12-04 Jiaxun Yang Initial version
9+
*/
10+
11+
#ifndef __ASSEMBLY__
12+
#define __ASSEMBLY__
13+
#endif
14+
15+
#include "mips_regs.h"
16+
#include "stackframe.h"
17+
18+
.section ".text", "ax"
19+
.set noreorder
20+
21+
/*
22+
* void rt_hw_context_switch(rt_uint32 from, rt_uint32 to)
23+
* a0 --> from
24+
* a1 --> to
25+
*/
26+
.globl rt_hw_context_switch
27+
rt_hw_context_switch:
28+
mtc0 ra, CP0_EPC
29+
SAVE_ALL
30+
31+
sw sp, 0(a0) /* store sp in preempted tasks TCB */
32+
lw sp, 0(a1) /* get new task stack pointer */
33+
34+
RESTORE_ALL_AND_RET
35+
36+
/*
37+
* void rt_hw_context_switch_to(rt_uint32 to)/*
38+
* a0 --> to
39+
*/
40+
.globl rt_hw_context_switch_to
41+
rt_hw_context_switch_to:
42+
lw sp, 0(a0) /* get new task stack pointer */
43+
RESTORE_ALL_AND_RET
44+
45+
/*
46+
* void rt_hw_context_switch_interrupt(rt_uint32 from, rt_uint32 to)/*
47+
*/
48+
.globl rt_thread_switch_interrupt_flag
49+
.globl rt_interrupt_from_thread
50+
.globl rt_interrupt_to_thread
51+
.globl rt_hw_context_switch_interrupt
52+
rt_hw_context_switch_interrupt:
53+
la t0, rt_thread_switch_interrupt_flag
54+
lw t1, 0(t0)
55+
nop
56+
bnez t1, _reswitch
57+
nop
58+
li t1, 0x01 /* set rt_thread_switch_interrupt_flag to 1 */
59+
sw t1, 0(t0)
60+
la t0, rt_interrupt_from_thread /* set rt_interrupt_from_thread */
61+
sw a0, 0(t0)
62+
_reswitch:
63+
la t0, rt_interrupt_to_thread /* set rt_interrupt_to_thread */
64+
sw a1, 0(t0)
65+
jr ra
66+
nop
67+
68+
/*
69+
* void rt_hw_context_switch_interrupt_do(rt_base_t flag)
70+
*/
71+
.globl rt_interrupt_enter
72+
.globl rt_interrupt_leave
73+
.globl rt_general_exc_dispatch
74+
.globl mips_irq_handle
75+
mips_irq_handle:
76+
SAVE_ALL
77+
78+
/* let k0 keep the current context sp */
79+
move k0, sp
80+
/* switch to kernel stack */
81+
la sp, _system_stack
82+
83+
jal rt_interrupt_enter
84+
nop
85+
/* Get Old SP from k0 as paremeter in a0 */
86+
move a0, k0
87+
jal rt_general_exc_dispatch
88+
nop
89+
jal rt_interrupt_leave
90+
nop
91+
92+
/* switch sp back to thread context */
93+
move sp, k0
94+
95+
/*
96+
* if rt_thread_switch_interrupt_flag set, jump to
97+
* rt_hw_context_switch_interrupt_do and do not return
98+
*/
99+
la k0, rt_thread_switch_interrupt_flag
100+
lw k1, 0(k0)
101+
beqz k1, spurious_interrupt
102+
nop
103+
sw zero, 0(k0) /* clear flag */
104+
nop
105+
106+
/*
107+
* switch to the new thread
108+
*/
109+
la k0, rt_interrupt_from_thread
110+
lw k1, 0(k0)
111+
nop
112+
sw sp, 0(k1) /* store sp in preempted task TCB */
113+
114+
la k0, rt_interrupt_to_thread
115+
lw k1, 0(k0)
116+
nop
117+
lw sp, 0(k1) /* get new task stack pointer */
118+
j spurious_interrupt
119+
nop
120+
121+
spurious_interrupt:
122+
RESTORE_ALL_AND_RET
123+
.set reorder

‎libcpu/mips/common/entry_gcc.S‎

Lines changed: 55 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,55 @@
1+
/*
2+
* Copyright (c) 2006-2019, RT-Thread Development Team
3+
*
4+
* SPDX-License-Identifier: Apache-2.0
5+
*
6+
* Change Logs:
7+
* Date Author Notes
8+
* 2019-12-04 Jiaxun Yang Initial version
9+
*/
10+
11+
#ifndef __ASSEMBLY__
12+
#define __ASSEMBLY__
13+
#endif
14+
15+
#include <mips.h>
16+
#include <rtconfig.h>
17+
18+
.section ".start", "ax"
19+
.set noreorder
20+
21+
/* the program entry */
22+
.globl _rtthread_entry
23+
_rtthread_entry:
24+
#ifndef RT_USING_SELF_BOOT
25+
.globl _start
26+
_start:
27+
#endif
28+
la ra, _rtthread_entry
29+
30+
/* disable interrupt */
31+
mtc0 zero, CP0_CAUSE
32+
mtc0 zero, CP0_STATUS # Set CPU to disable interrupt.
33+
ehb
34+
/* setup stack pointer */
35+
la sp, _system_stack
36+
la gp, _gp
37+
38+
bal rt_cpu_early_init
39+
nop
40+
41+
/* clear bss */
42+
la t0, __bss_start
43+
la t1, __bss_end
44+
_clr_bss_loop:
45+
sw zero, 0(t0)
46+
bne t0, t1, _clr_bss_loop
47+
addiu t0, t0, 4
48+
49+
/* jump to RT-Thread RTOS */
50+
jal rtthread_startup
51+
nop
52+
53+
/* restart, never die */
54+
j _start
55+
nop

0 commit comments

Comments
 (0)