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| 1 | +/* |
| 2 | + * Copyright (c) 2006-2022, RT-Thread Development Team |
| 3 | + * |
| 4 | + * SPDX-License-Identifier: Apache-2.0 |
| 5 | + * |
| 6 | + * Change Logs: |
| 7 | + * Date Author Notes |
| 8 | + * 2020-12-10 thread-liu first version |
| 9 | + */ |
| 10 | + |
| 11 | +#include <board.h> |
| 12 | + |
| 13 | +#if defined(BSP_USING_DMA) |
| 14 | + |
| 15 | +#define BUFFER_SIZE 32 /* DMA max buffer size */ |
| 16 | + |
| 17 | +static DMA_HandleTypeDef hdma_memtomem_dma1_stream5 = {0}; /* Using dma1 stream5 to test */ |
| 18 | + |
| 19 | +static const rt_uint32_t DMA_Src_Buffer[BUFFER_SIZE] = |
| 20 | +{ |
| 21 | + 0x01020304, 0x05060708, 0x090A0B0C, 0x0D0E0F10, |
| 22 | + 0x11121314, 0x15161718, 0x191A1B1C, 0x1D1E1F20, |
| 23 | + 0x21222324, 0x25262728, 0x292A2B2C, 0x2D2E2F30, |
| 24 | + 0x31323334, 0x35363738, 0x393A3B3C, 0x3D3E3F40, |
| 25 | + 0x41424344, 0x45464748, 0x494A4B4C, 0x4D4E4F50, |
| 26 | + 0x51525354, 0x55565758, 0x595A5B5C, 0x5D5E5F60, |
| 27 | + 0x61626364, 0x65666768, 0x696A6B6C, 0x6D6E6F70, |
| 28 | + 0x71727374, 0x75767778, 0x797A7B7C, 0x7D7E7F80 |
| 29 | +}; |
| 30 | +static rt_uint32_t DMA_Dst_Buffer[BUFFER_SIZE]; |
| 31 | + |
| 32 | +#define __is_print(ch) ((unsigned int)((ch) - ' ') < 127u - ' ') |
| 33 | +static void dump_hex(const rt_uint8_t *ptr, rt_size_t buflen) |
| 34 | +{ |
| 35 | + unsigned char *buf = (unsigned char *)ptr; |
| 36 | + int i, j; |
| 37 | + |
| 38 | + for (i = 0; i < buflen; i += 16) |
| 39 | + { |
| 40 | + rt_kprintf("%08X: ", i); |
| 41 | + |
| 42 | + for (j = 0; j < 16; j++) |
| 43 | + { |
| 44 | + if (i + j < buflen) |
| 45 | + { |
| 46 | + rt_kprintf("%02X ", buf[i + j]); |
| 47 | + } |
| 48 | + else |
| 49 | + { |
| 50 | + rt_kprintf(" "); |
| 51 | + } |
| 52 | + } |
| 53 | + rt_kprintf(" "); |
| 54 | + |
| 55 | + for (j = 0; j < 16; j++) |
| 56 | + { |
| 57 | + if (i + j < buflen) |
| 58 | + { |
| 59 | + rt_kprintf("%c", __is_print(buf[i + j]) ? buf[i + j] : '.'); |
| 60 | + } |
| 61 | + } |
| 62 | + rt_kprintf("\n"); |
| 63 | + } |
| 64 | +} |
| 65 | + |
| 66 | +void DMA1_Stream5_IRQHandler(void) |
| 67 | +{ |
| 68 | + /* enter interrupt */ |
| 69 | + rt_interrupt_enter(); |
| 70 | + |
| 71 | + HAL_DMA_IRQHandler(&hdma_memtomem_dma1_stream5); |
| 72 | + |
| 73 | + /* leave interrupt */ |
| 74 | + rt_interrupt_leave(); |
| 75 | +} |
| 76 | + |
| 77 | +static void MX_DMA_Init(void) |
| 78 | +{ |
| 79 | + /* DMA controller clock enable */ |
| 80 | + __HAL_RCC_DMA1_CLK_ENABLE(); |
| 81 | + __HAL_RCC_DMAMUX_CLK_ENABLE(); |
| 82 | + |
| 83 | + /* Configure DMA request hdma_memtomem_dma1_stream5 on DMA1_Stream5 */ |
| 84 | + hdma_memtomem_dma1_stream5.Instance = DMA1_Stream5; |
| 85 | + hdma_memtomem_dma1_stream5.Init.Request = DMA_REQUEST_MEM2MEM; |
| 86 | + hdma_memtomem_dma1_stream5.Init.Direction = DMA_MEMORY_TO_MEMORY; |
| 87 | + hdma_memtomem_dma1_stream5.Init.PeriphInc = DMA_PINC_ENABLE; |
| 88 | + hdma_memtomem_dma1_stream5.Init.MemInc = DMA_MINC_ENABLE; |
| 89 | + hdma_memtomem_dma1_stream5.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD; |
| 90 | + hdma_memtomem_dma1_stream5.Init.MemDataAlignment = DMA_MDATAALIGN_WORD; |
| 91 | + hdma_memtomem_dma1_stream5.Init.Mode = DMA_NORMAL; |
| 92 | + hdma_memtomem_dma1_stream5.Init.Priority = DMA_PRIORITY_LOW; |
| 93 | + hdma_memtomem_dma1_stream5.Init.FIFOMode = DMA_FIFOMODE_ENABLE; |
| 94 | + hdma_memtomem_dma1_stream5.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL; |
| 95 | + hdma_memtomem_dma1_stream5.Init.MemBurst = DMA_MBURST_INC4; |
| 96 | + hdma_memtomem_dma1_stream5.Init.PeriphBurst = DMA_PBURST_INC4; |
| 97 | + if (HAL_DMA_Init(&hdma_memtomem_dma1_stream5) != HAL_OK) |
| 98 | + { |
| 99 | + Error_Handler(); |
| 100 | + } |
| 101 | + |
| 102 | + /* DMA interrupt init */ |
| 103 | + /* DMA1_Stream5_IRQn interrupt configuration */ |
| 104 | + HAL_NVIC_SetPriority(DMA1_Stream5_IRQn, 0, 0); |
| 105 | + HAL_NVIC_EnableIRQ(DMA1_Stream5_IRQn); |
| 106 | +} |
| 107 | + |
| 108 | +static void TransferComplete(DMA_HandleTypeDef *DmaHandle) |
| 109 | +{ |
| 110 | + rt_kprintf("dma dst buffer :\n"); |
| 111 | + dump_hex((rt_uint8_t *)DMA_Dst_Buffer, sizeof(DMA_Dst_Buffer)); |
| 112 | + |
| 113 | + rt_kprintf("============ dma transfer success ============\n"); |
| 114 | + |
| 115 | + rt_memset(DMA_Dst_Buffer, 0x00, sizeof(DMA_Dst_Buffer)); |
| 116 | +} |
| 117 | + |
| 118 | +static void TransferError(DMA_HandleTypeDef *DmaHandle) |
| 119 | +{ |
| 120 | + rt_kprintf("============ dma transfer error ============\n"); |
| 121 | +} |
| 122 | + |
| 123 | +static int rt_hw_dma_init(void) |
| 124 | +{ |
| 125 | + rt_err_t result = RT_EOK; |
| 126 | + |
| 127 | + MX_DMA_Init(); |
| 128 | + /* Select Callbacks functions called after Transfer complete and Transfer error */ |
| 129 | + HAL_DMA_RegisterCallback(&hdma_memtomem_dma1_stream5, HAL_DMA_XFER_CPLT_CB_ID, TransferComplete); |
| 130 | + HAL_DMA_RegisterCallback(&hdma_memtomem_dma1_stream5, HAL_DMA_XFER_ERROR_CB_ID, TransferError); |
| 131 | + |
| 132 | + return result; |
| 133 | +} |
| 134 | +INIT_APP_EXPORT(rt_hw_dma_init); |
| 135 | + |
| 136 | +static int dma_transfer_test() |
| 137 | +{ |
| 138 | + rt_kprintf("============ dma travsfer start ============\n"); |
| 139 | + |
| 140 | + rt_kprintf("dma src buffer :\n"); |
| 141 | + dump_hex((rt_uint8_t *)DMA_Src_Buffer, sizeof(DMA_Src_Buffer)); |
| 142 | + |
| 143 | + if (HAL_DMA_Start_IT(&hdma_memtomem_dma1_stream5, (rt_uint32_t)&DMA_Src_Buffer, (rt_uint32_t)&DMA_Dst_Buffer, BUFFER_SIZE) != HAL_OK) |
| 144 | + { |
| 145 | + /* Transfer Error */ |
| 146 | + return -RT_ERROR; |
| 147 | + } |
| 148 | + |
| 149 | + return RT_EOK; |
| 150 | +} |
| 151 | + |
| 152 | +int dma_sample(int argc, char **argv) |
| 153 | +{ |
| 154 | + if (argc > 1) |
| 155 | + { |
| 156 | + if (!rt_strcmp(argv[1], "start")) |
| 157 | + { |
| 158 | + rt_kprintf("dma test start\n"); |
| 159 | + dma_transfer_test(); |
| 160 | + return RT_EOK; |
| 161 | + } |
| 162 | + else |
| 163 | + { |
| 164 | + goto _exit; |
| 165 | + } |
| 166 | + } |
| 167 | +_exit: |
| 168 | + { |
| 169 | + rt_kprintf("Usage:\n"); |
| 170 | + rt_kprintf("dma_sample start - start dma \n"); |
| 171 | + } |
| 172 | + |
| 173 | + return RT_EOK; |
| 174 | +} |
| 175 | +MSH_CMD_EXPORT(dma_sample, dma test); |
| 176 | + |
| 177 | +#endif /* USE_DMA_SAMPLE */ |
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