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GuozhanxinRbb666
Guozhanxin
authored and
Rbb666
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Merge pull request #5499 from mysterywolf/dfs_posix
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2 parents 0f77fab + b2b3fa6 commit 8444f16

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17 files changed

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17 files changed

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‎bsp/CME_M7/drivers/app_phy.c‎

Lines changed: 67 additions & 67 deletions
Original file line numberDiff line numberDiff line change
@@ -1,22 +1,22 @@
11
#include <stdio.h>
22
#include "app_phy.h"
33

4-
#define PHY_BASE_ADDR 0x7
4+
#define PHY_BASE_ADDR 0x7
55

66
#define PHY_REG_CONTROL 0x0
77
#define PHY_REG_STATUS 0x1
88
#define PHY_REG_ANE 0x6
99
#define PHY_REG_SPEC_STATUS 0x11
10-
#define PHY_REG_EXTEND_STATUS 0x1B
10+
#define PHY_REG_EXTEND_STATUS 0x1B
1111

12-
#define PHY_BIT_CONTROL_RESET 0x8000 /*!< Control reg : reset */
13-
#define PHY_BIT_CONTROL_ANEN 0x1000 /*!< Control reg : auto-negotiation enable */
14-
#define PHY_BIT_CONTROL_RSAN 0x0200 /*!< Control reg : auto-negotiation restart */
12+
#define PHY_BIT_CONTROL_RESET 0x8000 /*!< Control reg : reset */
13+
#define PHY_BIT_CONTROL_ANEN 0x1000 /*!< Control reg : auto-negotiation enable */
14+
#define PHY_BIT_CONTROL_RSAN 0x0200 /*!< Control reg : auto-negotiation restart */
1515

16-
#define PHY_BIT_STATUS_ANC 0x0020 /*!< Status reg : auto-negotiation complete */
17-
#define PHY_BIT_STATUS_LINK 0x0004 /*!< Status reg : link is up */
16+
#define PHY_BIT_STATUS_ANC 0x0020 /*!< Status reg : auto-negotiation complete */
17+
#define PHY_BIT_STATUS_LINK 0x0004 /*!< Status reg : link is up */
1818

19-
#define PHY_BIT_ANE_LPAN 0x0001 /*!< ANE reg : link partner can auto-neg */
19+
#define PHY_BIT_ANE_LPAN 0x0001 /*!< ANE reg : link partner can auto-neg */
2020

2121
#define PHY_BIT_SPEED 0xC000 /*!< specific status reg : speed */
2222
#define PHY_BIT_DUPLEX 0x2000 /*!< specific status reg : duplex */
@@ -25,24 +25,24 @@
2525
#define PHY_BIT_AUTO_MEDIA_REG_DISABLE 0x0200 /*!< extended status reg : auto media register select disable */
2626

2727
void phy_Reset() {
28-
ETH_PhyWrite(PHY_BASE_ADDR, PHY_REG_CONTROL, PHY_BIT_CONTROL_RESET);
29-
30-
while (1) {
31-
uint32_t ret = ETH_PhyRead(PHY_BASE_ADDR, PHY_REG_CONTROL);
32-
if ((ret & PHY_BIT_CONTROL_RESET) == 0) {
33-
break;
34-
}
35-
}
28+
ETH_PhyWrite(PHY_BASE_ADDR, PHY_REG_CONTROL, PHY_BIT_CONTROL_RESET);
29+
30+
while (1) {
31+
uint32_t ret = ETH_PhyRead(PHY_BASE_ADDR, PHY_REG_CONTROL);
32+
if ((ret & PHY_BIT_CONTROL_RESET) == 0) {
33+
break;
34+
}
35+
}
3636
}
3737

3838
void phy_AutoMediaSelect() {
39-
uint32_t data;
39+
uint32_t data;
4040

41-
// auto media and auto media register selection
42-
data = ETH_PhyRead(PHY_BASE_ADDR, PHY_REG_EXTEND_STATUS);
43-
data &= ~PHY_BIT_AUTO_MEDIA_DISABLE;
44-
data &= ~PHY_BIT_AUTO_MEDIA_REG_DISABLE;
45-
ETH_PhyWrite(PHY_BASE_ADDR, PHY_REG_EXTEND_STATUS, data);
41+
// auto media and auto media register selection
42+
data = ETH_PhyRead(PHY_BASE_ADDR, PHY_REG_EXTEND_STATUS);
43+
data &= ~PHY_BIT_AUTO_MEDIA_DISABLE;
44+
data &= ~PHY_BIT_AUTO_MEDIA_REG_DISABLE;
45+
ETH_PhyWrite(PHY_BASE_ADDR, PHY_REG_EXTEND_STATUS, data);
4646
}
4747

4848
void phy_AutoNeg()
@@ -65,61 +65,61 @@ void phy_AutoNeg()
6565
}
6666

6767
BOOL phy_IsLink() {
68-
uint32_t ret = ETH_PhyRead(PHY_BASE_ADDR, PHY_REG_STATUS);
69-
return (ret & PHY_BIT_STATUS_LINK) ? TRUE : FALSE;
68+
uint32_t ret = ETH_PhyRead(PHY_BASE_ADDR, PHY_REG_STATUS);
69+
return (ret & PHY_BIT_STATUS_LINK) ? TRUE : FALSE;
7070
}
7171

7272
BOOL phy_PartnerCanAutoNeg() {
73-
uint32_t ret = ETH_PhyRead(PHY_BASE_ADDR, PHY_REG_ANE);
74-
return (ret & PHY_BIT_ANE_LPAN) ? TRUE : FALSE;
73+
uint32_t ret = ETH_PhyRead(PHY_BASE_ADDR, PHY_REG_ANE);
74+
return (ret & PHY_BIT_ANE_LPAN) ? TRUE : FALSE;
7575
}
7676

7777
uint32_t phy_GetSpeed() {
78-
uint32_t ret = ETH_PhyRead(PHY_BASE_ADDR, PHY_REG_SPEC_STATUS);
79-
return ((ret & PHY_BIT_SPEED) >> 14);
78+
uint32_t ret = ETH_PhyRead(PHY_BASE_ADDR, PHY_REG_SPEC_STATUS);
79+
return ((ret & PHY_BIT_SPEED) >> 14);
8080
}
8181

8282
uint32_t phy_GetDuplex() {
83-
uint32_t ret = ETH_PhyRead(PHY_BASE_ADDR, PHY_REG_SPEC_STATUS);
84-
return ((ret & PHY_BIT_DUPLEX) >> 13);
83+
uint32_t ret = ETH_PhyRead(PHY_BASE_ADDR, PHY_REG_SPEC_STATUS);
84+
return ((ret & PHY_BIT_DUPLEX) >> 13);
8585
}
8686

8787
BOOL phy_Init() {
88-
phy_AutoMediaSelect();
89-
phy_AutoNeg();
90-
91-
if (!phy_PartnerCanAutoNeg()) {
92-
printf("Warning:: PHY's partner can't do auto-negotiation\n");
93-
}
94-
95-
if (!phy_IsLink()) {
96-
printf("link is down\n");
97-
return FALSE;
98-
}
99-
100-
{
101-
uint32_t speed = phy_GetSpeed();
102-
if (speed == PHY_SPEED_10) {
103-
speed = 10;
104-
} else if (speed == PHY_SPEED_100) {
105-
speed = 100;
106-
} else if (speed == PHY_SPEED_1000) {
107-
speed = 1000;
108-
}
109-
110-
printf("PHY runs in %dM speed %s duplex\n",
111-
speed, (phy_GetDuplex() == PHY_DUPLEX_HALF) ? "half" : "full");
112-
}
113-
114-
// After auto-negcioation, Mawell PHY need some
115-
// time to initial itself.
116-
// So we have to delay some time since different
117-
// connection way, such as direct wire, hub, switch.
118-
// If not to delay, the first several sent frame
119-
// may be lost.
120-
// Please according to actual environment to tune
121-
// this delay.
122-
udelay(200000);
123-
124-
return TRUE;
88+
phy_AutoMediaSelect();
89+
phy_AutoNeg();
90+
91+
if (!phy_PartnerCanAutoNeg()) {
92+
printf("Warning:: PHY's partner can't do auto-negotiation\n");
93+
}
94+
95+
if (!phy_IsLink()) {
96+
printf("link is down\n");
97+
return FALSE;
98+
}
99+
100+
{
101+
uint32_t speed = phy_GetSpeed();
102+
if (speed == PHY_SPEED_10) {
103+
speed = 10;
104+
} else if (speed == PHY_SPEED_100) {
105+
speed = 100;
106+
} else if (speed == PHY_SPEED_1000) {
107+
speed = 1000;
108+
}
109+
110+
printf("PHY runs in %dM speed %s duplex\n",
111+
speed, (phy_GetDuplex() == PHY_DUPLEX_HALF) ? "half" : "full");
112+
}
113+
114+
// After auto-negcioation, Mawell PHY need some
115+
// time to initial itself.
116+
// So we have to delay some time since different
117+
// connection way, such as direct wire, hub, switch.
118+
// If not to delay, the first several sent frame
119+
// may be lost.
120+
// Please according to actual environment to tune
121+
// this delay.
122+
udelay(200000);
123+
124+
return TRUE;
125125
}

‎bsp/CME_M7/drivers/app_phy.h‎

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -7,13 +7,13 @@
77

88
#include "cmem7_includes.h"
99

10-
#define PHY_SPEED_10 0x0 /*!< SPEED : 10M */
11-
#define PHY_SPEED_100 0x1 /*!< SPEED : 100M */
12-
#define PHY_SPEED_1000 0x2 /*!< SPEED : 1000M */
13-
14-
#define PHY_DUPLEX_HALF 0x0 /*!< DUPLEX : half */
15-
#define PHY_DUPLEX_FULL 0x1 /*!< DUPLEX : full */
16-
10+
#define PHY_SPEED_10 0x0 /*!< SPEED : 10M */
11+
#define PHY_SPEED_100 0x1 /*!< SPEED : 100M */
12+
#define PHY_SPEED_1000 0x2 /*!< SPEED : 1000M */
13+
14+
#define PHY_DUPLEX_HALF 0x0 /*!< DUPLEX : half */
15+
#define PHY_DUPLEX_FULL 0x1 /*!< DUPLEX : full */
16+
1717
void phy_Reset(void);
1818
void phy_AutoNeg(void);
1919
BOOL phy_IsLink(void);
@@ -26,7 +26,7 @@ BOOL phy_Init(void);
2626
}
2727
#endif
2828

29-
#endif
29+
#endif
3030

3131

3232

‎bsp/CME_M7/drivers/emac.c‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,7 @@
11
/*
22
* File : emac.c
33
* This file is part of RT-Thread RTOS
4-
* COPYRIGHT (C) 2006-2014, RT-Thread Develop Team
4+
* COPYRIGHT (C) 2006-2021, RT-Thread Develop Team
55
*
66
* The license and distribution terms for this file may be
77
* found in the file LICENSE in this distribution or at
@@ -38,7 +38,7 @@ struct rt_cme_eth
3838
struct eth_device parent;
3939

4040
/* interface address info. */
41-
rt_uint8_t dev_addr[MAX_ADDR_LEN]; /* hw address */
41+
rt_uint8_t dev_addr[MAX_ADDR_LEN]; /* hw address */
4242

4343
uint32_t ETH_Speed;
4444
uint32_t ETH_Mode;
@@ -95,8 +95,8 @@ uint32_t txTotalMemory = 0x2000;
9595
BOOL isRxNoBuf = FALSE;
9696

9797
#define ETH_MAX_PACKET_SIZE 1520 /* ETH_HEADER + ETH_EXTRA + MAX_ETH_PAYLOAD + ETH_CRC */
98-
#define ETH_RXBUFNB 4
99-
#define ETH_TXBUFNB 2
98+
#define ETH_RXBUFNB 4
99+
#define ETH_TXBUFNB 2
100100

101101
struct eth_rx_buffer
102102
{

‎bsp/CME_M7/drivers/uart.c‎

Lines changed: 23 additions & 23 deletions
Original file line numberDiff line numberDiff line change
@@ -32,23 +32,23 @@ static struct rt_serial_device serial2;
3232
static rt_err_t CME_M7_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
3333
{
3434
struct CME_M7_uart* uart;
35-
UART_InitTypeDef init;
35+
UART_InitTypeDef init;
3636

3737
RT_ASSERT(serial != RT_NULL);
3838
RT_ASSERT(cfg != RT_NULL);
3939

4040
uart = (struct CME_M7_uart *)serial->parent.user_data;
4141

42-
init.UART_BaudRate = cfg->baud_rate;
43-
init.UART_StopBits = UART_StopBits_1;
42+
init.UART_BaudRate = cfg->baud_rate;
43+
init.UART_StopBits = UART_StopBits_1;
4444
init.UART_Parity = UART_Parity_None;
45-
init.UART_LoopBack = FALSE;
46-
init.UART_RxEn = TRUE;
47-
init.UART_CtsEn = FALSE;
45+
init.UART_LoopBack = FALSE;
46+
init.UART_RxEn = TRUE;
47+
init.UART_CtsEn = FALSE;
4848

4949
UART_Init(uart->uart_device, &init);
5050
uart->uart_device->RX_RESET = 1;
51-
UART_Enable(uart->uart_device, TRUE);
51+
UART_Enable(uart->uart_device, TRUE);
5252
uart->uart_device->RX_RESET = 0;
5353

5454
return RT_EOK;
@@ -67,24 +67,24 @@ static rt_err_t CME_M7_control(struct rt_serial_device *serial, int cmd, void *a
6767
case RT_DEVICE_CTRL_CLR_INT:
6868
/* disable rx irq */
6969
NVIC_InitStructure.NVIC_IRQChannel = uart->irq;
70-
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
71-
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
72-
NVIC_InitStructure.NVIC_IRQChannelCmd = FALSE;
73-
NVIC_Init(&NVIC_InitStructure);
70+
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
71+
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
72+
NVIC_InitStructure.NVIC_IRQChannelCmd = FALSE;
73+
NVIC_Init(&NVIC_InitStructure);
7474

75-
UART_EnableInt(uart->uart_device, UART_Int_RxNotEmpty, FALSE);
75+
UART_EnableInt(uart->uart_device, UART_Int_RxNotEmpty, FALSE);
7676
break;
7777

7878
case RT_DEVICE_CTRL_SET_INT:
7979
/* enable rx irq */
8080
NVIC_InitStructure.NVIC_IRQChannel = uart->irq;
81-
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
82-
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
83-
NVIC_InitStructure.NVIC_IRQChannelCmd = TRUE;
84-
NVIC_Init(&NVIC_InitStructure);
81+
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
82+
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
83+
NVIC_InitStructure.NVIC_IRQChannelCmd = TRUE;
84+
NVIC_Init(&NVIC_InitStructure);
8585

86-
UART_ClearInt(uart->uart_device, UART_Int_RxNotEmpty);
87-
UART_EnableInt(uart->uart_device, UART_Int_RxNotEmpty, TRUE);
86+
UART_ClearInt(uart->uart_device, UART_Int_RxNotEmpty);
87+
UART_EnableInt(uart->uart_device, UART_Int_RxNotEmpty, TRUE);
8888
break;
8989
}
9090

@@ -132,8 +132,8 @@ static const struct rt_uart_ops CME_M7_uart_ops =
132132

133133
int rt_hw_uart_init(void)
134134
{
135-
struct CME_M7_uart* uart;
136-
struct rt_serial_device *serial;
135+
struct CME_M7_uart* uart;
136+
struct rt_serial_device *serial;
137137
struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
138138

139139
#ifdef RT_USING_UART0
@@ -143,7 +143,7 @@ int rt_hw_uart_init(void)
143143
serial->ops = &CME_M7_uart_ops;
144144
serial->config = config;
145145

146-
/* register UART device */
146+
/* register UART device */
147147
rt_hw_serial_register(serial,
148148
"uart0",
149149
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
@@ -157,14 +157,14 @@ int rt_hw_uart_init(void)
157157
serial->ops = &CME_M7_uart_ops;
158158
serial->config = config;
159159

160-
/* register UART device */
160+
/* register UART device */
161161
rt_hw_serial_register(serial,
162162
"uart2",
163163
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
164164
uart);
165165
#endif /* RT_USING_UART2 */
166166

167-
return RT_EOK;
167+
return RT_EOK;
168168
}
169169
INIT_BOARD_EXPORT(rt_hw_uart_init);
170170

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