add stm32g474-st-nucleo bsp (#5362)

* add stm32g474-st-nucleo bsp

* format

* format

Author: cndabai

bsp/stm32/stm32g474-st-nucleo/.config

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+*.pyc
+*.map
+*.dblite
+*.elf
+*.bin
+*.hex
+*.axf
+*.exe
+*.pdb
+*.idb
+*.ilk
+*.old
+build
+Debug
+documentation/html
+packages/
+*~
+*.o
+*.obj
+*.out
+*.bak
+*.dep
+*.lib
+*.i
+*.d
+.DS_Stor*
+.config 3
+.config 4
+.config 5
+Midea-X1
+*.uimg
+GPATH
+GRTAGS
+GTAGS
+.vscode
+JLinkLog.txt
+JLinkSettings.ini
+DebugConfig/
+RTE/
+settings/
+*.uvguix*
+cconfig.h

bsp/stm32/stm32g474-st-nucleo/.gitignore

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+mainmenu "RT-Thread Configuration"
+
+config BSP_DIR
+    string
+    option env="BSP_ROOT"
+    default "."
+
+config RTT_DIR
+    string
+    option env="RTT_ROOT"
+    default "../../.."
+
+config PKGS_DIR
+    string
+    option env="PKGS_ROOT"
+    default "packages"
+ 
+source "$RTT_DIR/Kconfig"
+source "$PKGS_DIR/Kconfig"
+source "../libraries/Kconfig"
+source "board/Kconfig"

bsp/stm32/stm32g474-st-nucleo/Kconfig

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+# STM32G431-Nucleo BSP Introduction
+
+[中文](README_zh.md) 
+
+## MCU: STM32G474RB @170MHz, 512KB FLASH,  128KB RAM
+
+The STM32G474xB/xC/xE devices are based on the high-performance Arm® Cortex®-M4 32-bit RISC core. They operate at a frequency of up to 170 MHz. The Cortex-M4 core features a single-precision floating-point unit (FPU), which supports all the Arm single-precision data-processing instructions and all the data types. It also implements a full set of DSP (digital signal processing) instructions and a memory protection unit (MPU) which enhances the application’s security.
+These devices embed high-speed memories (up to 512 Kbytes of Flash memory, and 128 Kbytes of SRAM), a flexible external memory controller (FSMC) for static memories (for devices with packages of 100 pins and more), a Quad-SPI Flash memory interface, and an extensive range of enhanced I/Os and peripherals connected to two APB buses, two AHB buses and a 32-bit multi-AHB bus matrix.
+The devices also embed several protection mechanisms for embedded Flash memory and SRAM: readout protection, write protection, securable memory area and proprietary code readout protection.
+The devices embed peripherals allowing mathematical/arithmetic function acceleration (CORDIC for trigonometric functions and FMAC unit for filter functions).
+They offer five fast 12-bit ADCs (4 Msps), seven comparators, six operational amplifiers, seven DAC channels (3 external and 4 internal), an internal voltage reference buffer, a low-power RTC, two general-purpose 32-bit timers, three 16-bit PWM timers dedicated to motor control, seven general-purpose 16-bit timers, and one 16-bit low-power timer, and high resolution timer with 184 ps resolution.
+They also feature standard and advanced communication interfaces such as:
+\- Four I2Cs
+\- Four SPIs multiplexed with two half duplex I2Ss
+\- Three USARTs, two UARTs and one low-power UART.
+\- Three FDCANs
+\- One SAI
+\- USB device
+\- UCPD
+The devices operate in the -40 to +85 °C (+105 °C junction) and -40 to +125 °C (+130 °C junction) temperature ranges from a 1.71 to 3.6 V power supply. A comprehensive set of power-saving modes allows the design of low-power applications.
+Some independent power supplies are supported including an analog independent supply input for ADC, DAC, OPAMPs and comparators. A VBAT input allows backup of the RTC and the registers.
+The STM32G474xB/xC/xE family offers 9 packages from 48-pin to 128-pin.
+
+#### KEY FEATURES
+
+- Core: Arm® 32-bit Cortex®-M4 CPU with FPU, Adaptive real-time accelerator (ART Accelerator) allowing 0-wait-state execution from Flash memory, frequency up to 170 MHz with 213 DMIPS, MPU, DSP instructions
+- Operating conditions:
+  - VDD, VDDA voltage range: 1.71 V to 3.6 V
+- Mathematical hardware accelerators
+  - CORDIC for trigonometric functions acceleration
+  - FMAC: filter mathematical accelerator
+- Memories
+  - 512 Kbytes of Flash memory with ECC support, two banks read-while-write, proprietary code readout protection (PCROP), securable memory area, 1 Kbyte OTP
+  - 96 Kbytes of SRAM, with hardware parity check implemented on the first 32 Kbytes
+  - Routine booster: 32 Kbytes of SRAM on instruction and data bus, with hardware parity check (CCM SRAM)
+  - External memory interface for static memories FSMC supporting SRAM, PSRAM, NOR and NAND memories
+  - Quad-SPI memory interface
+- Reset and supply management
+  - Power-on/power-down reset (POR/PDR/BOR)
+  - Programmable voltage detector (PVD)
+  - Low-power modes: sleep, stop, standby and shutdown
+  - VBAT supply for RTC and backup registers
+- Clock management
+  - 4 to 48 MHz crystal oscillator
+  - 32 kHz oscillator with calibration
+  - Internal 16 MHz RC with PLL option (± 1%)
+  - Internal 32 kHz RC oscillator (± 5%)
+- Up to 107 fast I/Os
+  - All mappable on external interrupt vectors
+  - Several I/Os with 5 V tolerant capability
+- Interconnect matrix
+- 16-channel DMA controller
+- 5 x 12-bit ADCs 0.25 µs, up to 42 channels. Resolution up to 16-bit with hardware oversampling, 0 to 3.6 V conversion range
+- 7 x 12-bit DAC channels
+  - 3 x buffered external channels 1 MSPS
+  - 4 x unbuffered internal channels 15 MSPS
+- 7 x ultra-fast rail-to-rail analog comparators
+- 6 x operational amplifiers that can be used in PGA mode, all terminals accessible
+- Internal voltage reference buffer (VREFBUF) supporting three output voltages (2.048 V, 2.5 V, 2.9 V)
+- 17 timers:
+  - HRTIM (Hi-Resolution and complex waveform builder): 6 x16-bit counters, 184 ps resolution, 12 PWM
+  - 2 x 32-bit timer and 2 x 16-bit timers with up to four IC/OC/PWM or pulse counter and quadrature (incremental) encoder input
+  - 3 x 16-bit 8-channel advanced motor control timers, with up to 8 x PWM channels, dead time generation and emergency stop
+  - 1 x 16-bit timer with 2 x IC/OCs, one OCN/PWM, dead time generation and emergency stop
+  - 2 x 16-bit timers with IC/OC/OCN/PWM, dead time generation and emergency stop
+  - 2 x watchdog timers (independent, window)
+  - 1 x SysTick timer: 24-bit downcounter
+  - 2 x 16-bit basic timers
+  - 1 x low-power timer
+- Calendar RTC with alarm, periodic wakeup from stop/standby
+- Communication interfaces
+  - 3 x FDCAN controller supporting flexible data rate
+  - 4 x I2C Fast mode plus (1 Mbit/s) with 20 mA current sink, SMBus/PMBus, wakeup from stop
+  - 5 x USART/UARTs (ISO 7816 interface, LIN, IrDA, modem control)
+  - 1 x LPUART
+  - 4 x SPIs, 4 to 16 programmable bit frames, 2 x with multiplexed half duplex I2S interface
+  - 1 x SAI (serial audio interface)
+  - USB 2.0 full-speed interface with LPM and BCD support
+  - IRTIM (infrared interface)
+  - USB Type-C™ /USB power delivery controller (UCPD)
+- True random number generator (RNG)
+- CRC calculation unit, 96-bit unique ID
+- Development support: serial wire debug (SWD), JTAG, Embedded Trace Macrocell™
+
+
+
+## Read more
+
+|                          Documents                           |                         Description                          |
+| :----------------------------------------------------------: | :----------------------------------------------------------: |
+| [STM32_Nucleo-64_BSP_Introduction](../docs/STM32_Nucleo-64_BSP_Introduction.md) | How to run RT-Thread on STM32 Nucleo-64 boards (**Must-Read**) |
+| [STM32G474RE ST Official Website](https://www.st.com/en/microcontrollers-microprocessors/stm32g474re.html#documentation) |          STM32G474RB datasheet and other resources           |
+
+
+
+## Maintained By
+
+[mazhiyuan](https://github.com/cndabai), <[email protected]>

bsp/stm32/stm32g474-st-nucleo/README.md

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+# NUCLEO-G474RE 开发板 BSP 说明
+
+## 简介
+
+本文档为 NUCLEO-G474RE 开发板的 BSP (板级支持包) 说明。
+
+主要内容如下：
+
+- 开发板资源介绍
+- BSP 快速上手
+- 进阶使用方法
+
+通过阅读快速上手章节开发者可以快速地上手该 BSP，将 RT-Thread 运行在开发板上。在进阶使用指南章节，将会介绍更多高级功能，帮助开发者利用 RT-Thread 驱动更多板载资源。
+
+## 开发板介绍
+
+NUCLEO-G474RE 是 ST 公司推出的一款针对 STM32G4 系列设计的 Cortex-M4 Nucleo-64 开发板。
+
+开发板外观如下图所示：
+
+![board](figures/board.jpg)
+
+该开发板常用 **板载资源** 如下：
+
+- MCU：STM32G431RB，主频 170MHz，128KB FLASH ，32KB RAM
+- 常用外设
+  - LED：1个，LD2（黄色，PA5）
+- 常用接口：USB 转串口
+- 调试接口，标准 ST-LINK/SWD
+
+开发板更多详细信息请参考【NUCLEO-G474RE】 [开发板介绍](https://www.st.com/zh/evaluation-tools/nucleo-g474re.html)。
+
+## 外设支持
+
+本 BSP 目前对外设的支持情况如下：
+
+| **板载外设**      | **支持情况** | **备注**                              |
+| :----------------- | :----------: | :------------------------------------- |
+| USB 转串口        |     支持     |                                       |
+| **片上外设**      | **支持情况** | **备注**                              |
+| GPIO              |     支持     |                                       |
+| UART              |     支持     | LPUART1 USART1/3 UART4                |
+
+## 使用说明
+
+使用说明分为如下两个章节：
+
+- 快速上手
+
+    本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。
+
+- 进阶使用
+
+    本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置，可以开启更多板载资源，实现更多高级功能。
+
+
+### 快速上手
+
+本 BSP 为开发者提供 MDK5 和 IAR 工程，并且支持 GCC 开发环境。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。
+
+#### 硬件连接
+
+使用数据线连接开发板到 PC，通过数据线对开发板供电,下载,调试。
+
+#### 编译下载
+
+双击 project.uvprojx 文件，打开 MDK5 工程，编译并下载程序到开发板。
+
+> 工程默认配置使用 ST-LINK 仿真器下载程序，在通过 ST-LINK 连接开发板的基础上，点击下载按钮即可下载程序到开发板
+
+#### 运行结果
+
+下载程序成功之后，系统会自动运行，黄色的 LD2 以 500MS 周期闪烁。
+
+连接开发板对应串口到 PC , 在终端工具里打开相应的串口（115200-8-1-N），复位设备后，可以看到 RT-Thread 的输出信息:
+
+```bash
+ \ | /
+- RT -     Thread Operating System
+ / | \     4.0.2 build Oct  5 2019
+ 2006 - 2019 Copyright by rt-thread team
+msh >
+```
+### 进阶使用
+
+此 BSP 默认只开启了 GPIO 和 LPUART1 的功能，如果需使用更多高级功能，需要利用 ENV 工具对 BSP 进行配置，步骤如下：
+
+1. 在 bsp 下打开 env 工具。
+
+2. 输入`menuconfig`命令配置工程，配置好之后保存退出。
+
+3. 输入`pkgs --update`命令更新软件包。
+
+4. 输入`scons --target=mdk4/mdk5/iar` 命令重新生成工程。
+
+本章节更多详细的介绍请参考 [STM32 系列 BSP 外设驱动使用教程](../docs/STM32系列BSP外设驱动使用教程.md)。
+
+## 注意事项
+
+- 默认终端输出设备是 LPUART1
+
+## 联系人信息
+
+维护人:
+
+-   [mazhiyuan](https://github.com/cndabai), 邮箱：<[email protected]>

bsp/stm32/stm32g474-st-nucleo/README_zh.md

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+# for module compiling
+import os
+Import('RTT_ROOT')
+from building import *
+
+cwd = GetCurrentDir()
+objs = []
+list = os.listdir(cwd)
+
+for d in list:
+    path = os.path.join(cwd, d)
+    if os.path.isfile(os.path.join(path, 'SConscript')):
+        objs = objs + SConscript(os.path.join(d, 'SConscript'))
+
+Return('objs')

bsp/stm32/stm32g474-st-nucleo/SConscript

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+import os
+import sys
+import rtconfig
+
+if os.getenv('RTT_ROOT'):
+    RTT_ROOT = os.getenv('RTT_ROOT')
+else:
+    RTT_ROOT = os.path.normpath(os.getcwd() + '/../../..')
+
+sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
+try:
+    from building import *
+except:
+    print('Cannot found RT-Thread root directory, please check RTT_ROOT')
+    print(RTT_ROOT)
+    exit(-1)
+
+TARGET = 'rt-thread.' + rtconfig.TARGET_EXT
+
+DefaultEnvironment(tools=[])
+env = Environment(tools = ['mingw'],
+    AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
+    CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
+    AR = rtconfig.AR, ARFLAGS = '-rc',
+    CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS,
+    LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
+env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
+
+if rtconfig.PLATFORM == 'iar':
+    env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
+    env.Replace(ARFLAGS = [''])
+    env.Replace(LINKCOM = env["LINKCOM"] + ' --map rt-thread.map')
+
+Export('RTT_ROOT')
+Export('rtconfig')
+
+SDK_ROOT = os.path.abspath('./')
+
+if os.path.exists(SDK_ROOT + '/libraries'):
+    libraries_path_prefix = SDK_ROOT + '/libraries'
+else:
+    libraries_path_prefix = os.path.dirname(SDK_ROOT) + '/libraries'
+
+SDK_LIB = libraries_path_prefix
+Export('SDK_LIB')
+
+# prepare building environment
+objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
+
+stm32_library = 'STM32G4xx_HAL'
+rtconfig.BSP_LIBRARY_TYPE = stm32_library
+
+# include libraries
+objs.extend(SConscript(os.path.join(libraries_path_prefix, stm32_library, 'SConscript')))
+
+# include drivers
+objs.extend(SConscript(os.path.join(libraries_path_prefix, 'HAL_Drivers', 'SConscript')))
+
+# make a building
+DoBuilding(TARGET, objs)

bsp/stm32/stm32g474-st-nucleo/SConstruct

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+import rtconfig
+from building import *
+
+cwd     = GetCurrentDir()
+CPPPATH = [cwd, str(Dir('#'))]
+src     = Split("""
+main.c
+""")
+
+group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
+
+Return('group')

bsp/stm32/stm32g474-st-nucleo/applications/SConscript

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+/*
+ * Copyright (c) 2006-2021, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2018-11-06     SummerGift   first version
+ */
+
+#include <rtthread.h>
+#include <rtdevice.h>
+#include <board.h>
+
+/* defined the LED2 pin: PA5 */
+#define LED2_PIN    GET_PIN(A, 5)
+
+int main(void)
+{
+    /* set LED2 pin mode to output */
+    rt_pin_mode(LED2_PIN, PIN_MODE_OUTPUT);
+
+    while (1)
+    {
+        rt_pin_write(LED2_PIN, PIN_HIGH);
+        rt_thread_mdelay(500);
+        rt_pin_write(LED2_PIN, PIN_LOW);
+        rt_thread_mdelay(500);
+    }
+}