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BernardXiongBernardXiong
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Merge pull request #4223 from iysheng/master
[bsp][gd32103c-eval] Add gd32103c-eval bsp [src/kservice.c] 更新打印提示時間信息
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‎bsp/gd32103c-eval/Kconfig‎

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mainmenu "RT-Thread Configuration"
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config BSP_DIR
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string
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option env="BSP_ROOT"
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default "."
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config RTT_DIR
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string
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option env="RTT_ROOT"
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default "../.."
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# you can change the RTT_ROOT default: "rt-thread"
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# example : default "F:/git_repositories/rt-thread"
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config PKGS_DIR
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string
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option env="PKGS_ROOT"
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default "packages"
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source "$RTT_DIR/Kconfig"
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source "$PKGS_DIR/Kconfig"
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config SOC_SERIES_GD32F1
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bool
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default y
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config SOC_GD32103C
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bool
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select RT_USING_COMPONENTS_INIT
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select RT_USING_USER_MAIN
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select SOC_SERIES_GD32F1
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default y
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menu "On-chip Peripheral Drivers"
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menuconfig BSP_USING_UART
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bool "Enable UART"
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default y
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select RT_USING_SERIAL
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if BSP_USING_UART
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config BSP_USING_UART0
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bool "using uart0"
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default n
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config BSP_USING_UART1
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bool "using uart1"
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default n
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config BSP_USING_UART2
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bool "using uart2"
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default y
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config BSP_USING_UART3
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bool "using uart3"
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default n
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config BSP_USING_UART4
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bool "using uart4"
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default n
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endif
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menuconfig BSP_USING_ADC
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bool "Enable ADC"
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default n
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select RT_USING_ADC
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if BSP_USING_ADC
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config BSP_USING_ADC0
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bool "using adc0"
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default n
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config BSP_USING_ADC1
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bool "using adc1"
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default n
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endif
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endmenu

‎bsp/gd32103c-eval/Libraries/CMSIS/GD/GD32F1xx/Include/gd32f10x.h‎

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‎bsp/gd32103c-eval/Libraries/CMSIS/GD/GD32F1xx/Include/gd32f10x_conf.h‎

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/**
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******************************************************************************
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* @brief Configuration file.
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __GD32F10X_CONF_H
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#define __GD32F10X_CONF_H
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/* Includes ------------------------------------------------------------------*/
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/* Comment the line below to disable peripheral header file inclusion */
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#include "gd32f10x_adc.h"
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#include "gd32f10x_bkp.h"
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#include "gd32f10x_can.h"
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#include "gd32f10x_crc.h"
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#include "gd32f10x_dac.h"
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#include "gd32f10x_dma.h"
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#include "gd32f10x_eth.h"
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#include "gd32f10x_exmc.h"
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#include "gd32f10x_exti.h"
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#include "gd32f10x_fmc.h"
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#include "gd32f10x_gpio.h"
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#include "gd32f10x_i2c.h"
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#include "gd32f10x_iwdg.h"
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#include "gd32f10x_mcudbg.h"
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#include "gd32f10x_misc.h"
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#include "gd32f10x_pwr.h"
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#include "gd32f10x_rcc.h"
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#include "gd32f10x_rcu.h"
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#include "gd32f10x_rtc.h"
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#include "gd32f10x_sdio.h"
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#include "gd32f10x_spi.h"
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#include "gd32f10x_timer.h"
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#include "gd32f10x_usart.h"
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#include "gd32f10x_wwdg.h"
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#endif /* __GD32F10X_CONF_H */
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‎bsp/gd32103c-eval/Libraries/CMSIS/GD/GD32F1xx/Include/system_gd32f10x.h‎

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/**
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******************************************************************************
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* @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Header File.
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******************************************************************************
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*/
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/** @addtogroup CMSIS
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* @{
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*/
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/** @addtogroup GD32F10x_system
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* @{
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*/
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/**
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* @brief Define to prevent recursive inclusion
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*/
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#ifndef __SYSTEM_GD32F10X_H
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#define __SYSTEM_GD32F10X_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/** @addtogroup GD32F10x_System_Includes
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* @{
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*/
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/**
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* @}
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*/
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/** @addtogroup GD32F10x_System_Exported_types
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* @{
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*/
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extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
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/**
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* @}
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*/
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/** @addtogroup GD32F10x_System_Exported_Functions
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* @{
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*/
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extern void SystemInit(void);
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extern void SystemCoreClockUpdate(void);
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/**
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* @}
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*/
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#ifdef __cplusplus
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}
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#endif
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#endif /*__SYSTEM_GD32F10X_H */
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/**
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* @}
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*/
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/**
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* @}
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*/
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‎bsp/gd32103c-eval/Libraries/CMSIS/GD/GD32F1xx/Source/GCC/isr_tab.s‎

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/*
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* File : isr_tab.s
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2021, RT-Thread Development Team
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*
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* Change Logs:
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* Date Author Notes
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* 2021-01-02 iysheng first implementation
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*/
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.syntax unified
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.cpu cortex-m3
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.fpu softvfp
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.thumb
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.global g_isr_vectors
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.section .isr_vector,"a",%progbits
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.type g_isr_vectors, STT_OBJECT
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.weak Reset_Handler
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g_isr_vectors:
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.word _estack /* Top of Stack */
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.word Reset_Handler /* Reset Handler */
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.word NMI_Handler /* NMI Handler */
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.word HardFault_Handler /* Hard Fault Handler */
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.word MemManage_Handler /* MPU Fault Handler */
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.word BusFault_Handler /* Bus Fault Handler */
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.word UsageFault_Handler /* Usage Fault Handler */
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.word 0 /* Reserved */
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.word 0 /* Reserved */
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.word 0 /* Reserved */
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.word 0 /* Reserved */
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.word SVC_Handler /* SVCall Handler */
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.word DebugMon_Handler /* Debug Monitor Handler */
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.word 0 /* Reserved */
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.word PendSV_Handler /* PendSV Handler */
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.word SysTick_Handler /* SysTick Handler */
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/* external interrupts handler */
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.word WWDGT_IRQHandler /* 16:Window Watchdog Timer */
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.word LVD_IRQHandler /* 17:LVD through EXTI Line detect */
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.word TAMPER_IRQHandler /* 18:Tamper through EXTI Line detect */
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.word RTC_IRQHandler /* 19:RTC through EXTI Line */
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.word FMC_IRQHandler /* 20:FMC */
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.word RCU_CTC_IRQHandler /* 21:RCU and CTC */
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.word EXTI0_IRQHandler /* 22:EXTI Line 0 */
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.word EXTI1_IRQHandler /* 23:EXTI Line 1 */
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.word EXTI2_IRQHandler /* 24:EXTI Line 2 */
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.word EXTI3_IRQHandler /* 25:EXTI Line 3 */
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.word EXTI4_IRQHandler /* 26:EXTI Line 4 */
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.word DMA0_Channel0_IRQHandler /* 27:DMA0 Channel0 */
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.word DMA0_Channel1_IRQHandler /* 28:DMA0 Channel1 */
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.word DMA0_Channel2_IRQHandler /* 29:DMA0 Channel2 */
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.word DMA0_Channel3_IRQHandler /* 30:DMA0 Channel3 */
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.word DMA0_Channel4_IRQHandler /* 31:DMA0 Channel4 */
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.word DMA0_Channel5_IRQHandler /* 32:DMA0 Channel5 */
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.word DMA0_Channel6_IRQHandler /* 33:DMA0 Channel6 */
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.word ADC0_1_IRQHandler /* 34:ADC0 and ADC1 */
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.word USBD_HP_CAN0_TX_IRQHandler /* 35:USBD HP and CAN0 TX */
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.word USBD_LP_CAN0_RX0_IRQHandler /* 36:USBD LP and CAN0 RX0 */
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.word CAN0_RX1_IRQHandler /* 37:CAN0 RX1 */
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.word CAN0_EWMC_IRQHandler /* 38:CAN0 EWMC */
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.word EXTI5_9_IRQHandler /* 39:EXTI5 to EXTI9 */
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.word TIMER0_BRK_IRQHandler /* 40:TIMER0 Break */
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.word TIMER0_UP_IRQHandler /* 41:TIMER0 Update */
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.word TIMER0_TRG_CMT_IRQHandler /* 42:TIMER0 Trigger and Commutation */
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.word TIMER0_Channel_IRQHandler /* 43:TIMER0 Channel Capture Compare */
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.word TIMER1_IRQHandler /* 44:TIMER1 */
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.word TIMER2_IRQHandler /* 45:TIMER2 */
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.word TIMER3_IRQHandler /* 46:TIMER3 */
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.word I2C0_EV_IRQHandler /* 47:I2C0 Event */
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.word I2C0_ER_IRQHandler /* 48:I2C0 Error */
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.word I2C1_EV_IRQHandler /* 49:I2C1 Event */
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.word I2C1_ER_IRQHandler /* 50:I2C1 Error */
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.word SPI0_IRQHandler /* 51:SPI0 */
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.word SPI1_IRQHandler /* 52:SPI1 */
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.word USART0_IRQHandler /* 53:USART0 */
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.word USART1_IRQHandler /* 54:USART1 */
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.word USART2_IRQHandler /* 55:USART2 */
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.word EXTI10_15_IRQHandler /* 56:EXTI10 to EXTI15 */
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.word RTC_Alarm_IRQHandler /* 57:RTC Alarm */
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.word USBD_WKUP_IRQHandler /* 58:USBD Wakeup */
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.word TIMER7_BRK_IRQHandler /* 59:TIMER7 Break */
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.word TIMER7_UP_IRQHandler /* 60:TIMER7 Update */
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.word TIMER7_TRG_CMT_IRQHandler /* 61:TIMER7 Trigger and Commutation */
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.word TIMER7_Channel_IRQHandler /* 62:TIMER7 Channel Capture Compare */
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.word ADC2_IRQHandler /* 63:ADC2 */
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.word EXMC_IRQHandler /* 64:EXMC */
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.word SDIO_IRQHandler /* 65:SDIO */
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.word TIMER4_IRQHandler /* 66:TIMER4 */
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.word SPI2_IRQHandler /* 67:SPI2 */
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.word UART3_IRQHandler /* 68:UART3 */
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.word UART4_IRQHandler /* 69:UART4 */
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.word TIMER5_IRQHandler /* 70:TIMER5 */
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.word TIMER6_IRQHandler /* 71:TIMER6 */
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.word DMA1_Channel0_IRQHandler /* 72:DMA1 Channel0 */
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.word DMA1_Channel1_IRQHandler /* 73:DMA1 Channel1 */
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.word DMA1_Channel2_IRQHandler /* 74:DMA1 Channel2 */
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.word DMA1_Channel3_4_IRQHandler /* 75:DMA1 Channel3 and Channel4 */
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/* Exception Handlers */
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.weak NMI_Handler
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.type NMI_Handler, STT_FUNC
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NMI_Handler:
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b .
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.weak MemManage_Handler
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.type MemManage_Handler, STT_FUNC
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MemManage_Handler:
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b .
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.weak BusFault_Handler
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.type BusFault_Handler, STT_FUNC
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BusFault_Handler:
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b .
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.weak UsageFault_Handler
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.type UsageFault_Handler, STT_FUNC
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UsageFault_Handler:
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b .
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.weak SVC_Handler
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.type SVC_Handler, STT_FUNC
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SVC_Handler:
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b .
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.weak DebugMon_Handler
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.type DebugMon_Handler, STT_FUNC
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DebugMon_Handler:
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b .
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.weak PendSV_Handler
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.type PendSV_Handler, STT_FUNC
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PendSV_Handler:
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b .
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.weak SysTick_Handler
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.type SysTick_Handler, STT_FUNC
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SysTick_Handler:
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b .
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.global default_irq_handler
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.section .text.default_irq_handler,"ax",%progbits
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.type default_irq_handler, STT_FUNC
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default_irq_handler:
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b .
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.macro IRQ handler
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.weak \handler
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.set \handler, default_irq_handler
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.endm
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/* IQR Handler */
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IRQ WWDGT_IRQHandler
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IRQ LVD_IRQHandler
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IRQ TAMPER_IRQHandler
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IRQ RTC_IRQHandler
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IRQ FMC_IRQHandler
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IRQ RCU_CTC_IRQHandler
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IRQ EXTI0_IRQHandler
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IRQ EXTI1_IRQHandler
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IRQ EXTI2_IRQHandler
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IRQ EXTI3_IRQHandler
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IRQ EXTI4_IRQHandler
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IRQ DMA0_Channel0_IRQHandler
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IRQ DMA0_Channel1_IRQHandler
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IRQ DMA0_Channel2_IRQHandler
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IRQ DMA0_Channel3_IRQHandler
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IRQ DMA0_Channel4_IRQHandler
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IRQ DMA0_Channel5_IRQHandler
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IRQ DMA0_Channel6_IRQHandler
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IRQ ADC0_1_IRQHandler
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IRQ USBD_HP_CAN0_TX_IRQHandler
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IRQ USBD_LP_CAN0_RX0_IRQHandler
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IRQ CAN0_RX1_IRQHandler
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IRQ CAN0_EWMC_IRQHandler
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IRQ EXTI5_9_IRQHandler
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IRQ TIMER0_BRK_IRQHandler
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IRQ TIMER0_UP_IRQHandler
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IRQ TIMER0_TRG_CMT_IRQHandler
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IRQ TIMER0_Channel_IRQHandler
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IRQ TIMER1_IRQHandler
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IRQ TIMER2_IRQHandler
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IRQ TIMER3_IRQHandler
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IRQ I2C0_EV_IRQHandler
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IRQ I2C0_ER_IRQHandler
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IRQ I2C1_EV_IRQHandler
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IRQ I2C1_ER_IRQHandler
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IRQ SPI0_IRQHandler
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IRQ SPI1_IRQHandler
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IRQ USART0_IRQHandler
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IRQ USART1_IRQHandler
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IRQ USART2_IRQHandler
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IRQ EXTI10_15_IRQHandler
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IRQ RTC_Alarm_IRQHandler
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IRQ USBD_WKUP_IRQHandler
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IRQ TIMER7_BRK_IRQHandler
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IRQ TIMER7_UP_IRQHandler
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IRQ TIMER7_TRG_CMT_IRQHandler
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IRQ TIMER7_Channel_IRQHandler
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IRQ ADC2_IRQHandler
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IRQ EXMC_IRQHandler
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IRQ SDIO_IRQHandler
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IRQ TIMER4_IRQHandler
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IRQ SPI2_IRQHandler
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IRQ UART3_IRQHandler
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IRQ UART4_IRQHandler
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IRQ TIMER5_IRQHandler
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IRQ TIMER6_IRQHandler
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IRQ DMA1_Channel0_IRQHandler
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IRQ DMA1_Channel1_IRQHandler
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IRQ DMA1_Channel2_IRQHandler
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IRQ DMA1_Channel3_4_IRQHandler

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