88*****************************************************************************/
99#include "M031Series.h"
1010
11-
12- static uint8_t u8ChSelect [PDMA_CH_MAX ];
13-
1411/** @addtogroup Standard_Driver Standard Driver
1512 @{
1613*/
@@ -28,6 +25,7 @@ static uint8_t u8ChSelect[PDMA_CH_MAX];
2825 * @brief PDMA Open
2926 *
3027 * @param[in] pdma The pointer of the specified PDMA module
28+ *
3129 * @param[in] u32Mask Channel enable bits.
3230 *
3331 * @return None
@@ -40,10 +38,9 @@ void PDMA_Open(PDMA_T *pdma, uint32_t u32Mask)
4038
4139 for (i = 0UL ; i < PDMA_CH_MAX ; i ++ )
4240 {
43- if ((1 << i ) & u32Mask )
41+ if ((1 << i ) & u32Mask )
4442 {
4543 pdma -> DSCT [i ].CTL = 0UL ;
46- u8ChSelect [i ] = PDMA_MEM ;
4744 }
4845 }
4946
@@ -166,59 +163,26 @@ void PDMA_SetTransferAddr(PDMA_T *pdma, uint32_t u32Ch, uint32_t u32SrcAddr, uin
166163 */
167164void PDMA_SetTransferMode (PDMA_T * pdma , uint32_t u32Ch , uint32_t u32Peripheral , uint32_t u32ScatterEn , uint32_t u32DescAddr )
168165{
169- u8ChSelect [u32Ch ] = u32Peripheral ;
170-
171- switch (u32Ch )
166+ if (u32Ch < PDMA_CH_MAX )
172167 {
173- case 0ul :
174- pdma -> REQSEL0_3 = (pdma -> REQSEL0_3 & ~PDMA_REQSEL0_3_REQSRC0_Msk ) | u32Peripheral ;
175- break ;
176-
177- case 1ul :
178- pdma -> REQSEL0_3 = (pdma -> REQSEL0_3 & ~PDMA_REQSEL0_3_REQSRC1_Msk ) | (u32Peripheral << PDMA_REQSEL0_3_REQSRC1_Pos );
179- break ;
180-
181- case 2ul :
182- pdma -> REQSEL0_3 = (pdma -> REQSEL0_3 & ~PDMA_REQSEL0_3_REQSRC2_Msk ) | (u32Peripheral << PDMA_REQSEL0_3_REQSRC2_Pos );
183- break ;
184-
185- case 3ul :
186- pdma -> REQSEL0_3 = (pdma -> REQSEL0_3 & ~PDMA_REQSEL0_3_REQSRC3_Msk ) | (u32Peripheral << PDMA_REQSEL0_3_REQSRC3_Pos );
187- break ;
188-
189- case 4ul :
190- pdma -> REQSEL4_7 = (pdma -> REQSEL4_7 & ~PDMA_REQSEL4_7_REQSRC4_Msk ) | u32Peripheral ;
191- break ;
192-
193- case 5ul :
194- pdma -> REQSEL4_7 = (pdma -> REQSEL4_7 & ~PDMA_REQSEL4_7_REQSRC5_Msk ) | (u32Peripheral << PDMA_REQSEL4_7_REQSRC5_Pos );
195- break ;
196-
197- case 6ul :
198- pdma -> REQSEL4_7 = (pdma -> REQSEL4_7 & ~PDMA_REQSEL4_7_REQSRC6_Msk ) | (u32Peripheral << PDMA_REQSEL4_7_REQSRC6_Pos );
199- break ;
200-
201- case 7ul :
202- pdma -> REQSEL4_7 = (pdma -> REQSEL4_7 & ~PDMA_REQSEL4_7_REQSRC7_Msk ) | (u32Peripheral << PDMA_REQSEL4_7_REQSRC7_Pos );
203- break ;
204-
205- case 8ul :
206- pdma -> REQSEL8 = (pdma -> REQSEL8 & ~PDMA_REQSEL8_REQSRC8_Msk ) | u32Peripheral ;
207- break ;
168+ __IO uint32_t * pau32REQSEL = (__IO uint32_t * )& pdma -> REQSEL0_3 ;
169+ uint32_t u32REQSEL_Pos , u32REQSEL_Msk ;
208170
209- default :
210- break ;
211- }
171+ u32REQSEL_Pos = ( u32Ch % 4 ) * 8 ;
172+ u32REQSEL_Msk = PDMA_REQSEL0_3_REQSRC0_Msk << u32REQSEL_Pos ;
173+ pau32REQSEL [ u32Ch / 4 ] = ( pau32REQSEL [ u32Ch / 4 ] & ~ u32REQSEL_Msk ) | ( u32Peripheral << u32REQSEL_Pos );
212174
213- if (u32ScatterEn )
214- {
215- pdma -> DSCT [u32Ch ].CTL = (pdma -> DSCT [u32Ch ].CTL & ~PDMA_DSCT_CTL_OPMODE_Msk ) | PDMA_OP_SCATTER ;
216- pdma -> DSCT [u32Ch ].NEXT = u32DescAddr - (pdma -> SCATBA );
217- }
218- else
219- {
220- pdma -> DSCT [u32Ch ].CTL = (pdma -> DSCT [u32Ch ].CTL & ~PDMA_DSCT_CTL_OPMODE_Msk ) | PDMA_OP_BASIC ;
175+ if (u32ScatterEn )
176+ {
177+ pdma -> DSCT [u32Ch ].CTL = (pdma -> DSCT [u32Ch ].CTL & ~PDMA_DSCT_CTL_OPMODE_Msk ) | PDMA_OP_SCATTER ;
178+ pdma -> DSCT [u32Ch ].NEXT = u32DescAddr - (pdma -> SCATBA );
179+ }
180+ else
181+ {
182+ pdma -> DSCT [u32Ch ].CTL = (pdma -> DSCT [u32Ch ].CTL & ~PDMA_DSCT_CTL_OPMODE_Msk ) | PDMA_OP_BASIC ;
183+ }
221184 }
185+ else {}
222186}
223187
224188/**
@@ -253,6 +217,7 @@ void PDMA_SetBurstType(PDMA_T *pdma, uint32_t u32Ch, uint32_t u32BurstType, uint
253217 * @brief Enable timeout function
254218 *
255219 * @param[in] pdma The pointer of the specified PDMA module
220+ *
256221 * @param[in] u32Mask Channel enable bits.
257222 *
258223 * @return None
@@ -268,6 +233,7 @@ void PDMA_EnableTimeout(PDMA_T *pdma, uint32_t u32Mask)
268233 * @brief Disable timeout function
269234 *
270235 * @param[in] pdma The pointer of the specified PDMA module
236+ *
271237 * @param[in] u32Mask Channel enable bits.
272238 *
273239 * @return None
@@ -294,24 +260,21 @@ void PDMA_DisableTimeout(PDMA_T *pdma, uint32_t u32Mask)
294260 */
295261void PDMA_SetTimeOut (PDMA_T * pdma , uint32_t u32Ch , uint32_t u32OnOff , uint32_t u32TimeOutCnt )
296262{
297- switch (u32Ch )
263+ if (u32Ch < 2 )
298264 {
299- case 0ul :
300- pdma -> TOC0_1 = (pdma -> TOC0_1 & ~PDMA_TOC0_1_TOC0_Msk ) | u32TimeOutCnt ;
301- break ;
265+ __IO uint32_t * pau32TOC = (__IO uint32_t * )& pdma -> TOC0_1 ;
266+ uint32_t u32TOC_Pos , u32TOC_Msk ;
302267
303- case 1ul :
304- pdma -> TOC0_1 = ( pdma -> TOC0_1 & ~ PDMA_TOC0_1_TOC1_Msk ) | ( u32TimeOutCnt << PDMA_TOC0_1_TOC1_Pos ) ;
305- break ;
268+ u32TOC_Pos = ( u32Ch % 2 ) * 16 ;
269+ u32TOC_Msk = PDMA_TOC0_1_TOC0_Msk << u32TOC_Pos ;
270+ pau32TOC [ u32Ch / 2 ] = ( pau32TOC [ u32Ch / 2 ] & ~ u32TOC_Msk ) | ( u32TimeOutCnt << u32TOC_Pos ) ;
306271
307- default :
308- break ;
272+ if (u32OnOff )
273+ pdma -> TOUTEN |= (1 << u32Ch );
274+ else
275+ pdma -> TOUTEN &= ~(1 << u32Ch );
309276 }
310-
311- if (u32OnOff )
312- pdma -> TOUTEN |= (1ul << u32Ch );
313- else
314- pdma -> TOUTEN &= ~(1ul << u32Ch );
277+ else {}
315278}
316279
317280/**
@@ -326,7 +289,15 @@ void PDMA_SetTimeOut(PDMA_T *pdma, uint32_t u32Ch, uint32_t u32OnOff, uint32_t u
326289 */
327290void PDMA_Trigger (PDMA_T * pdma , uint32_t u32Ch )
328291{
329- if (u8ChSelect [u32Ch ] == PDMA_MEM )
292+ __IO uint32_t * pau32REQSEL = (__IO uint32_t * )& pdma -> REQSEL0_3 ;
293+ uint32_t u32REQSEL_Pos , u32REQSEL_Msk , u32ChReq ;
294+
295+ u32REQSEL_Pos = (u32Ch % 4 ) * 8 ;
296+ u32REQSEL_Msk = PDMA_REQSEL0_3_REQSRC0_Msk << u32REQSEL_Pos ;
297+
298+ u32ChReq = (pau32REQSEL [u32Ch / 4 ] & u32REQSEL_Msk ) >> u32REQSEL_Pos ;
299+
300+ if (u32ChReq == PDMA_MEM )
330301 {
331302 pdma -> SWREQ = (1ul << u32Ch );
332303 }
@@ -354,11 +325,9 @@ void PDMA_EnableInt(PDMA_T *pdma, uint32_t u32Ch, uint32_t u32Mask)
354325 case PDMA_INT_TRANS_DONE :
355326 pdma -> INTEN |= (1ul << u32Ch );
356327 break ;
357-
358328 case PDMA_INT_TEMPTY :
359329 pdma -> DSCT [u32Ch ].CTL &= ~PDMA_DSCT_CTL_TBINTDIS_Msk ;
360330 break ;
361-
362331 case PDMA_INT_TIMEOUT :
363332 pdma -> TOUTIEN |= (1ul << u32Ch );
364333 break ;
@@ -389,11 +358,9 @@ void PDMA_DisableInt(PDMA_T *pdma, uint32_t u32Ch, uint32_t u32Mask)
389358 case PDMA_INT_TRANS_DONE :
390359 pdma -> INTEN &= ~(1ul << u32Ch );
391360 break ;
392-
393361 case PDMA_INT_TEMPTY :
394362 pdma -> DSCT [u32Ch ].CTL |= PDMA_DSCT_CTL_TBINTDIS_Msk ;
395363 break ;
396-
397364 case PDMA_INT_TIMEOUT :
398365 pdma -> TOUTIEN &= ~(1ul << u32Ch );
399366 break ;
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