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[hc32] Add the ev_hc32f4a8_lqfp176 board and modify some bsp drivers. (#10233)
* [hc32] Add the ev_hc32f4a8_lqfp176 board and modify some bsp drivers.
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‎.github/ALL_BSP_COMPILE.json‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -53,6 +53,7 @@
5353
"at32/at32m412-start",
5454
"at32/at32m416-start",
5555
"hc32/ev_hc32f4a0_lqfp176",
56+
"hc32/ev_hc32f4a8_lqfp176",
5657
"hc32/ev_hc32f448_lqfp80",
5758
"hc32/ev_hc32f460_lqfp100_v2",
5859
"hc32/ev_hc32f472_lqfp100",

‎bsp/hc32/ev_hc32f448_lqfp80/board/board.h‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -20,8 +20,8 @@
2020
extern "C" {
2121
#endif
2222

23-
24-
#define HC32_FLASH_SIZE_GRANULARITY (8 * 1024)
23+
#define HC32_FLASH_ERASE_GRANULARITY (8 * 1024)
24+
#define HC32_FLASH_WRITE_GRANULARITY (4)
2525
#define HC32_FLASH_SIZE (256 * 1024)
2626
#define HC32_FLASH_START_ADDRESS (0)
2727
#define HC32_FLASH_END_ADDRESS (HC32_FLASH_START_ADDRESS + HC32_FLASH_SIZE)

‎bsp/hc32/ev_hc32f448_lqfp80/board/board_config.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -157,7 +157,7 @@ void CanPhyEnable(void)
157157
TCA9539_ConfigPin(CAN2_STB_PORT, CAN2_STB_PIN, TCA9539_DIR_OUT);
158158
#endif
159159
}
160-
rt_err_t rt_hw_board_can_init(CM_MCAN_TypeDef *MCANx)
160+
rt_err_t rt_hw_board_mcan_init(CM_MCAN_TypeDef *MCANx)
161161
{
162162
rt_err_t result = RT_EOK;
163163

bsp/hc32/ev_hc32f448_lqfp80/board/config/can_config.h renamed to bsp/hc32/ev_hc32f448_lqfp80/board/config/mcan_config.h

Lines changed: 15 additions & 25 deletions
Original file line numberDiff line numberDiff line change
@@ -9,8 +9,8 @@
99
* 2024-02-20 CDT first version
1010
*/
1111

12-
#ifndef __CAN_CONFIG_H__
13-
#define __CAN_CONFIG_H__
12+
#ifndef __MCAN_CONFIG_H__
13+
#define __MCAN_CONFIG_H__
1414

1515
#include <rtthread.h>
1616
#include "irq_config.h"
@@ -21,16 +21,6 @@ extern "C" {
2121

2222
/***********************************************************************************************/
2323
/***********************************************************************************************/
24-
// The arguments of RT command RT_CAN_CMD_SET_CANFD
25-
#define MCAN_FD_CLASSICAL 0 /* CAN classical */
26-
#define MCAN_FD_ISO_FD_NO_BRS 1 /* ISO CAN FD without BRS */
27-
#define MCAN_FD_ISO_FD_BRS 2 /* ISO CAN FD with BRS */
28-
#define MCAN_FD_NON_ISO_FD_NO_BRS 3 /* non-ISO CAN FD without BRS */
29-
#define MCAN_FD_NON_ISO_FD_BRS 4 /* non-ISO CAN FD with BRS */
30-
31-
#define MCAN_FD_ARG_MIN MCAN_FD_ISO_FD_NO_BRS
32-
#define MCAN_FD_ARG_MAX MCAN_FD_NON_ISO_FD_BRS
33-
3424
/* The default configuration for MCANs. Users can modify the configurations based on the application.
3525
For the message RAM:
3626
1. MCAN1 and MCAN2 share 2048 bytes message RAM
@@ -59,7 +49,7 @@ extern "C" {
5949
#endif
6050

6151
#ifdef BSP_USING_MCAN1
62-
#define MCAN1_NAME ("can1")
52+
#define MCAN1_NAME ("mcan1")
6353
#define MCAN1_WORK_MODE (RT_CAN_MODE_NORMAL)
6454
#define MCAN1_TX_PRIV_MODE RT_CAN_MODE_NOPRIV /* RT_CAN_MODE_NOPRIV: Tx FIFO mode; RT_CAN_MODE_PRIV: Tx priority mode */
6555

@@ -77,7 +67,7 @@ extern "C" {
7767
#endif /* BSP_USING_MCAN1 */
7868

7969
#ifdef BSP_USING_MCAN2
80-
#define MCAN2_NAME ("can2")
70+
#define MCAN2_NAME ("mcan2")
8171
#define MCAN2_WORK_MODE (RT_CAN_MODE_NORMAL)
8272
#define MCAN2_TX_PRIV_MODE RT_CAN_MODE_NOPRIV /* RT_CAN_MODE_NOPRIV: Tx FIFO mode; RT_CAN_MODE_PRIV: Tx priority mode */
8373

@@ -234,9 +224,9 @@ extern "C" {
234224
#define MCAN_FD_CFG_1M_5M \
235225
{ \
236226
.u32NominalPrescaler = 1, \
237-
.u32NominalTimeSeg1 = 64, \
238-
.u32NominalTimeSeg2 = 16, \
239-
.u32NominalSyncJumpWidth = 16, \
227+
.u32NominalTimeSeg1 = 32, \
228+
.u32NominalTimeSeg2 = 8, \
229+
.u32NominalSyncJumpWidth = 8, \
240230
.u32DataPrescaler = 1, \
241231
.u32DataTimeSeg1 = 6, \
242232
.u32DataTimeSeg2 = 2, \
@@ -249,9 +239,9 @@ extern "C" {
249239
#define MCAN_FD_CFG_1M_8M \
250240
{ \
251241
.u32NominalPrescaler = 1, \
252-
.u32NominalTimeSeg1 = 64, \
253-
.u32NominalTimeSeg2 = 16, \
254-
.u32NominalSyncJumpWidth = 16, \
242+
.u32NominalTimeSeg1 = 32, \
243+
.u32NominalTimeSeg2 = 8, \
244+
.u32NominalSyncJumpWidth = 8, \
255245
.u32DataPrescaler = 1, \
256246
.u32DataTimeSeg1 = 4, \
257247
.u32DataTimeSeg2 = 1, \
@@ -344,12 +334,12 @@ extern "C" {
344334

345335
#ifdef RT_CAN_USING_CANFD
346336
#define MCAN1_BAUD_RATE_CFG MCAN_FD_CFG_1M_4M
347-
#define MCAN1_NOMINAL_BAUD_RATE MCANFD_NOMINAL_BAUD_1M
348-
#define MCAN1_DATA_BAUD_RATE MCANFD_DATA_BAUD_4M
337+
#define MCAN1_NOMINAL_BAUD_RATE CANFD_DATA_BAUD_1M
338+
#define MCAN1_DATA_BAUD_RATE CANFD_DATA_BAUD_4M
349339

350340
#define MCAN2_BAUD_RATE_CFG MCAN_FD_CFG_1M_4M
351-
#define MCAN2_NOMINAL_BAUD_RATE MCANFD_NOMINAL_BAUD_1M
352-
#define MCAN2_DATA_BAUD_RATE MCANFD_DATA_BAUD_4M
341+
#define MCAN2_NOMINAL_BAUD_RATE CANFD_DATA_BAUD_1M
342+
#define MCAN2_DATA_BAUD_RATE CANFD_DATA_BAUD_4M
353343

354344
#else
355345
#define MCAN1_BAUD_RATE_CFG MCAN_CC_CFG_1M
@@ -369,6 +359,6 @@ extern "C" {
369359
}
370360
#endif
371361

372-
#endif /* __CAN_CONFIG_H__ */
362+
#endif /* __MCAN_CONFIG_H__ */
373363

374364

‎bsp/hc32/ev_hc32f448_lqfp80/board/config/spi_config.h‎

Lines changed: 0 additions & 175 deletions
Original file line numberDiff line numberDiff line change
@@ -195,181 +195,6 @@ extern "C" {
195195
#endif /* SPI3_RX_DMA_CONFIG */
196196
#endif /* BSP_SPI3_RX_USING_DMA */
197197

198-
#ifdef BSP_USING_SPI4
199-
#ifndef SPI4_BUS_CONFIG
200-
#define SPI4_BUS_CONFIG \
201-
{ \
202-
.Instance = CM_SPI4, \
203-
.bus_name = "spi4", \
204-
.clock = FCG1_PERIPH_SPI4, \
205-
.timeout = 5000UL, \
206-
.err_irq.irq_config = \
207-
{ \
208-
.irq_num = BSP_SPI4_ERR_IRQ_NUM, \
209-
.irq_prio = BSP_SPI4_ERR_IRQ_PRIO, \
210-
.int_src = INT_SRC_SPI4_SPEI, \
211-
}, \
212-
}
213-
#endif /* SPI4_BUS_CONFIG */
214-
#endif /* BSP_USING_SPI4 */
215-
216-
#ifdef BSP_SPI4_TX_USING_DMA
217-
#ifndef SPI4_TX_DMA_CONFIG
218-
#define SPI4_TX_DMA_CONFIG \
219-
{ \
220-
.Instance = SPI4_TX_DMA_INSTANCE, \
221-
.channel = SPI4_TX_DMA_CHANNEL, \
222-
.clock = SPI4_TX_DMA_CLOCK, \
223-
.trigger_select = SPI4_TX_DMA_TRIG_SELECT, \
224-
.trigger_event = EVT_SRC_SPI4_SPTI, \
225-
.flag = SPI4_TX_DMA_TRANS_FLAG, \
226-
.irq_config = \
227-
{ \
228-
.irq_num = SPI4_TX_DMA_IRQn, \
229-
.irq_prio = SPI4_TX_DMA_INT_PRIO, \
230-
.int_src = SPI4_TX_DMA_INT_SRC, \
231-
} \
232-
}
233-
#endif /* SPI4_TX_DMA_CONFIG */
234-
#endif /* BSP_SPI4_TX_USING_DMA */
235-
236-
#ifdef BSP_SPI4_RX_USING_DMA
237-
#ifndef SPI4_RX_DMA_CONFIG
238-
#define SPI4_RX_DMA_CONFIG \
239-
{ \
240-
.Instance = SPI4_RX_DMA_INSTANCE, \
241-
.channel = SPI4_RX_DMA_CHANNEL, \
242-
.clock = SPI4_RX_DMA_CLOCK, \
243-
.trigger_select = SPI4_RX_DMA_TRIG_SELECT, \
244-
.trigger_event = EVT_SRC_SPI4_SPRI, \
245-
.flag = SPI4_RX_DMA_TRANS_FLAG, \
246-
.irq_config = \
247-
{ \
248-
.irq_num = SPI4_RX_DMA_IRQn, \
249-
.irq_prio = SPI4_RX_DMA_INT_PRIO, \
250-
.int_src = SPI4_RX_DMA_INT_SRC, \
251-
} \
252-
}
253-
#endif /* SPI4_RX_DMA_CONFIG */
254-
#endif /* BSP_SPI4_RX_USING_DMA */
255-
256-
#ifdef BSP_USING_SPI5
257-
#ifndef SPI5_BUS_CONFIG
258-
#define SPI5_BUS_CONFIG \
259-
{ \
260-
.Instance = CM_SPI5, \
261-
.bus_name = "spi5", \
262-
.clock = FCG1_PERIPH_SPI5, \
263-
.timeout = 5000UL, \
264-
.err_irq.irq_config = \
265-
{ \
266-
.irq_num = BSP_SPI5_ERR_IRQ_NUM, \
267-
.irq_prio = BSP_SPI5_ERR_IRQ_PRIO, \
268-
.int_src = INT_SRC_SPI5_SPEI, \
269-
}, \
270-
}
271-
#endif /* SPI5_BUS_CONFIG */
272-
#endif /* BSP_USING_SPI5 */
273-
274-
#ifdef BSP_SPI5_TX_USING_DMA
275-
#ifndef SPI5_TX_DMA_CONFIG
276-
#define SPI5_TX_DMA_CONFIG \
277-
{ \
278-
.Instance = SPI5_TX_DMA_INSTANCE, \
279-
.channel = SPI5_TX_DMA_CHANNEL, \
280-
.clock = SPI5_TX_DMA_CLOCK, \
281-
.trigger_select = SPI5_TX_DMA_TRIG_SELECT, \
282-
.trigger_event = EVT_SRC_SPI5_SPTI, \
283-
.flag = SPI5_TX_DMA_TRANS_FLAG, \
284-
.irq_config = \
285-
{ \
286-
.irq_num = SPI5_TX_DMA_IRQn, \
287-
.irq_prio = SPI5_TX_DMA_INT_PRIO, \
288-
.int_src = SPI5_TX_DMA_INT_SRC, \
289-
} \
290-
}
291-
#endif /* SPI5_TX_DMA_CONFIG */
292-
#endif /* BSP_SPI5_TX_USING_DMA */
293-
294-
#ifdef BSP_SPI5_RX_USING_DMA
295-
#ifndef SPI5_RX_DMA_CONFIG
296-
#define SPI5_RX_DMA_CONFIG \
297-
{ \
298-
.Instance = SPI5_RX_DMA_INSTANCE, \
299-
.channel = SPI5_RX_DMA_CHANNEL, \
300-
.clock = SPI5_RX_DMA_CLOCK, \
301-
.trigger_select = SPI5_RX_DMA_TRIG_SELECT, \
302-
.trigger_event = EVT_SRC_SPI5_SPRI, \
303-
.flag = SPI5_RX_DMA_TRANS_FLAG, \
304-
.irq_config = \
305-
{ \
306-
.irq_num = SPI5_RX_DMA_IRQn, \
307-
.irq_prio = SPI5_RX_DMA_INT_PRIO, \
308-
.int_src = SPI5_RX_DMA_INT_SRC, \
309-
} \
310-
}
311-
#endif /* SPI5_RX_DMA_CONFIG */
312-
#endif /* BSP_SPI5_RX_USING_DMA */
313-
314-
#ifdef BSP_USING_SPI6
315-
#ifndef SPI6_BUS_CONFIG
316-
#define SPI6_BUS_CONFIG \
317-
{ \
318-
.Instance = CM_SPI6, \
319-
.bus_name = "spi6", \
320-
.clock = FCG1_PERIPH_SPI6, \
321-
.timeout = 5000UL, \
322-
.err_irq.irq_config = \
323-
{ \
324-
.irq_num = BSP_SPI6_ERR_IRQ_NUM, \
325-
.irq_prio = BSP_SPI6_ERR_IRQ_PRIO, \
326-
.int_src = INT_SRC_SPI6_SPEI, \
327-
}, \
328-
}
329-
#endif /* SPI6_BUS_CONFIG */
330-
#endif /* BSP_USING_SPI6 */
331-
332-
#ifdef BSP_SPI6_TX_USING_DMA
333-
#ifndef SPI6_TX_DMA_CONFIG
334-
#define SPI6_TX_DMA_CONFIG \
335-
{ \
336-
.Instance = SPI6_TX_DMA_INSTANCE, \
337-
.channel = SPI6_TX_DMA_CHANNEL, \
338-
.clock = SPI6_TX_DMA_CLOCK, \
339-
.trigger_select = SPI6_TX_DMA_TRIG_SELECT, \
340-
.trigger_event = EVT_SRC_SPI6_SPTI, \
341-
.flag = SPI6_TX_DMA_TRANS_FLAG, \
342-
.irq_config = \
343-
{ \
344-
.irq_num = SPI6_TX_DMA_IRQn, \
345-
.irq_prio = SPI6_TX_DMA_INT_PRIO, \
346-
.int_src = SPI6_TX_DMA_INT_SRC, \
347-
} \
348-
}
349-
#endif /* SPI6_TX_DMA_CONFIG */
350-
#endif /* BSP_SPI6_TX_USING_DMA */
351-
352-
#ifdef BSP_SPI6_RX_USING_DMA
353-
#ifndef SPI6_RX_DMA_CONFIG
354-
#define SPI6_RX_DMA_CONFIG \
355-
{ \
356-
.Instance = SPI6_RX_DMA_INSTANCE, \
357-
.channel = SPI6_RX_DMA_CHANNEL, \
358-
.clock = SPI6_RX_DMA_CLOCK, \
359-
.trigger_select = SPI6_RX_DMA_TRIG_SELECT, \
360-
.trigger_event = EVT_SRC_SPI6_SPRI, \
361-
.flag = SPI6_RX_DMA_TRANS_FLAG, \
362-
.irq_config = \
363-
{ \
364-
.irq_num = SPI6_RX_DMA_IRQn, \
365-
.irq_prio = SPI6_RX_DMA_INT_PRIO, \
366-
.int_src = SPI6_RX_DMA_INT_SRC, \
367-
} \
368-
}
369-
#endif /* SPI6_RX_DMA_CONFIG */
370-
#endif /* BSP_SPI6_RX_USING_DMA */
371-
372-
373198
#ifdef __cplusplus
374199
}
375200
#endif

‎bsp/hc32/ev_hc32f448_lqfp80/board/drv_config.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -24,7 +24,7 @@ extern "C" {
2424
#include "adc_config.h"
2525
#include "dac_config.h"
2626
#include "gpio_config.h"
27-
#include "can_config.h"
27+
#include "mcan_config.h"
2828
#include "pm_config.h"
2929
#include "i2c_config.h"
3030
#include "qspi_config.h"

‎bsp/hc32/ev_hc32f460_lqfp100_v2/board/board.h‎

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -20,7 +20,8 @@ extern "C" {
2020
#endif
2121

2222

23-
#define HC32_FLASH_SIZE_GRANULARITY (8 * 1024)
23+
#define HC32_FLASH_ERASE_GRANULARITY (8 * 1024)
24+
#define HC32_FLASH_WRITE_GRANULARITY (4)
2425
#define HC32_FLASH_SIZE (512 * 1024)
2526
#define HC32_FLASH_START_ADDRESS (0)
2627
#define HC32_FLASH_END_ADDRESS (HC32_FLASH_START_ADDRESS + HC32_FLASH_SIZE)

‎bsp/hc32/ev_hc32f472_lqfp100/board/board.h‎

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -21,7 +21,8 @@ extern "C" {
2121
#endif
2222

2323

24-
#define HC32_FLASH_SIZE_GRANULARITY (8 * 1024)
24+
#define HC32_FLASH_ERASE_GRANULARITY (8 * 1024)
25+
#define HC32_FLASH_WRITE_GRANULARITY (4)
2526
#define HC32_FLASH_SIZE (512 * 1024)
2627
#define HC32_FLASH_START_ADDRESS (0)
2728
#define HC32_FLASH_END_ADDRESS (HC32_FLASH_START_ADDRESS + HC32_FLASH_SIZE)

‎bsp/hc32/ev_hc32f472_lqfp100/board/config/can_config.h‎

Lines changed: 0 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -20,9 +20,6 @@ extern "C" {
2020

2121
#ifdef BSP_USING_CAN1
2222
#define CAN1_CLOCK_SEL (CAN_CLOCK_SRC_40M)
23-
#ifdef RT_CAN_USING_CANFD
24-
#define CAN1_CANFD_MODE (CAN_FD_MD_ISO)
25-
#endif
2623
#define CAN1_NAME ("can1")
2724
#ifndef CAN1_INIT_PARAMS
2825
#define CAN1_INIT_PARAMS \
@@ -35,9 +32,6 @@ extern "C" {
3532

3633
#ifdef BSP_USING_CAN2
3734
#define CAN2_CLOCK_SEL (CAN_CLOCK_SRC_40M)
38-
#ifdef RT_CAN_USING_CANFD
39-
#define CAN2_CANFD_MODE (CAN_FD_MD_ISO)
40-
#endif
4135
#define CAN2_NAME ("can2")
4236
#ifndef CAN2_INIT_PARAMS
4337
#define CAN2_INIT_PARAMS \
@@ -50,9 +44,6 @@ extern "C" {
5044

5145
#ifdef BSP_USING_CAN3
5246
#define CAN3_CLOCK_SEL (CAN_CLOCK_SRC_40M)
53-
#ifdef RT_CAN_USING_CANFD
54-
#define CAN3_CANFD_MODE (CAN_FD_MD_ISO)
55-
#endif
5647
#define CAN3_NAME ("can3")
5748
#ifndef CAN3_INIT_PARAMS
5849
#define CAN3_INIT_PARAMS \

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