bsp:ls2k:improved implement of shutdown and reboot command

Author: Michael0066

bsp/ls2kdev/applications/pmcon.c

@@ -16,6 +16,8 @@
 #include "exception.h"
 #include "drv_uart.h"
 #include "board.h"
+#include "ls2k1000.h"
+
 /**
  * this function will reset CPU
  *
@@ -28,6 +30,8 @@ void rt_hw_cpu_reset(void)
     rt_kprintf("reboot system...\n");
     while (1);
 }
+MSH_CMD_EXPORT_ALIAS(rt_hw_cpu_reset, reboot, reset cpu);
+
 
 /**
  * this function will shutdown CPU
@@ -41,6 +45,7 @@ void rt_hw_cpu_shutdown(void)
 
     while (1);
 }
+MSH_CMD_EXPORT_ALIAS(rt_hw_cpu_shutdown, poweroff, shutdown cpu);
 
 
 /**

bsp/ls2kdev/drivers/board.c

@@ -12,37 +12,13 @@
 #define BOARD_H__
 
 #include <stdint.h>
-#include <rthw.h>
-#include "ls2k1000.h"
 
 extern unsigned char __bss_end;
 
 #define CPU_HZ              (1000 * 1000 * 1000) //QEMU 200*1000*1000
 #define RT_HW_HEAP_BEGIN    (void*)&__bss_end
 #define RT_HW_HEAP_END      (void*)(RT_HW_HEAP_BEGIN + 64 * 1024 * 1024)
 
-/*
- * General PM Configuration Register
- */
-#define PMCON_BASE          (APB_BASE | (0x7 << 12))
-
-/*
- * Power Management1 Configuration Registers
- */
-#define PM1_BASE            (PMCON_BASE + 0x0C)
-#define PM1_STS             HWREG32(PM1_BASE)
-#define PM1_EN              HWREG32(PM1_BASE + 0x04)
-#define PM1_CNT             HWREG32(PM1_BASE + 0x08)
-	
-/*
- * Watch Dog Configuration Registers
- */
-#define WDT_BASE            (PMCON_BASE + 0x30)
-#define WDT_EN              HWREG32(WDT_BASE)
-#define WDT_SET             HWREG32(WDT_BASE + 0x04)
-#define WDT_TIMER           HWREG32(WDT_BASE + 0x08)
-
-
 void rt_hw_board_init(void);
 
 #endif

bsp/ls2kdev/drivers/board.h

@@ -3,6 +3,7 @@
 
 #include <mips.h>
 #include "interrupt.h"
+#include <rthw.h>
 
 #define APB_BASE         CKSEG1ADDR(0xbfe00000)
 
@@ -24,6 +25,28 @@
 
 #define GEN_CONFIG0_REG  (0xFFFFFFFFBfe10420)
 
+
+/*
+ * General PM Configuration Register
+ */
+#define PMCON_BASE          (APB_BASE | (0x7 << 12))
+
+/*
+ * Power Management1 Configuration Registers
+ */
+#define PM1_BASE            (PMCON_BASE + 0x0C)
+#define PM1_STS             HWREG32(PM1_BASE)
+#define PM1_EN              HWREG32(PM1_BASE + 0x04)
+#define PM1_CNT             HWREG32(PM1_BASE + 0x08)
+	
+/*
+ * Watch Dog Configuration Registers
+ */
+#define WDT_BASE            (PMCON_BASE + 0x30)
+#define WDT_EN              HWREG32(WDT_BASE)
+#define WDT_SET             HWREG32(WDT_BASE + 0x04)
+#define WDT_TIMER           HWREG32(WDT_BASE + 0x08)
+
 void rt_hw_timer_handler(void);
 void rt_hw_uart_init(void);