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BernardXiongBernardXiong
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Merge pull request #4046 from balanceTWK/riscv_fpu_k210_20201120
[libcpu/risc-v][K210] add FPU support
2 parents 9dc0bbb + 62654ea commit ad8d95b

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10 files changed

+237
-35
lines changed

10 files changed

+237
-35
lines changed

‎bsp/k210/.config‎

Lines changed: 28 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -70,6 +70,8 @@ CONFIG_RT_VER_NUM=0x40003
7070
CONFIG_ARCH_CPU_64BIT=y
7171
# CONFIG_RT_USING_CPU_FFS is not set
7272
CONFIG_ARCH_RISCV=y
73+
CONFIG_ARCH_RISCV_FPU=y
74+
CONFIG_ARCH_RISCV_FPU_S=y
7375
CONFIG_ARCH_RISCV64=y
7476
# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set
7577

@@ -150,8 +152,10 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
150152
# CONFIG_RT_USING_HWTIMER is not set
151153
# CONFIG_RT_USING_CPUTIME is not set
152154
# CONFIG_RT_USING_I2C is not set
155+
# CONFIG_RT_USING_PHY is not set
153156
CONFIG_RT_USING_PIN=y
154157
# CONFIG_RT_USING_ADC is not set
158+
# CONFIG_RT_USING_DAC is not set
155159
# CONFIG_RT_USING_PWM is not set
156160
# CONFIG_RT_USING_MTD_NOR is not set
157161
# CONFIG_RT_USING_MTD_NAND is not set
@@ -192,6 +196,7 @@ CONFIG_RT_USING_LIBC=y
192196
CONFIG_RT_USING_POSIX=y
193197
# CONFIG_RT_USING_POSIX_MMAP is not set
194198
# CONFIG_RT_USING_POSIX_TERMIOS is not set
199+
# CONFIG_RT_USING_POSIX_GETLINE is not set
195200
# CONFIG_RT_USING_POSIX_AIO is not set
196201
# CONFIG_RT_USING_MODULE is not set
197202

@@ -262,7 +267,9 @@ CONFIG_ULOG_BACKEND_USING_CONSOLE=y
262267
#
263268
# IoT - internet of things
264269
#
270+
# CONFIG_PKG_USING_LORAWAN_DRIVER is not set
265271
# CONFIG_PKG_USING_PAHOMQTT is not set
272+
# CONFIG_PKG_USING_UMQTT is not set
266273
# CONFIG_PKG_USING_WEBCLIENT is not set
267274
# CONFIG_PKG_USING_WEBNET is not set
268275
# CONFIG_PKG_USING_MONGOOSE is not set
@@ -308,7 +315,7 @@ CONFIG_ULOG_BACKEND_USING_CONSOLE=y
308315
# CONFIG_PKG_USING_GAGENT_CLOUD is not set
309316
# CONFIG_PKG_USING_ALI_IOTKIT is not set
310317
# CONFIG_PKG_USING_AZURE is not set
311-
# CONFIG_PKG_USING_TENCENT_IOTHUB is not set
318+
# CONFIG_PKG_USING_TENCENT_IOT_EXPLORER is not set
312319
# CONFIG_PKG_USING_JIOT-C-SDK is not set
313320
# CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set
314321
# CONFIG_PKG_USING_JOYLINK is not set
@@ -330,6 +337,9 @@ CONFIG_ULOG_BACKEND_USING_CONSOLE=y
330337
# CONFIG_PKG_USING_CAPNP is not set
331338
# CONFIG_PKG_USING_RT_CJSON_TOOLS is not set
332339
# CONFIG_PKG_USING_AGILE_TELNET is not set
340+
# CONFIG_PKG_USING_NMEALIB is not set
341+
# CONFIG_PKG_USING_AGILE_JSMN is not set
342+
# CONFIG_PKG_USING_PDULIB is not set
333343

334344
#
335345
# security packages
@@ -338,6 +348,7 @@ CONFIG_ULOG_BACKEND_USING_CONSOLE=y
338348
# CONFIG_PKG_USING_libsodium is not set
339349
# CONFIG_PKG_USING_TINYCRYPT is not set
340350
# CONFIG_PKG_USING_TFM is not set
351+
# CONFIG_PKG_USING_YD_CRYPTO is not set
341352

342353
#
343354
# language packages
@@ -372,7 +383,9 @@ CONFIG_ULOG_BACKEND_USING_CONSOLE=y
372383
# CONFIG_PKG_USING_CHINESE_FONT_LIBRARY is not set
373384
# CONFIG_PKG_USING_LUNAR_CALENDAR is not set
374385
# CONFIG_PKG_USING_BS8116A is not set
386+
# CONFIG_PKG_USING_GPS_RMC is not set
375387
# CONFIG_PKG_USING_URLENCODE is not set
388+
# CONFIG_PKG_USING_UMCN is not set
376389

377390
#
378391
# system packages
@@ -396,6 +409,10 @@ CONFIG_ULOG_BACKEND_USING_CONSOLE=y
396409
# CONFIG_PKG_USING_SYSWATCH is not set
397410
# CONFIG_PKG_USING_SYS_LOAD_MONITOR is not set
398411
# CONFIG_PKG_USING_PLCCORE is not set
412+
# CONFIG_PKG_USING_RAMDISK is not set
413+
# CONFIG_PKG_USING_MININI is not set
414+
# CONFIG_PKG_USING_QBOOT is not set
415+
# CONFIG_PKG_USING_UCOSIII_WRAPPER is not set
399416

400417
#
401418
# peripheral libraries and drivers
@@ -441,6 +458,7 @@ CONFIG_PKG_KENDRYTE_SDK_VERNUM=0x0055
441458
# CONFIG_PKG_USING_RPLIDAR is not set
442459
# CONFIG_PKG_USING_AS608 is not set
443460
# CONFIG_PKG_USING_RC522 is not set
461+
# CONFIG_PKG_USING_WS2812B is not set
444462
# CONFIG_PKG_USING_EMBARC_BSP is not set
445463
# CONFIG_PKG_USING_EXTERN_RTC_DRIVERS is not set
446464
# CONFIG_PKG_USING_MULTI_RTIMER is not set
@@ -450,6 +468,12 @@ CONFIG_PKG_KENDRYTE_SDK_VERNUM=0x0055
450468
# CONFIG_PKG_USING_PMS_SERIES is not set
451469
# CONFIG_PKG_USING_NUCLEI_SDK is not set
452470
# CONFIG_PKG_USING_CAN_YMODEM is not set
471+
# CONFIG_PKG_USING_LORA_RADIO_DRIVER is not set
472+
# CONFIG_PKG_USING_QLED is not set
473+
# CONFIG_PKG_USING_PAJ7620 is not set
474+
# CONFIG_PKG_USING_AGILE_CONSOLE is not set
475+
# CONFIG_PKG_USING_LD3320 is not set
476+
# CONFIG_PKG_USING_WK2124 is not set
453477

454478
#
455479
# miscellaneous packages
@@ -486,6 +510,9 @@ CONFIG_PKG_KENDRYTE_SDK_VERNUM=0x0055
486510
# CONFIG_PKG_USING_VT100 is not set
487511
# CONFIG_PKG_USING_ULAPACK is not set
488512
# CONFIG_PKG_USING_UKAL is not set
513+
# CONFIG_PKG_USING_CRCLIB is not set
514+
# CONFIG_PKG_USING_THREES is not set
515+
# CONFIG_PKG_USING_2048 is not set
489516
CONFIG_BOARD_K210_EVB=y
490517
CONFIG_BSP_USING_UART_HS=y
491518

‎bsp/k210/Kconfig‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -21,6 +21,7 @@ source "$PKGS_DIR/Kconfig"
2121
config BOARD_K210_EVB
2222
bool
2323
select ARCH_RISCV64
24+
select ARCH_RISCV_FPU_S
2425
select PKG_USING_KENDRYTE_SDK
2526
select RT_USING_COMPONENTS_INIT
2627
select RT_USING_USER_MAIN

‎bsp/k210/rtconfig.h‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -48,6 +48,8 @@
4848
#define RT_VER_NUM 0x40003
4949
#define ARCH_CPU_64BIT
5050
#define ARCH_RISCV
51+
#define ARCH_RISCV_FPU
52+
#define ARCH_RISCV_FPU_S
5153
#define ARCH_RISCV64
5254

5355
/* RT-Thread Components */

‎bsp/k210/rtconfig.py‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -38,7 +38,7 @@
3838
OBJDUMP = PREFIX + 'objdump'
3939
OBJCPY = PREFIX + 'objcopy'
4040

41-
DEVICE = ' -mcmodel=medany -march=rv64imafdc -mabi=lp64d'
41+
DEVICE = ' -mcmodel=medany -march=rv64imafc -mabi=lp64f -fsingle-precision-constant'
4242
CFLAGS = DEVICE + ' -fno-common -ffunction-sections -fdata-sections -fstrict-volatile-bitfields'
4343
AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp'
4444
LFLAGS = DEVICE + ' -nostartfiles -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,_start -T link.lds'

‎libcpu/Kconfig‎

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -106,6 +106,14 @@ config ARCH_RISCV
106106
config ARCH_RISCV_FPU
107107
bool
108108

109+
config ARCH_RISCV_FPU_S
110+
select ARCH_RISCV_FPU
111+
bool
112+
113+
config ARCH_RISCV_FPU_D
114+
select ARCH_RISCV_FPU
115+
bool
116+
109117
config ARCH_RISCV32
110118
select ARCH_RISCV
111119
bool

‎libcpu/risc-v/common/context_gcc.S‎

Lines changed: 77 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -7,6 +7,7 @@
77
* Date Author Notes
88
* 2018/10/28 Bernard The unify RISC-V porting implementation
99
* 2018/12/27 Jesven Add SMP support
10+
* 2020/11/20 BalanceTWK Add FPU support
1011
*/
1112

1213
#include "cpuport.h"
@@ -72,6 +73,43 @@ rt_hw_context_switch:
7273
* mstatus.mie -> sp(2)
7374
* x(i) -> sp(i-4)
7475
*/
76+
#ifdef ARCH_RISCV_FPU
77+
addi sp, sp, -32 * FREGBYTES
78+
79+
FSTORE f0, 0 * FREGBYTES(sp)
80+
FSTORE f1, 1 * FREGBYTES(sp)
81+
FSTORE f2, 2 * FREGBYTES(sp)
82+
FSTORE f3, 3 * FREGBYTES(sp)
83+
FSTORE f4, 4 * FREGBYTES(sp)
84+
FSTORE f5, 5 * FREGBYTES(sp)
85+
FSTORE f6, 6 * FREGBYTES(sp)
86+
FSTORE f7, 7 * FREGBYTES(sp)
87+
FSTORE f8, 8 * FREGBYTES(sp)
88+
FSTORE f9, 9 * FREGBYTES(sp)
89+
FSTORE f10, 10 * FREGBYTES(sp)
90+
FSTORE f11, 11 * FREGBYTES(sp)
91+
FSTORE f12, 12 * FREGBYTES(sp)
92+
FSTORE f13, 13 * FREGBYTES(sp)
93+
FSTORE f14, 14 * FREGBYTES(sp)
94+
FSTORE f15, 15 * FREGBYTES(sp)
95+
FSTORE f16, 16 * FREGBYTES(sp)
96+
FSTORE f17, 17 * FREGBYTES(sp)
97+
FSTORE f18, 18 * FREGBYTES(sp)
98+
FSTORE f19, 19 * FREGBYTES(sp)
99+
FSTORE f20, 20 * FREGBYTES(sp)
100+
FSTORE f21, 21 * FREGBYTES(sp)
101+
FSTORE f22, 22 * FREGBYTES(sp)
102+
FSTORE f23, 23 * FREGBYTES(sp)
103+
FSTORE f24, 24 * FREGBYTES(sp)
104+
FSTORE f25, 25 * FREGBYTES(sp)
105+
FSTORE f26, 26 * FREGBYTES(sp)
106+
FSTORE f27, 27 * FREGBYTES(sp)
107+
FSTORE f28, 28 * FREGBYTES(sp)
108+
FSTORE f29, 29 * FREGBYTES(sp)
109+
FSTORE f30, 30 * FREGBYTES(sp)
110+
FSTORE f31, 31 * FREGBYTES(sp)
111+
112+
#endif
75113
addi sp, sp, -32 * REGBYTES
76114
STORE sp, (a0)
77115

@@ -174,7 +212,7 @@ rt_hw_context_switch_exit:
174212

175213
LOAD x1, 1 * REGBYTES(sp)
176214

177-
li t0, 0x00001800
215+
li t0, 0x00007800
178216
csrw mstatus, t0
179217
LOAD a0, 2 * REGBYTES(sp)
180218
csrs mstatus, a0
@@ -209,4 +247,42 @@ rt_hw_context_switch_exit:
209247
LOAD x31, 31 * REGBYTES(sp)
210248

211249
addi sp, sp, 32 * REGBYTES
250+
251+
#ifdef ARCH_RISCV_FPU
252+
FLOAD f0, 0 * FREGBYTES(sp)
253+
FLOAD f1, 1 * FREGBYTES(sp)
254+
FLOAD f2, 2 * FREGBYTES(sp)
255+
FLOAD f3, 3 * FREGBYTES(sp)
256+
FLOAD f4, 4 * FREGBYTES(sp)
257+
FLOAD f5, 5 * FREGBYTES(sp)
258+
FLOAD f6, 6 * FREGBYTES(sp)
259+
FLOAD f7, 7 * FREGBYTES(sp)
260+
FLOAD f8, 8 * FREGBYTES(sp)
261+
FLOAD f9, 9 * FREGBYTES(sp)
262+
FLOAD f10, 10 * FREGBYTES(sp)
263+
FLOAD f11, 11 * FREGBYTES(sp)
264+
FLOAD f12, 12 * FREGBYTES(sp)
265+
FLOAD f13, 13 * FREGBYTES(sp)
266+
FLOAD f14, 14 * FREGBYTES(sp)
267+
FLOAD f15, 15 * FREGBYTES(sp)
268+
FLOAD f16, 16 * FREGBYTES(sp)
269+
FLOAD f17, 17 * FREGBYTES(sp)
270+
FLOAD f18, 18 * FREGBYTES(sp)
271+
FLOAD f19, 19 * FREGBYTES(sp)
272+
FLOAD f20, 20 * FREGBYTES(sp)
273+
FLOAD f21, 21 * FREGBYTES(sp)
274+
FLOAD f22, 22 * FREGBYTES(sp)
275+
FLOAD f23, 23 * FREGBYTES(sp)
276+
FLOAD f24, 24 * FREGBYTES(sp)
277+
FLOAD f25, 25 * FREGBYTES(sp)
278+
FLOAD f26, 26 * FREGBYTES(sp)
279+
FLOAD f27, 27 * FREGBYTES(sp)
280+
FLOAD f28, 28 * FREGBYTES(sp)
281+
FLOAD f29, 29 * FREGBYTES(sp)
282+
FLOAD f30, 30 * FREGBYTES(sp)
283+
FLOAD f31, 31 * FREGBYTES(sp)
284+
285+
addi sp, sp, 32 * FREGBYTES
286+
#endif
287+
212288
mret

‎libcpu/risc-v/common/cpuport.c‎

Lines changed: 35 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -6,6 +6,7 @@
66
* Change Logs:
77
* Date Author Notes
88
* 2018/10/28 Bernard The unify RISC-V porting code.
9+
* 2020/11/20 BalanceTWK Add FPU support
910
*/
1011

1112
#include <rthw.h>
@@ -53,6 +54,40 @@ struct rt_hw_stack_frame
5354
rt_ubase_t t4; /* x29 - t4 - temporary register 4 */
5455
rt_ubase_t t5; /* x30 - t5 - temporary register 5 */
5556
rt_ubase_t t6; /* x31 - t6 - temporary register 6 */
57+
#ifdef ARCH_RISCV_FPU
58+
rv_floatreg_t f0; /* f0 */
59+
rv_floatreg_t f1; /* f1 */
60+
rv_floatreg_t f2; /* f2 */
61+
rv_floatreg_t f3; /* f3 */
62+
rv_floatreg_t f4; /* f4 */
63+
rv_floatreg_t f5; /* f5 */
64+
rv_floatreg_t f6; /* f6 */
65+
rv_floatreg_t f7; /* f7 */
66+
rv_floatreg_t f8; /* f8 */
67+
rv_floatreg_t f9; /* f9 */
68+
rv_floatreg_t f10; /* f10 */
69+
rv_floatreg_t f11; /* f11 */
70+
rv_floatreg_t f12; /* f12 */
71+
rv_floatreg_t f13; /* f13 */
72+
rv_floatreg_t f14; /* f14 */
73+
rv_floatreg_t f15; /* f15 */
74+
rv_floatreg_t f16; /* f16 */
75+
rv_floatreg_t f17; /* f17 */
76+
rv_floatreg_t f18; /* f18 */
77+
rv_floatreg_t f19; /* f19 */
78+
rv_floatreg_t f20; /* f20 */
79+
rv_floatreg_t f21; /* f21 */
80+
rv_floatreg_t f22; /* f22 */
81+
rv_floatreg_t f23; /* f23 */
82+
rv_floatreg_t f24; /* f24 */
83+
rv_floatreg_t f25; /* f25 */
84+
rv_floatreg_t f26; /* f26 */
85+
rv_floatreg_t f27; /* f27 */
86+
rv_floatreg_t f28; /* f28 */
87+
rv_floatreg_t f29; /* f29 */
88+
rv_floatreg_t f30; /* f30 */
89+
rv_floatreg_t f31; /* f31 */
90+
#endif
5691
};
5792

5893
/**

‎libcpu/risc-v/common/cpuport.h‎

Lines changed: 16 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -6,6 +6,7 @@
66
* Change Logs:
77
* Date Author Notes
88
* 2018-10-03 Bernard The first version
9+
* 2020/11/20 BalanceTWK Add FPU support
910
*/
1011

1112
#ifndef CPUPORT_H__
@@ -24,4 +25,19 @@
2425
#define REGBYTES 4
2526
#endif
2627

28+
#ifdef ARCH_RISCV_FPU
29+
#ifdef ARCH_RISCV_FPU_D
30+
#define FSTORE fsd
31+
#define FLOAD fld
32+
#define FREGBYTES 8
33+
#define rv_floatreg_t rt_int64_t
34+
#endif
35+
#ifdef ARCH_RISCV_FPU_S
36+
#define FSTORE fsw
37+
#define FLOAD flw
38+
#define FREGBYTES 4
39+
#define rv_floatreg_t rt_int32_t
40+
#endif
41+
#endif
42+
2743
#endif

‎libcpu/risc-v/k210/interrupt_gcc.S‎

Lines changed: 37 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -15,6 +15,43 @@
1515
.align 2
1616
.global trap_entry
1717
trap_entry:
18+
#ifdef ARCH_RISCV_FPU
19+
addi sp, sp, -32 * FREGBYTES
20+
21+
FSTORE f0, 0 * FREGBYTES(sp)
22+
FSTORE f1, 1 * FREGBYTES(sp)
23+
FSTORE f2, 2 * FREGBYTES(sp)
24+
FSTORE f3, 3 * FREGBYTES(sp)
25+
FSTORE f4, 4 * FREGBYTES(sp)
26+
FSTORE f5, 5 * FREGBYTES(sp)
27+
FSTORE f6, 6 * FREGBYTES(sp)
28+
FSTORE f7, 7 * FREGBYTES(sp)
29+
FSTORE f8, 8 * FREGBYTES(sp)
30+
FSTORE f9, 9 * FREGBYTES(sp)
31+
FSTORE f10, 10 * FREGBYTES(sp)
32+
FSTORE f11, 11 * FREGBYTES(sp)
33+
FSTORE f12, 12 * FREGBYTES(sp)
34+
FSTORE f13, 13 * FREGBYTES(sp)
35+
FSTORE f14, 14 * FREGBYTES(sp)
36+
FSTORE f15, 15 * FREGBYTES(sp)
37+
FSTORE f16, 16 * FREGBYTES(sp)
38+
FSTORE f17, 17 * FREGBYTES(sp)
39+
FSTORE f18, 18 * FREGBYTES(sp)
40+
FSTORE f19, 19 * FREGBYTES(sp)
41+
FSTORE f20, 20 * FREGBYTES(sp)
42+
FSTORE f21, 21 * FREGBYTES(sp)
43+
FSTORE f22, 22 * FREGBYTES(sp)
44+
FSTORE f23, 23 * FREGBYTES(sp)
45+
FSTORE f24, 24 * FREGBYTES(sp)
46+
FSTORE f25, 25 * FREGBYTES(sp)
47+
FSTORE f26, 26 * FREGBYTES(sp)
48+
FSTORE f27, 27 * FREGBYTES(sp)
49+
FSTORE f28, 28 * FREGBYTES(sp)
50+
FSTORE f29, 29 * FREGBYTES(sp)
51+
FSTORE f30, 30 * FREGBYTES(sp)
52+
FSTORE f31, 31 * FREGBYTES(sp)
53+
54+
#endif
1855

1956
/* save thread context to thread stack */
2057
addi sp, sp, -32 * REGBYTES

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