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Commit af14cb8

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[bsp][wch][risc-v] 1. add yml file for ch32v307.
2. fix programs a word at chip flash timeout. 3. priority use of fast mode.
1 parent b42431f commit af14cb8

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3 files changed

+115
-3
lines changed

3 files changed

+115
-3
lines changed

bsp/wch/risc-v/Libraries/ch32_drivers/drv_flash.c

Lines changed: 49 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -20,12 +20,19 @@
2020
#include "fal.h"
2121
#endif
2222

23-
//#define DRV_DEBUG
23+
#define DRV_DEBUG
2424
#define LOG_TAG "drv.flash"
2525
#include <drv_log.h>
2626

2727
#define FLASH_PAGE_SIZE 4096
2828

29+
/* @note If there is no down-frequency processing, the timeout time needs to be modified */
30+
#ifdef ProgramTimeout
31+
#undef ProgramTimeout
32+
#define ProgramTimeout ((uint32_t)0x00010000)
33+
#endif
34+
35+
2936
/**
3037
* @brief Gets the page of a given address
3138
* @param Addr: Address of the FLASH Memory
@@ -95,6 +102,23 @@ int ch32_flash_write(rt_uint32_t addr, const rt_uint8_t *buf, size_t size)
95102
return -RT_EINVAL;
96103
}
97104

105+
if (((addr & 0x000000FF) == 0) && (size & 0xFFFFFF00)) {
106+
rt_uint32_t fast_size = (size & 0xFFFFFF00);
107+
108+
status = FLASH_ROM_WRITE(addr, (rt_uint32_t *)buf, fast_size);
109+
if (status != FLASH_COMPLETE) {
110+
LOG_E("FLASH ROM Write Fail\r\n");
111+
return -RT_ERROR;
112+
}
113+
114+
addr += fast_size;
115+
buf += fast_size;
116+
}
117+
if (addr == end_addr) {
118+
return size;
119+
}
120+
121+
FLASH_Access_Clock_Cfg(FLASH_Access_SYSTEM_HALF);
98122
FLASH_Unlock();
99123
FLASH_ClearFlag(FLASH_FLAG_BSY | FLASH_FLAG_EOP | FLASH_FLAG_WRPRTERR);
100124

@@ -119,6 +143,7 @@ int ch32_flash_write(rt_uint32_t addr, const rt_uint8_t *buf, size_t size)
119143
}
120144

121145
FLASH_Lock();
146+
FLASH_Access_Clock_Cfg(FLASH_Access_SYSTEM);
122147

123148
if (result != RT_EOK)
124149
{
@@ -144,16 +169,36 @@ int ch32_flash_erase(rt_uint32_t addr, size_t size)
144169
FLASH_Status status = 0;
145170
uint32_t num_page = 0;
146171
uint32_t i = 0;
172+
rt_uint32_t total_size = size;
147173

148174
if ((addr + size) > CH32_FLASH_END_ADDRESS)
149175
{
150176
LOG_E("ERROR: erase outrange flash size! addr is (0x%p)\n", (void *)(addr + size));
151177
return -RT_EINVAL;
152178
}
153179

180+
if (((addr & 0x000000FF) == 0) && (total_size & 0xFFFFFF00)) {
181+
rt_uint32_t fast_size = (total_size & 0xFFFFFF00);
182+
183+
status = FLASH_ROM_ERASE(addr, fast_size);
184+
if (status != FLASH_COMPLETE) {
185+
LOG_E("FLASH ROM Erase Fail\r\n");
186+
return -RT_ERROR;
187+
}
188+
189+
addr += fast_size;
190+
total_size -= fast_size;
191+
}
192+
193+
if (0 == total_size) {
194+
return size;
195+
}
196+
197+
FLASH_Access_Clock_Cfg(FLASH_Access_SYSTEM_HALF);
154198
FLASH_Unlock();
199+
FLASH_ClearFlag(FLASH_FLAG_BSY | FLASH_FLAG_EOP | FLASH_FLAG_WRPRTERR);
155200

156-
num_page = (size + FLASH_PAGE_SIZE - 1) / FLASH_PAGE_SIZE;
201+
num_page = (total_size + FLASH_PAGE_SIZE - 1) / FLASH_PAGE_SIZE;
157202

158203
FLASH_ClearFlag(FLASH_FLAG_BSY | FLASH_FLAG_EOP | FLASH_FLAG_WRPRTERR);
159204

@@ -171,10 +216,11 @@ int ch32_flash_erase(rt_uint32_t addr, size_t size)
171216

172217
__exit:
173218
FLASH_Lock();
219+
FLASH_Access_Clock_Cfg(FLASH_Access_SYSTEM);
174220

175221
if (result != RT_EOK)
176222
{
177-
return result;
223+
return -RT_ERROR;
178224
}
179225

180226
return size;
Lines changed: 33 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,33 @@
1+
devices.gpio:
2+
kconfig:
3+
- CONFIG_BSP_USING_GPIO=y
4+
devices.adc:
5+
kconfig:
6+
- CONFIG_BSP_USING_ADC=y
7+
- CONFIG_BSP_USING_ADC1=y
8+
- CONFIG_BSP_USING_ADC2=n
9+
devices.dac:
10+
kconfig:
11+
- CONFIG_BSP_USING_DAC=y
12+
- CONFIG_BSP_USING_DAC_CHANNEL1=y
13+
- CONFIG_BSP_USING_DAC_CHANNEL2=n
14+
devices.i2c:
15+
kconfig:
16+
- CONFIG_BSP_USING_SOFT_I2C=y
17+
- CONFIG_BSP_USING_I2C1=y
18+
- CONFIG_BSP_USING_I2C2=y
19+
devices.spi:
20+
kconfig:
21+
- CONFIG_BSP_USING_SPI=y
22+
- CONFIG_BSP_USING_SPI1=n
23+
- CONFIG_BSP_USING_SPI2=n
24+
- CONFIG_BSP_USING_SPI3=y
25+
devices.uart:
26+
kconfig:
27+
- CONFIG_BSP_USING_UART=y
28+
devices.watchdog:
29+
kconfig:
30+
- CONFIG_BSP_USING_IWDT=y
31+
devices.flash:
32+
kconfig:
33+
- CONFIG_BSP_USING_ON_CHIP_FLASH=y
Lines changed: 33 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,33 @@
1+
devices.gpio:
2+
kconfig:
3+
- CONFIG_BSP_USING_GPIO=y
4+
devices.adc:
5+
kconfig:
6+
- CONFIG_BSP_USING_ADC=y
7+
- CONFIG_BSP_USING_ADC1=y
8+
- CONFIG_BSP_USING_ADC2=n
9+
devices.dac:
10+
kconfig:
11+
- CONFIG_BSP_USING_DAC=y
12+
- CONFIG_BSP_USING_DAC_CHANNEL1=y
13+
- CONFIG_BSP_USING_DAC_CHANNEL2=n
14+
devices.i2c:
15+
kconfig:
16+
- CONFIG_BSP_USING_SOFT_I2C=y
17+
- CONFIG_BSP_USING_I2C1=y
18+
- CONFIG_BSP_USING_I2C2=y
19+
devices.spi:
20+
kconfig:
21+
- CONFIG_BSP_USING_SPI=y
22+
- CONFIG_BSP_USING_SPI1=n
23+
- CONFIG_BSP_USING_SPI2=n
24+
- CONFIG_BSP_USING_SPI3=y
25+
devices.uart:
26+
kconfig:
27+
- CONFIG_BSP_USING_UART=y
28+
devices.watchdog:
29+
kconfig:
30+
- CONFIG_BSP_USING_IWDT=y
31+
devices.flash:
32+
kconfig:
33+
- CONFIG_BSP_USING_ON_CHIP_FLASH=y

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