[bsp][stm32][artpi]:fix artpi nano (#10122)

CYFS3 · web-flow · commit b0e7cba9fddd · 2025-03-18T22:55:13.000+08:00
diff --git a/bsp/stm32/stm32h750-artpi/.ci/attachconfig/ci.attachconfig.yml b/bsp/stm32/stm32h750-artpi/.ci/attachconfig/ci.attachconfig.yml
@@ -1,7 +1,12 @@
 scons.args: &scons
     scons_arg:
       - '--strict'
-
+# ------ nano CI ------
+nano:
+    <<: *scons
+    kconfig:
+      - CONFIG_RT_USING_NANO=y
+      
 # ------ peripheral CI ------
 peripheral.eth:
     kconfig:
diff --git a/bsp/stm32/stm32h750-artpi/applications/main.c b/bsp/stm32/stm32h750-artpi/applications/main.c
@@ -9,7 +9,6 @@
  */
 
 #include <rtthread.h>
-#include <rtdevice.h>
 #include <board.h>
 
 /* defined the LED0 pin: PI8 */
diff --git a/libcpu/arm/cortex-m7/cpu_cache.c b/libcpu/arm/cortex-m7/cpu_cache.c
@@ -76,15 +76,15 @@ void rt_hw_cpu_dcache_ops(int ops, void* addr, int size)
 
     if ((ops & clean_invalid) == clean_invalid)
     {
-        SCB_CleanInvalidateDCache_by_Addr((rt_uint32_t *)startAddr, size_byte);
+        SCB_CleanInvalidateDCache_by_Addr((void *)startAddr, size_byte);
     }
     else if (ops & RT_HW_CACHE_FLUSH)
     {
-        SCB_CleanDCache_by_Addr((rt_uint32_t *)startAddr, size_byte);
+        SCB_CleanDCache_by_Addr((void *)startAddr, size_byte);
     }
     else if (ops & RT_HW_CACHE_INVALIDATE)
     {
-        SCB_InvalidateDCache_by_Addr((rt_uint32_t *)startAddr, size_byte);
+        SCB_InvalidateDCache_by_Addr((void *)startAddr, size_byte);
     }
     else
     {

Original file line number	Diff line number	Diff line change
`@@ -76,15 +76,15 @@ void rt_hw_cpu_dcache_ops(int ops, void* addr, int size)`
`76`	`76`
`77`	`77`	`if ((ops & clean_invalid) == clean_invalid)`
`78`	`78`	`{`
`79`		`- SCB_CleanInvalidateDCache_by_Addr((rt_uint32_t *)startAddr, size_byte);`
	`79`	`+ SCB_CleanInvalidateDCache_by_Addr((void *)startAddr, size_byte);`
`80`	`80`	`}`
`81`	`81`	`else if (ops & RT_HW_CACHE_FLUSH)`
`82`	`82`	`{`
`83`		`- SCB_CleanDCache_by_Addr((rt_uint32_t *)startAddr, size_byte);`
	`83`	`+ SCB_CleanDCache_by_Addr((void *)startAddr, size_byte);`
`84`	`84`	`}`
`85`	`85`	`else if (ops & RT_HW_CACHE_INVALIDATE)`
`86`	`86`	`{`
`87`		`- SCB_InvalidateDCache_by_Addr((rt_uint32_t *)startAddr, size_byte);`
	`87`	`+ SCB_InvalidateDCache_by_Addr((void *)startAddr, size_byte);`
`88`	`88`	`}`
`89`	`89`	`else`
`90`	`90`	`{`