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Merge pull request #3255 from BernardXiong/bsp_x1000
[BSP] move libcpu/mips/x1000 to bsp/x1000/cpu
2 parents ea507e2 + a972fcc commit b1399d2

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bsp/x1000/SConstruct

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@@ -28,7 +28,7 @@ Export('RTT_ROOT')
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Export('rtconfig')
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# prepare building environment
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objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
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objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=True)
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if GetDepend('RT_USING_HARD_FLOAT'):
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env['CCFLAGS'] = env['CCFLAGS'].replace('-msoft-float', '-mhard-float')

bsp/x1000/cpu/SConscript

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# RT-Thread building script for bridge
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import os
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from building import *
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Import('rtconfig')
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cwd = GetCurrentDir()
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group = []
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list = os.listdir(cwd)
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# add common code files
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group = group + SConscript(os.path.join('common', 'SConscript'))
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# cpu porting code files
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group = group + SConscript(os.path.join(rtconfig.CPU, 'SConscript'))
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Return('group')
File renamed without changes.

bsp/x1000/cpu/common/asm.h

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/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 1995, 1996, 1997, 1999, 2001 by Ralf Baechle
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* Copyright (C) 1999 by Silicon Graphics, Inc.
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* Copyright (C) 2001 MIPS Technologies, Inc.
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* Copyright (C) 2002 Maciej W. Rozycki
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*
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* Some useful macros for MIPS assembler code
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*
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* Some of the routines below contain useless nops that will be optimized
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* away by gas in -O mode. These nops are however required to fill delay
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* slots in noreorder mode.
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*/
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#ifndef __ASM_H__
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#define __ASM_H__
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/*
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* LEAF - declare leaf routine
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*/
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#define LEAF(symbol) \
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.globl symbol; \
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.align 2; \
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.type symbol,@function; \
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.ent symbol,0; \
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symbol: .frame sp,0,ra
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/*
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* NESTED - declare nested routine entry point
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*/
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#define NESTED(symbol, framesize, rpc) \
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.globl symbol; \
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.align 2; \
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.type symbol,@function; \
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.ent symbol,0; \
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symbol: .frame sp, framesize, rpc
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/*
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* END - mark end of function
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*/
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#define END(function) \
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.end function; \
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.size function,.-function
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/*
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* EXPORT - export definition of symbol
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*/
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#define EXPORT(symbol) \
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.globl symbol; \
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symbol:
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/*
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* FEXPORT - export definition of a function symbol
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*/
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#define FEXPORT(symbol) \
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.globl symbol; \
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.type symbol,@function; \
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symbol:
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/*
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* Global data declaration with size.
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*/
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#define EXPORTS(name,sz) \
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.globl name; \
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.type name,@object; \
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.size name,sz; \
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name:
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/*
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* Weak data declaration with size.
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*/
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#define WEXPORT(name,sz) \
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.weakext name; \
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.type name,@object; \
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.size name,sz; \
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name:
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/*
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* Global data reference with size.
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*/
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#define IMPORT(name, size) \
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.extern name,size
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/*
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* Global zeroed data.
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*/
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#define BSS(name,size) \
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.type name,@object; \
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.comm name,size
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/*
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* Local zeroed data.
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*/
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#define LBSS(name,size) \
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.lcomm name,size
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/*
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* ABS - export absolute symbol
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*/
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#define ABS(symbol,value) \
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.globl symbol; \
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symbol = value
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#define TEXT(msg) \
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.pushsection .data; \
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8: .asciiz msg; \
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.popsection;
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#define ENTRY(name) \
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.globl name; \
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.align 2; \
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.ent name,0; \
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name##:
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/*
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* Macros to handle different pointer/register sizes for 32/64-bit code
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*/
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/*
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* Size of a register
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*/
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#define SZREG 4
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/*
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* Use the following macros in assemblercode to load/store registers,
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* pointers etc.
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*/
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#define REG_S sw
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#define REG_L lw
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#define REG_SUBU subu
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#define REG_ADDU addu
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/*
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* How to add/sub/load/store/shift C int variables.
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*/
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#define INT_ADD add
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#define INT_ADDU addu
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#define INT_ADDI addi
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#define INT_ADDIU addiu
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#define INT_SUB sub
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#define INT_SUBU subu
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#define INT_L lw
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#define INT_S sw
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#define INT_SLL sll
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#define INT_SLLV sllv
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#define INT_SRL srl
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#define INT_SRLV srlv
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#define INT_SRA sra
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#define INT_SRAV srav
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/*
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* How to add/sub/load/store/shift C long variables.
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*/
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#define LONG_ADD add
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#define LONG_ADDU addu
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#define LONG_ADDI addi
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#define LONG_ADDIU addiu
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#define LONG_SUB sub
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#define LONG_SUBU subu
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#define LONG_L lw
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#define LONG_S sw
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#define LONG_SLL sll
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#define LONG_SLLV sllv
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#define LONG_SRL srl
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#define LONG_SRLV srlv
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#define LONG_SRA sra
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#define LONG_SRAV srav
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#define LONG .word
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#define LONGSIZE 4
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#define LONGMASK 3
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#define LONGLOG 2
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/*
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* How to add/sub/load/store/shift pointers.
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*/
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#define PTR_ADD add
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#define PTR_ADDU addu
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#define PTR_ADDI addi
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#define PTR_ADDIU addiu
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#define PTR_SUB sub
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#define PTR_SUBU subu
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#define PTR_L lw
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#define PTR_S sw
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#define PTR_LA la
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#define PTR_SLL sll
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#define PTR_SLLV sllv
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#define PTR_SRL srl
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#define PTR_SRLV srlv
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#define PTR_SRA sra
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#define PTR_SRAV srav
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#define PTR_SCALESHIFT 2
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#define PTR .word
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#define PTRSIZE 4
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#define PTRLOG 2
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/*
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* Some cp0 registers were extended to 64bit for MIPS III.
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*/
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#define MFC0 mfc0
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#define MTC0 mtc0
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#define SSNOP sll zero, zero, 1
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#endif /* end of __ASM_H__ */

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