[DM/PIC] Support AMP mode

Only support on >= ARM GICv2

Signed-off-by: GuEe-GUI <[email protected]>

Author: GuEe-GUI

components/drivers/pic/pic-gicv2.c

@@ -83,6 +83,11 @@ static void gicv2_dist_init(struct gicv2 *gic)
 
     LOG_D("Max irq = %d", gic->max_irq);
 
+    if (gic->skip_init)
+    {
+        return;
+    }
+
     HWREG32(base + GIC_DIST_CTRL) = GICD_DISABLE;
 
     /* Set all global (unused) interrupts to this CPU only. */
@@ -620,6 +625,8 @@ static rt_err_t gicv2_ofw_init(struct rt_ofw_node *np, const struct rt_ofw_node_
             break;
         }
 
+        gic->skip_init = rt_ofw_prop_read_bool(np, "skip-init");
+
         gic_common_init_quirk_ofw(np, _gicv2_quirks, gic);
         gicv2_init(gic);
 

components/drivers/pic/pic-gicv2.h

@@ -78,6 +78,8 @@ struct gicv2
     rt_size_t hyp_size;
     void *vcpu_base;
     rt_size_t vcpu_size;
+
+    rt_bool_t skip_init;
 };
 
 #endif /* __IRQ_GICV2_H__ */

components/drivers/pic/pic-gicv3.c

@@ -216,6 +216,11 @@ static void gicv3_dist_init(void)
     LOG_D("%d SPIs implemented", _gic.line_nr - 32);
     LOG_D("%d Extended SPIs implemented", _gic.espi_nr);
 
+    if (_gic.skip_init)
+    {
+        goto _get_max_irq;
+    }
+
     /* Disable the distributor */
     HWREG32(base + GICD_CTLR) = 0;
     gicv3_dist_wait_for_rwp();
@@ -266,6 +271,7 @@ static void gicv3_dist_init(void)
         HWREG64(base + GICD_IROUTERnE + i * 8) = affinity;
     }
 
+_get_max_irq:
     if (GICD_TYPER_NUM_LPIS(_gic.gicd_typer) > 1)
     {
         /* Max LPI = 8192 + Math.pow(2, num_LPIs + 1) - 1 */
@@ -1063,6 +1069,7 @@ static rt_err_t gicv3_ofw_init(struct rt_ofw_node *np, const struct rt_ofw_node_
             redist_stride = 0;
         }
         _gic.redist_stride = redist_stride;
+        _gic.skip_init = rt_ofw_prop_read_bool(np, "skip-init");
 
         gic_common_init_quirk_ofw(np, _gicv3_quirks, &_gic.parent);
         gicv3_init();

components/drivers/pic/pic-gicv3.h

@@ -385,6 +385,8 @@ struct gicv3
     rt_uint64_t redist_flags;
     rt_size_t redist_stride;
     rt_size_t redist_regions_nr;
+
+    rt_bool_t skip_init;
 };
 
 #endif /* __PIC_GICV3_H__ */