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tomjieliitomjielii
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[bsp][renesas] add EK-RA2E2 (i2c/spi/adc/pwm/flash/gpio interrupt) support
1 parent 98307ae commit be44cd9

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18 files changed

+301
-31
lines changed

18 files changed

+301
-31
lines changed

‎.github/ALL_BSP_COMPILE.json‎

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@@ -263,6 +263,7 @@
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"renesas/rzn2l_rsk",
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"renesas/rzn2l_etherkit",
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"renesas/ra2a1-ek",
266+
"renesas/ra2e2-ek",
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"frdm-k64f",
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"xplorer4330/M4"
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]

‎bsp/renesas/libraries/HAL_Drivers/drivers/config/drv_config.h‎

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@@ -87,6 +87,15 @@ extern "C"
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#ifdef SOC_SERIES_R7FA2E2
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#include "ra2e2/uart_config.h"
90+
91+
#ifdef BSP_USING_PWM
92+
#include "ra2e2/pwm_config.h"
93+
#endif
94+
95+
#ifdef BSP_USING_ADC
96+
#include "ra2e2/adc_config.h"
97+
#endif
98+
9099
#endif /* SOC_SERIES_R7FA2E2 */
91100

92101
#ifdef SOC_SERIES_R7FA2L1

‎bsp/renesas/libraries/HAL_Drivers/drivers/config/ra2e2/adc_config.h‎

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Original file line numberDiff line numberDiff line change
@@ -0,0 +1,42 @@
1+
/*
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* Copyright (c) 2006-2025, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
7+
* Date Author Notes
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* 2025-08-17 CYFS first version
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*/
10+
11+
#ifndef __ADC_CONFIG_H__
12+
#define __ADC_CONFIG_H__
13+
14+
#include <rtthread.h>
15+
#include <rtdevice.h>
16+
#include "hal_data.h"
17+
#ifdef __cplusplus
18+
extern "C" {
19+
#endif
20+
21+
#if defined(BSP_USING_ADC0)
22+
23+
struct rt_adc_dev
24+
{
25+
struct rt_adc_ops ops;
26+
struct rt_adc_device adc_device;
27+
};
28+
29+
struct ra_adc_map
30+
{
31+
const char *device_name;
32+
const adc_cfg_t *g_cfg;
33+
const adc_ctrl_t *g_ctrl;
34+
const adc_channel_cfg_t *g_channel_cfg;
35+
};
36+
#endif
37+
#endif
38+
39+
#ifdef __cplusplus
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}
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#endif
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‎bsp/renesas/libraries/HAL_Drivers/drivers/config/ra2e2/pwm_config.h‎

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@@ -0,0 +1,56 @@
1+
/*
2+
* Copyright (c) 2006-2025, RT-Thread Development Team
3+
*
4+
* SPDX-License-Identifier: Apache-2.0
5+
*
6+
* Change Logs:
7+
* Date Author Notes
8+
* 2025-08-17 CYFS first version
9+
*/
10+
#ifndef __PWM_CONFIG_H__
11+
#define __PWM_CONFIG_H__
12+
13+
#include <rtthread.h>
14+
#include <drv_config.h>
15+
#include "hal_data.h"
16+
17+
#ifdef __cplusplus
18+
extern "C" {
19+
#endif
20+
21+
enum
22+
{
23+
#ifdef BSP_USING_PWM4
24+
BSP_PWM4_INDEX,
25+
#endif
26+
#ifdef BSP_USING_PWM5
27+
BSP_PWM5_INDEX,
28+
#endif
29+
#ifdef BSP_USING_PWM6
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BSP_PWM6_INDEX,
31+
#endif
32+
#ifdef BSP_USING_PWM7
33+
BSP_PWM7_INDEX,
34+
#endif
35+
#ifdef BSP_USING_PWM8
36+
BSP_PWM8_INDEX,
37+
#endif
38+
#ifdef BSP_USING_PWM9
39+
BSP_PWM9_INDEX,
40+
#endif
41+
BSP_PWMS_NUM
42+
};
43+
44+
#define PWM_DRV_INITIALIZER(num) \
45+
{ \
46+
.name = "pwm"#num , \
47+
.g_cfg = &g_timer##num##_cfg, \
48+
.g_ctrl = &g_timer##num##_ctrl, \
49+
.g_timer = &g_timer##num, \
50+
}
51+
52+
#ifdef __cplusplus
53+
}
54+
#endif
55+
56+
#endif /* __PWM_CONFIG_H__ */

‎bsp/renesas/libraries/HAL_Drivers/drivers/drv_flash.c‎

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Original file line numberDiff line numberDiff line change
@@ -228,7 +228,11 @@ bool calculate_block_num(int no, size_t addr, size_t size, void *erase_addr, voi
228228
level = rt_hw_interrupt_disable();
229229
R_FLASH_Reset(&g_flash_ctrl);
230230

231+
#if BSP_FEATURE_FLASH_HP_VERSION
231232
fal_block_iter(&_onchip_flash_hp0, &calculate_block_num, (void *)addr, (void *)size, &block_num);
233+
#else
234+
fal_block_iter(&_onchip_flash_lp, &calculate_block_num, (void *)addr, (void *)size, &block_num);
235+
#endif
232236

233237
/* Erase Block */
234238
#if BSP_FEATURE_FLASH_HP_VERSION
@@ -337,6 +341,11 @@ static int fal_flash_lp_erase(long offset, size_t size)
337341
return _flash_lp_erase(_onchip_flash_lp.addr + offset, size);
338342
}
339343

344+
void flash_callback(flash_callback_args_t * p_args)
345+
{
346+
347+
}
348+
340349
#endif
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342351
#endif

‎bsp/renesas/libraries/HAL_Drivers/drivers/drv_gpio.c‎

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Original file line numberDiff line numberDiff line change
@@ -26,7 +26,7 @@
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2727
static rt_base_t ra_pin_get_irqx(rt_uint32_t pin)
2828
{
29-
PIN2IRQX_TABLE(pin)
29+
PIN2IRQX_TABLE(pin);
3030
}
3131

3232
static struct rt_pin_irq_hdr pin_irq_hdr_tab[RA_IRQ_MAX] = {0};

‎bsp/renesas/libraries/HAL_Drivers/drivers/drv_i2c.c‎

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@@ -36,6 +36,14 @@
3636
#define RA_SCI_EVENT_ERROR BIT(3)
3737
#define RA_SCI_EVENT_ALL BITS(0,3)
3838

39+
#ifdef SOC_SERIES_R7FA2E2
40+
#define R_IIC_MASTER_Open R_IIC_B_MASTER_Open
41+
#define R_IIC_MASTER_Write R_IIC_B_MASTER_Write
42+
#define R_IIC_MASTER_Read R_IIC_B_MASTER_Read
43+
#define R_IIC_MASTER_SlaveAddressSet R_IIC_B_MASTER_SlaveAddressSet
44+
#define R_IIC_MASTER_CallbackSet R_IIC_B_MASTER_CallbackSet
45+
#endif
46+
3947
struct ra_i2c_handle
4048
{
4149
struct rt_i2c_bus_device bus;

‎bsp/renesas/libraries/HAL_Drivers/nano/drv_console.c‎

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@@ -14,7 +14,7 @@
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1515
#if defined(RT_USING_CONSOLE) && defined(RT_USING_SEMAPHORE)
1616

17-
static rt_sem_t console_sem = RT_NULL;
17+
struct rt_semaphore console_sem;
1818

1919
#if defined(RT_NANO_CONSOLE_UART0)
2020
#define renesas_uart_ctrl g_uart0_ctrl
@@ -60,8 +60,11 @@ static rt_sem_t console_sem = RT_NULL;
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6161
void rt_hw_console_init(void)
6262
{
63-
fsp_err_t err;
64-
console_sem = rt_sem_create("console", 0, RT_IPC_FLAG_FIFO);
63+
fsp_err_t err = FSP_SUCCESS;
64+
rt_err_t res = RT_EOK;
65+
66+
res = rt_sem_init(&console_sem, "console", 0, RT_IPC_FLAG_FIFO);
67+
RT_ASSERT(res == RT_EOK);
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6669
/* Initialize UART using FSP */
6770
#ifdef SOC_SERIES_R7FA8M85
@@ -78,12 +81,12 @@ void rt_hw_console_init(void)
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7982
void console_send_byte(uint8_t ch)
8083
{
84+
renesas_uart_ctrl.p_reg->TDR = ch;
8185
#if defined(SOC_SERIES_R7FA8M85) || defined(SOC_SERIES_R9A07G0)
8286
while ((renesas_uart_ctrl.p_reg->CSR_b.TEND) == 0);
8387
#else
8488
while ((renesas_uart_ctrl.p_reg->SSR_b.TEND) == 0);
8589
#endif
86-
renesas_uart_ctrl.p_reg->TDR = ch;
8790
}
8891

8992
void rt_hw_console_output(const char *str)
@@ -111,7 +114,7 @@ void renesas_uart_callback(uart_callback_args_t *p_args)
111114
/* Received a character or receive completed */
112115
case UART_EVENT_RX_CHAR:
113116
case UART_EVENT_RX_COMPLETE:
114-
rt_sem_release(console_sem);
117+
rt_sem_release(&console_sem);
115118
break;
116119

117120
default:
@@ -122,7 +125,7 @@ void renesas_uart_callback(uart_callback_args_t *p_args)
122125
char rt_hw_console_getchar(void)
123126
{
124127
int ch = -1;
125-
rt_sem_take(console_sem, RT_WAITING_FOREVER);
128+
rt_sem_take(&console_sem, RT_WAITING_FOREVER);
126129
#ifdef SOC_SERIES_R7FA8M85
127130
fsp_err_t ret = R_SCI_B_UART_Read(&renesas_uart_ctrl, (uint8_t *)&ch, 1);
128131
#else

‎bsp/renesas/libraries/Kconfig‎

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@@ -66,3 +66,37 @@ config SOC_SERIES_R7FA6E2
6666
select ARCH_ARM_CORTEX_M33
6767
select SOC_FAMILY_RENESAS_RA
6868
default n
69+
70+
config SOC_SERIES_R7FA2A1
71+
bool
72+
select ARCH_ARM_CORTEX_M23
73+
select SOC_FAMILY_RENESAS_RA
74+
default n
75+
76+
if RT_USING_NANO
77+
choice
78+
prompt "Choice nano console device(Renesas)"
79+
default RT_NANO_CONSOLE_UART0
80+
depends on RT_USING_CONSOLE
81+
config RT_NANO_CONSOLE_UART0
82+
bool "UART0"
83+
config RT_NANO_CONSOLE_UART1
84+
bool "UART1"
85+
config RT_NANO_CONSOLE_UART2
86+
bool "UART2"
87+
config RT_NANO_CONSOLE_UART3
88+
bool "UART3"
89+
config RT_NANO_CONSOLE_UART4
90+
bool "UART4"
91+
config RT_NANO_CONSOLE_UART5
92+
bool "UART5"
93+
config RT_NANO_CONSOLE_UART6
94+
bool "UART6"
95+
config RT_NANO_CONSOLE_UART7
96+
bool "UART7"
97+
config RT_NANO_CONSOLE_UART8
98+
bool "UART8"
99+
config RT_NANO_CONSOLE_UART9
100+
bool "UART9"
101+
endchoice
102+
endif

‎bsp/renesas/ra2e2-ek/.config‎

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@@ -107,7 +107,7 @@ CONFIG_SOC_R7FA2E2A7=y
107107
# end of rt_strnlen options
108108
# end of klibc options
109109

110-
CONFIG_RT_NAME_MAX=8
110+
CONFIG_RT_NAME_MAX=16
111111
# CONFIG_RT_USING_ARCH_DATA_TYPE is not set
112112
# CONFIG_RT_USING_NANO is not set
113113
# CONFIG_RT_USING_SMART is not set
@@ -146,7 +146,7 @@ CONFIG_RT_DEBUGING_CONTEXT=y
146146
#
147147
CONFIG_RT_USING_SEMAPHORE=y
148148
CONFIG_RT_USING_MUTEX=y
149-
# CONFIG_RT_USING_EVENT is not set
149+
CONFIG_RT_USING_EVENT=y
150150
# CONFIG_RT_USING_MAILBOX is not set
151151
# CONFIG_RT_USING_MESSAGEQUEUE is not set
152152
# CONFIG_RT_USING_SIGNALS is not set
@@ -1286,6 +1286,10 @@ CONFIG_BSP_USING_UART9=y
12861286
# CONFIG_BSP_UART9_TX_USING_DMA is not set
12871287
CONFIG_BSP_UART9_RX_BUFSIZE=256
12881288
CONFIG_BSP_UART9_TX_BUFSIZE=0
1289+
# CONFIG_BSP_USING_HW_I2C is not set
1290+
# CONFIG_BSP_USING_SPI is not set
1291+
# CONFIG_BSP_USING_PWM is not set
1292+
# CONFIG_BSP_USING_ADC is not set
12891293
# end of On-chip Peripheral Drivers
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12911295
#

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