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‎bsp/hc32f4a0/.config‎

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‎bsp/hc32f4a0/.gitignore‎

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*.pyc
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*.map
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*.dblite
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*.elf
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*.bin
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*.hex
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*.axf
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*.exe
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*.pdb
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*.idb
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*.ilk
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*.old
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build
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Debug
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documentation/html
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packages/
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*~
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*.o
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*.obj
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*.out
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*.bak
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*.dep
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*.lib
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*.i
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*.d
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.DS_Stor*
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.config 3
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.config 4
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.config 5
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Midea-X1
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*.uimg
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GPATH
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GRTAGS
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GTAGS
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.vscode
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JLinkLog.txt
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JLinkSettings.ini
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DebugConfig/
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RTE/
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settings/
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*.uvguix*
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cconfig.h

‎bsp/hc32f4a0/Kconfig‎

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mainmenu "RT-Thread Project Configuration"
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config BSP_DIR
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string
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option env="BSP_ROOT"
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default "."
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config RTT_DIR
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string
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option env="RTT_ROOT"
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default "../.."
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config PKGS_DIR
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string
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option env="PKGS_ROOT"
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default "packages"
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source "$RTT_DIR/Kconfig"
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source "$PKGS_DIR/Kconfig"
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source "board/Kconfig"
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‎bsp/hc32f4a0/Libraries/CMSIS/Device/HDSC/HC32F4A0/Include/ddl_config.h‎

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/**
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*******************************************************************************
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* @file adc/adc_01_base/source/ddl_config.h
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* @brief This file contains HC32 Series Device Driver Library usage management.
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@verbatim
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Change Logs:
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Date Author Notes
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2020-06-12 Yangjp First version
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@endverbatim
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*******************************************************************************
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* Copyright (C) 2020, Huada Semiconductor Co., Ltd. All rights reserved.
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*
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* This software component is licensed by HDSC under BSD 3-Clause license
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* (the "License"); You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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*******************************************************************************
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*/
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#ifndef __DDL_CONFIG_H__
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#define __DDL_CONFIG_H__
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/*******************************************************************************
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* Include files
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******************************************************************************/
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/* C binding of definitions if building with C++ compiler */
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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/*******************************************************************************
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* Global type definitions ('typedef')
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******************************************************************************/
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/*******************************************************************************
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* Global pre-processor symbols/macros ('#define')
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******************************************************************************/
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/* Chip module on-off define */
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#define DDL_ON (1U)
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#define DDL_OFF (0U)
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/**
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* @brief This is the list of modules to be used in the Device Driver Library.
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* Select the modules you need to use to DDL_ON.
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* @note DDL_ICG_ENABLE must be turned on(DDL_ON) to ensure that the chip works
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* properly.
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* @note DDL_UTILITY_ENABLE must be turned on(DDL_ON) if using Device Driver
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* Library.
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* @note DDL_PRINT_ENABLE must be turned on(DDL_ON) if using printf function.
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*/
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#define DDL_ICG_ENABLE (DDL_ON)
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#define DDL_UTILITY_ENABLE (DDL_ON)
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#define DDL_PRINT_ENABLE (DDL_ON)
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#define DDL_ADC_ENABLE (DDL_ON)
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#define DDL_AES_ENABLE (DDL_ON)
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#define DDL_CAN_ENABLE (DDL_ON)
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#define DDL_CLK_ENABLE (DDL_ON)
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#define DDL_CMP_ENABLE (DDL_ON)
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#define DDL_CRC_ENABLE (DDL_ON)
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#define DDL_CTC_ENABLE (DDL_ON)
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#define DDL_DAC_ENABLE (DDL_ON)
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#define DDL_DCU_ENABLE (DDL_ON)
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#define DDL_DMA_ENABLE (DDL_ON)
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#define DDL_DMC_ENABLE (DDL_ON)
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#define DDL_DVP_ENABLE (DDL_ON)
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#define DDL_EFM_ENABLE (DDL_ON)
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#define DDL_EMB_ENABLE (DDL_ON)
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#define DDL_ETH_ENABLE (DDL_ON)
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#define DDL_EVENT_PORT_ENABLE (DDL_OFF)
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#define DDL_FCM_ENABLE (DDL_ON)
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#define DDL_FMAC_ENABLE (DDL_ON)
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#define DDL_GPIO_ENABLE (DDL_ON)
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#define DDL_HASH_ENABLE (DDL_ON)
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#define DDL_HRPWM_ENABLE (DDL_ON)
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#define DDL_I2C_ENABLE (DDL_ON)
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#define DDL_I2S_ENABLE (DDL_ON)
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#define DDL_INTERRUPTS_ENABLE (DDL_ON)
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#define DDL_KEYSCAN_ENABLE (DDL_ON)
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#define DDL_MAU_ENABLE (DDL_ON)
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#define DDL_MPU_ENABLE (DDL_ON)
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#define DDL_NFC_ENABLE (DDL_ON)
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#define DDL_OTS_ENABLE (DDL_ON)
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#define DDL_PWC_ENABLE (DDL_ON)
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#define DDL_QSPI_ENABLE (DDL_ON)
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#define DDL_RMU_ENABLE (DDL_ON)
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#define DDL_RTC_ENABLE (DDL_ON)
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#define DDL_SDIOC_ENABLE (DDL_ON)
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#define DDL_SMC_ENABLE (DDL_ON)
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#define DDL_SPI_ENABLE (DDL_ON)
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#define DDL_SRAM_ENABLE (DDL_ON)
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#define DDL_SWDT_ENABLE (DDL_ON)
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#define DDL_TMR0_ENABLE (DDL_ON)
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#define DDL_TMR2_ENABLE (DDL_ON)
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#define DDL_TMR4_ENABLE (DDL_ON)
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#define DDL_TMR6_ENABLE (DDL_ON)
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#define DDL_TMRA_ENABLE (DDL_ON)
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#define DDL_TRNG_ENABLE (DDL_ON)
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#define DDL_USART_ENABLE (DDL_ON)
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#define DDL_USBFS_ENABLE (DDL_OFF)
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#define DDL_USBHS_ENABLE (DDL_OFF)
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#define DDL_WDT_ENABLE (DDL_ON)
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/* BSP on-off define */
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#define BSP_ON (1U)
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#define BSP_OFF (0U)
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/**
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* @brief The following is a list of currently supported BSP boards.
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*/
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#define BSP_EV_HC32F4A0_LQFP176 (1U)
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#define BSP_MS_HC32F4A0_LQFP176_050_MEM (2U)
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/**
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* @brief The macro BSP_EV_HC32F4A0 is used to specify the BSP board currently
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* in use.
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* The value should be set to one of the list of currently supported BSP boards.
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* @note If there is no supported BSP board or the BSP function is not used,
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* the value needs to be set to BSP_EV_HC32F4A0.
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*/
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#define BSP_EV_HC32F4A0 (BSP_EV_HC32F4A0)
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/**
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* @brief This is the list of BSP components to be used.
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* Select the components you need to use to BSP_ON.
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*/
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#define BSP_CY62167EV30LL_ENABLE (BSP_OFF)
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#define BSP_IS42S16400J7TLI_ENABLE (BSP_OFF)
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#define BSP_IS62WV51216_ENABLE (BSP_OFF)
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#define BSP_MT29F2G08AB_ENABLE (BSP_OFF)
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#define BSP_NT35510_ENABLE (BSP_OFF)
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#define BSP_OV5640_ENABLE (BSP_OFF)
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#define BSP_S29GL064N90TFI03_ENABLE (BSP_OFF)
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#define BSP_TCA9539_ENABLE (BSP_OFF)
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#define BSP_W25QXX_ENABLE (BSP_OFF)
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#define BSP_WM8731_ENABLE (BSP_OFF)
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/**
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* @brief Ethernet and PHY Configuration.
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* @note PHY delay these values are based on a 1 ms Systick interrupt.
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*/
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/* MAC ADDRESS */
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#define ETH_MAC_ADDR0 (2U)
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#define ETH_MAC_ADDR1 (0U)
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#define ETH_MAC_ADDR2 (0U)
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#define ETH_MAC_ADDR3 (0U)
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#define ETH_MAC_ADDR4 (0U)
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#define ETH_MAC_ADDR5 (0U)
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/* Ethernet driver buffers size and count */
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#define ETH_TXBUF_SIZE (ETH_PACKET_MAX_SIZE) /* Buffer size for receive */
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#define ETH_RXBUF_SIZE (ETH_PACKET_MAX_SIZE) /* Buffer size for transmit */
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#define ETH_TXBUF_NUMBER (4UL) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */
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#define ETH_RXBUF_NUMBER (4UL) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */
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/* PHY Address*/
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#define PHY_ADDRESS (0x00U) /* RTL8201F */
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/* PHY Configuration delay */
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#define PHY_HW_RESET_DELAY (0x0000003FUL)
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#define PHY_RESET_DELAY (0x0000007FUL)
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#define PHY_CONFIG_DELAY (0x0000003FUL)
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#define PHY_READ_TIMEOUT (0x00000005UL)
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#define PHY_WRITE_TIMEOUT (0x00000005UL)
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/* Common PHY Registers */
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#define PHY_BCR (0x00U) /*!< Basic Control Register */
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#define PHY_BSR (0x01U) /*!< Basic Status Register */
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#define PHY_SOFT_RESET (0x8000U) /*!< PHY Soft Reset */
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#define PHY_LOOPBACK (0x4000U) /*!< Select loop-back mode */
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#define PHY_FULLDUPLEX_100M (0x2100U) /*!< Set the full-duplex mode at 100 Mb/s */
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#define PHY_HALFDUPLEX_100M (0x2000U) /*!< Set the half-duplex mode at 100 Mb/s */
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#define PHY_FULLDUPLEX_10M (0x0100U) /*!< Set the full-duplex mode at 10 Mb/s */
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#define PHY_HALFDUPLEX_10M (0x0000U) /*!< Set the half-duplex mode at 10 Mb/s */
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#define PHY_AUTONEGOTIATION (0x1000U) /*!< Enable auto-negotiation function */
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#define PHY_POWERDOWN (0x0800U) /*!< Select the power down mode */
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#define PHY_ISOLATE (0x0400U) /*!< Isolate PHY from MII */
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#define PHY_RESTART_AUTONEGOTIATION (0x0200U) /*!< Restart auto-negotiation function */
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#define PHY_100BASE_TX_FD (0x4000U) /*!< 100Base-TX full duplex support */
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#define PHY_100BASE_TX_HD (0x2000U) /*!< 100Base-TX half duplex support */
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#define PHY_10BASE_T_FD (0x1000U) /*!< 10Base-T full duplex support */
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#define PHY_10BASE_T_HD (0x0800U) /*!< 10Base-T half duplex support */
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#define PHY_AUTONEGO_COMPLETE (0x0020U) /*!< Auto-Negotiation process completed */
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#define PHY_LINK_STATUS (0x0004U) /*!< Valid link established */
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#define PHY_JABBER_DETECTION (0x0002U) /*!< Jabber condition detected */
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/**
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* @brief External clock source for I2S peripheral
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*/
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#ifndef I2S_EXT_CLK_FREQ
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#define I2S_EXT_CLK_FREQ (12288000UL) /*!< Value of the external oscillator */
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#endif /* I2S_EXT_CLK_FREQ */
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/*******************************************************************************
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* Global variable definitions ('extern')
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******************************************************************************/
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/*******************************************************************************
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* Global function prototypes (definition in C source)
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******************************************************************************/
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#ifdef __cplusplus
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}
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#endif
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#endif /* __DDL_CONFIG_H__ */
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/*******************************************************************************
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* EOF (not truncated)
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******************************************************************************/

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