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supperthomassupperthomas
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[bsp/stm32f407-rt-spark/l496zg] add cherryusb support
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‎.gitignore‎

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@@ -43,6 +43,7 @@ ncscope.*
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tags
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.idea
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**/.cache/
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.vscode
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*.code-workspace
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*.eide.*

‎bsp/stm32/stm32f407-rt-spark/.ci/attachconfig/ci.attachconfig.yml‎

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@@ -1,6 +1,11 @@
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scons.args: &scons
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scons_arg:
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- '--strict'
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# ------ nano CI ------
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nano:
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<<: *scons
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kconfig:
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- CONFIG_RT_USING_NANO=y
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# ------ kernel CI ------
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kernel.klibc-stdlib:
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<<: *scons
@@ -182,8 +187,11 @@ peripheral.sram:
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peripheral.usb_mouse:
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kconfig:
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- CONFIG_BSP_USING_USB_MOUSE=y
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# ------ nano CI ------
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nano:
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<<: *scons
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kconfig:
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- CONFIG_RT_USING_NANO=y
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# ------ component CI ------
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component.cherryusb_cdc:
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kconfig:
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- CONFIG_RT_USING_CHERRYUSB=y
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- CONFIG_RT_CHERRYUSB_DEVICE=y
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- CONFIG_RT_CHERRYUSB_DEVICE_DWC2_ST=y
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- CONFIG_RT_CHERRYUSB_DEVICE_CDC_ACM=y
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- CONFIG_RT_CHERRYUSB_DEVICE_TEMPLATE_CDC_ACM=y

‎bsp/stm32/stm32f407-rt-spark/board/ports/cherryusb/SConscript‎

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from building import *
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import os
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cwd = GetCurrentDir()
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group = []
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src = Glob('*.c')
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CPPPATH = [cwd]
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list = os.listdir(cwd)
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for d in list:
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path = os.path.join(cwd, d)
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if os.path.isfile(os.path.join(path, 'SConscript')):
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group = group + SConscript(os.path.join(d, 'SConscript'))
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group = group + DefineGroup('cherryusb-port', src, depend = ['RT_CHERRYUSB_DEVICE'], CPPPATH = CPPPATH)
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Return('group')

‎bsp/stm32/stm32f407-rt-spark/board/ports/cherryusb/cherryusb.c‎

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/*
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* Copyright (c) 2025, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2025-01-17 Supperthomas first version
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*/
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#include <stm32f4xx.h>
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#include "rtthread.h"
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#include "drv_config.h"
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void usb_dc_low_level_init(uint8_t busid)
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{
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GPIO_InitTypeDef GPIO_InitStruct = {0};
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__HAL_RCC_GPIOA_CLK_ENABLE();
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/**USB_OTG_FS GPIO Configuration
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PA11 ------> USB_OTG_FS_DM
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PA12 ------> USB_OTG_FS_DP
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*/
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GPIO_InitStruct.Pin = GPIO_PIN_11|GPIO_PIN_12;
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GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
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GPIO_InitStruct.Alternate = GPIO_AF10_OTG_FS;
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HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
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/* Peripheral clock enable */
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__HAL_RCC_USB_OTG_FS_CLK_ENABLE();
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/* USB_OTG_FS interrupt Init */
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HAL_NVIC_SetPriority(OTG_FS_IRQn, 0, 0);
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HAL_NVIC_EnableIRQ(OTG_FS_IRQn);
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}
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void usb_dc_low_level_deinit(uint8_t busid)
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{
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/* Peripheral clock disable */
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__HAL_RCC_USB_OTG_FS_CLK_DISABLE();
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/**USB_OTG_FS GPIO Configuration
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PA11 ------> USB_OTG_FS_DM
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PA12 ------> USB_OTG_FS_DP
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*/
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HAL_GPIO_DeInit(GPIOA, GPIO_PIN_11|GPIO_PIN_12);
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/* USB_OTG_FS interrupt DeInit */
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HAL_NVIC_DisableIRQ(OTG_FS_IRQn);
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}
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#ifdef RT_CHERRYUSB_DEVICE_TEMPLATE_CDC_ACM
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/* Register the EMAC device */
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static int rt_hw_stm32_cherryusb_cdc_init(void)
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{
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extern void cdc_acm_init(uint8_t busid, uintptr_t reg_base);
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cdc_acm_init(0, USB_OTG_FS_PERIPH_BASE);
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return 0;
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}
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INIT_COMPONENT_EXPORT(rt_hw_stm32_cherryusb_cdc_init);
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static int cherry_usb_cdc_send(int argc, char **argv)
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{
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extern void cdc_acm_data_send_with_dtr_test(uint8_t busid);
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cdc_acm_data_send_with_dtr_test(0);
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return 0;
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}
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MSH_CMD_EXPORT(cherry_usb_cdc_send, send the cdc data for test)
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#endif
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#ifdef USBD_IRQ_HANDLER
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void USBD_IRQ_HANDLER(void)
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{
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extern void USBD_IRQHandler(uint8_t busid);
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USBD_IRQHandler(0);
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}
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#else
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#error USBD_IRQ_HANDLER need to USB IRQ like #define USBD_IRQ_HANDLER OTG_HS_IRQHandler
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#endif
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‎bsp/stm32/stm32f407-rt-spark/board/ports/cherryusb/usb_config.h‎

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/*
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* Copyright (c) 2025, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2025-01-17 Supperthomas first version
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*/
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#ifndef CHERRYUSB_CONFIG_H
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#define CHERRYUSB_CONFIG_H
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/* ================ USB common Configuration ================ */
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#define CONFIG_USB_PRINTF(...) printf(__VA_ARGS__)
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#ifndef CONFIG_USB_DBG_LEVEL
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#define CONFIG_USB_DBG_LEVEL USB_DBG_INFO
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#endif
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/* Enable print with color */
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#define CONFIG_USB_PRINTF_COLOR_ENABLE
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/* data align size when use dma */
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#ifndef CONFIG_USB_ALIGN_SIZE
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#define CONFIG_USB_ALIGN_SIZE 4
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#endif
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/* attribute data into no cache ram */
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#define USB_NOCACHE_RAM_SECTION __attribute__((section(".noncacheable")))
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/* ================= USB Device Stack Configuration ================ */
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/* Ep0 in and out transfer buffer */
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#ifndef CONFIG_USBDEV_REQUEST_BUFFER_LEN
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#define CONFIG_USBDEV_REQUEST_BUFFER_LEN 512
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#endif
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/* Setup packet log for debug */
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// #define CONFIG_USBDEV_SETUP_LOG_PRINT
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/* Check if the input descriptor is correct */
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// #define CONFIG_USBDEV_DESC_CHECK
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/* Enable test mode */
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// #define CONFIG_USBDEV_TEST_MODE
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#ifndef CONFIG_USBDEV_MSC_MAX_LUN
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#define CONFIG_USBDEV_MSC_MAX_LUN 1
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#endif
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#ifndef CONFIG_USBDEV_MSC_MAX_BUFSIZE
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#define CONFIG_USBDEV_MSC_MAX_BUFSIZE 512
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#endif
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#ifndef CONFIG_USBDEV_MSC_MANUFACTURER_STRING
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#define CONFIG_USBDEV_MSC_MANUFACTURER_STRING ""
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#endif
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#ifndef CONFIG_USBDEV_MSC_PRODUCT_STRING
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#define CONFIG_USBDEV_MSC_PRODUCT_STRING ""
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#endif
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#ifndef CONFIG_USBDEV_MSC_VERSION_STRING
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#define CONFIG_USBDEV_MSC_VERSION_STRING "0.01"
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#endif
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// #define CONFIG_USBDEV_MSC_THREAD
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#ifndef CONFIG_USBDEV_MSC_PRIO
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#define CONFIG_USBDEV_MSC_PRIO 4
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#endif
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#ifndef CONFIG_USBDEV_MSC_STACKSIZE
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#define CONFIG_USBDEV_MSC_STACKSIZE 2048
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#endif
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#ifndef CONFIG_USBDEV_RNDIS_RESP_BUFFER_SIZE
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#define CONFIG_USBDEV_RNDIS_RESP_BUFFER_SIZE 156
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#endif
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#ifndef CONFIG_USBDEV_RNDIS_ETH_MAX_FRAME_SIZE
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#define CONFIG_USBDEV_RNDIS_ETH_MAX_FRAME_SIZE 2048
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#endif
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#ifndef CONFIG_USBDEV_RNDIS_VENDOR_ID
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#define CONFIG_USBDEV_RNDIS_VENDOR_ID 0x0000ffff
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#endif
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#ifndef CONFIG_USBDEV_RNDIS_VENDOR_DESC
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#define CONFIG_USBDEV_RNDIS_VENDOR_DESC "CherryUSB"
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#endif
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#define CONFIG_USBDEV_RNDIS_USING_LWIP
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/* ================ USB HOST Stack Configuration ================== */
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#define CONFIG_USBHOST_MAX_RHPORTS 1
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#define CONFIG_USBHOST_MAX_EXTHUBS 1
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#define CONFIG_USBHOST_MAX_EHPORTS 4
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#define CONFIG_USBHOST_MAX_INTERFACES 8
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#define CONFIG_USBHOST_MAX_INTF_ALTSETTINGS 8
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#define CONFIG_USBHOST_MAX_ENDPOINTS 4
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#define CONFIG_USBHOST_MAX_CDC_ACM_CLASS 4
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#define CONFIG_USBHOST_MAX_HID_CLASS 4
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#define CONFIG_USBHOST_MAX_MSC_CLASS 2
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#define CONFIG_USBHOST_MAX_AUDIO_CLASS 1
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#define CONFIG_USBHOST_MAX_VIDEO_CLASS 1
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#define CONFIG_USBHOST_DEV_NAMELEN 16
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#ifndef CONFIG_USBHOST_PSC_PRIO
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#define CONFIG_USBHOST_PSC_PRIO 0
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#endif
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#ifndef CONFIG_USBHOST_PSC_STACKSIZE
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#define CONFIG_USBHOST_PSC_STACKSIZE 2048
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#endif
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//#define CONFIG_USBHOST_GET_STRING_DESC
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// #define CONFIG_USBHOST_MSOS_ENABLE
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#ifndef CONFIG_USBHOST_MSOS_VENDOR_CODE
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#define CONFIG_USBHOST_MSOS_VENDOR_CODE 0x00
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#endif
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/* Ep0 max transfer buffer */
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#ifndef CONFIG_USBHOST_REQUEST_BUFFER_LEN
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#define CONFIG_USBHOST_REQUEST_BUFFER_LEN 512
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#endif
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#ifndef CONFIG_USBHOST_CONTROL_TRANSFER_TIMEOUT
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#define CONFIG_USBHOST_CONTROL_TRANSFER_TIMEOUT 500
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#endif
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#ifndef CONFIG_USBHOST_MSC_TIMEOUT
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#define CONFIG_USBHOST_MSC_TIMEOUT 5000
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#endif
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/* This parameter affects usb performance, and depends on (TCP_WND)tcp eceive windows size,
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* you can change with 2K,4K,8K,16K,default is 2K to get one TCP_MSS
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*/
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#ifndef CONFIG_USBHOST_RNDIS_ETH_MAX_RX_SIZE
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#define CONFIG_USBHOST_RNDIS_ETH_MAX_RX_SIZE (2048)
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#endif
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#ifndef CONFIG_USBHOST_RNDIS_ETH_MAX_TX_SIZE
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#define CONFIG_USBHOST_RNDIS_ETH_MAX_TX_SIZE (2048)
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#endif
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/* This parameter affects usb performance, and depends on (TCP_WND)tcp eceive windows size,
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* you can change with 2K,4K,8K,16K,default is 2K to get one TCP_MSS
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*/
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#ifndef CONFIG_USBHOST_CDC_NCM_ETH_MAX_RX_SIZE
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#define CONFIG_USBHOST_CDC_NCM_ETH_MAX_RX_SIZE (2048)
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#endif
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#ifndef CONFIG_USBHOST_CDC_NCM_ETH_MAX_TX_SIZE
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#define CONFIG_USBHOST_CDC_NCM_ETH_MAX_TX_SIZE (2048)
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#endif
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#define CONFIG_USBHOST_BLUETOOTH_HCI_H4
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// #define CONFIG_USBHOST_BLUETOOTH_HCI_LOG
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#ifndef CONFIG_USBHOST_BLUETOOTH_TX_SIZE
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#define CONFIG_USBHOST_BLUETOOTH_TX_SIZE 2048
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#endif
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#ifndef CONFIG_USBHOST_BLUETOOTH_RX_SIZE
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#define CONFIG_USBHOST_BLUETOOTH_RX_SIZE 2048
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#endif
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/* ================ USB Device Port Configuration ================*/
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#ifndef CONFIG_USBDEV_MAX_BUS
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#define CONFIG_USBDEV_MAX_BUS 1 // for now, bus num must be 1 except hpm ip
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#endif
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#ifndef CONFIG_USBDEV_EP_NUM
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#define CONFIG_USBDEV_EP_NUM 4
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#endif
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/* ---------------- FSDEV Configuration ---------------- */
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//#define CONFIG_USBDEV_FSDEV_PMA_ACCESS 2 // maybe 1 or 2, many chips may have a difference
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/* ---------------- DWC2 Configuration ---------------- */
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// #define CONFIG_USB_DWC2_RXALL_FIFO_SIZE (1024 / 4)
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#define CONFIG_USB_DWC2_TX0_FIFO_SIZE (64 / 4)
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#define CONFIG_USB_DWC2_TX1_FIFO_SIZE (64 / 4)
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#define CONFIG_USB_DWC2_TX2_FIFO_SIZE (64 / 4)
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#define CONFIG_USB_DWC2_TX3_FIFO_SIZE (64 / 4)
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// #define CONFIG_USB_DWC2_TX4_FIFO_SIZE (0 / 4)
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// #define CONFIG_USB_DWC2_TX5_FIFO_SIZE (0 / 4)
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// #define CONFIG_USB_DWC2_TX6_FIFO_SIZE (0 / 4)
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// #define CONFIG_USB_DWC2_TX7_FIFO_SIZE (0 / 4)
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// #define CONFIG_USB_DWC2_TX8_FIFO_SIZE (0 / 4)
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/* ---------------- MUSB Configuration ---------------- */
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// #define CONFIG_USB_MUSB_SUNXI
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/* ================ USB Host Port Configuration ==================*/
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#ifndef CONFIG_USBHOST_MAX_BUS
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#define CONFIG_USBHOST_MAX_BUS 1
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#endif
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#ifndef CONFIG_USBHOST_PIPE_NUM
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#define CONFIG_USBHOST_PIPE_NUM 12
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#endif
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/* ---------------- EHCI Configuration ---------------- */
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#define CONFIG_USB_EHCI_HCCR_OFFSET (0x0)
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#define CONFIG_USB_EHCI_FRAME_LIST_SIZE 1024
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#define CONFIG_USB_EHCI_QH_NUM CONFIG_USBHOST_PIPE_NUM
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#define CONFIG_USB_EHCI_QTD_NUM 3
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#define CONFIG_USB_EHCI_ITD_NUM 20
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// #define CONFIG_USB_EHCI_HCOR_RESERVED_DISABLE
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// #define CONFIG_USB_EHCI_CONFIGFLAG
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// #define CONFIG_USB_EHCI_ISO
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// #define CONFIG_USB_EHCI_WITH_OHCI
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/* ---------------- OHCI Configuration ---------------- */
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#define CONFIG_USB_OHCI_HCOR_OFFSET (0x0)
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/* ---------------- XHCI Configuration ---------------- */
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#define CONFIG_USB_XHCI_HCCR_OFFSET (0x0)
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/* ---------------- DWC2 Configuration ---------------- */
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/* largest non-periodic USB packet used / 4 */
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// #define CONFIG_USB_DWC2_NPTX_FIFO_SIZE (512 / 4)
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/* largest periodic USB packet used / 4 */
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// #define CONFIG_USB_DWC2_PTX_FIFO_SIZE (1024 / 4)
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/*
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* (largest USB packet used / 4) + 1 for status information + 1 transfer complete +
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* 1 location each for Bulk/Control endpoint for handling NAK/NYET scenario
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*/
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// #define CONFIG_USB_DWC2_RX_FIFO_SIZE ((1012 - CONFIG_USB_DWC2_NPTX_FIFO_SIZE - CONFIG_USB_DWC2_PTX_FIFO_SIZE))
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/* ---------------- MUSB Configuration ---------------- */
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// #define CONFIG_USB_MUSB_SUNXI
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#endif

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